Preliminary Datasheet RJK03L2DNS Silicon N Channel Power MOS FET with Schottky Barrier Diode R07DS0779EJ0110 Power Switching Rev.1.10 May 30, 2012 Features High speed switching Capable of 4.5 V gate drive Low drive current High density mounting Low on-resistance RDS(on) = 4.2 m typ. (at VGS = 10 V) Pb-free Halogen-free Outline RENESAS Package code: PWSN0008JB-A (Package name: HWSON-8) 5 6 7 8 D D D D 5 6 7 8 4 3 2 1 1, 2, 3 Source 4 Gate 5, 6, 7, 8 Drain 4 G S S S 1 2 3 Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Avalanche current Avalanche energy Channel dissipation Channel to case thermal impedance Channel temperature Storage temperature Symbol VDSS VGSS ID ID(pulse)Note1 IDR IAP Note 2 EAS Note 2 Pch Note3 ch-c Note3 Tch Tstg Ratings 30 ±20 30 120 30 12 14.4 20 6.25 150 –55 to +150 Unit V V A A A A mJ W C/W C C Notes: 1. PW 10 s, duty cycle 1% 2. Value at Tch = 25C, Rg 50 3. Tc = 25C R07DS0779EJ0110 Rev.1.10 May 30, 2012 Page 1 of 6 RJK03L2DNS Preliminary Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Gate Resistance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body–drain diode forward voltage Body–drain diode reverse recovery time Symbol V(BR)DSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Rg Qg Qgs Qgd td(on) tr td(off) tf VDF trr Min 30 — — 1.2 — — — — — — — — — — — — — Typ — — — — 4.2 5.2 65 2110 345 210 1.5 17 6.6 6.0 4.7 2.9 35.2 Max — ±0.5 1 2.5 5.1 6.8 — 2955 — — 3.0 — — — — — — Unit V A mA V m m S pF pF pF nC nC nC ns ns ns — — — 11.4 0.46 6.6 — — — ns V ns Test Conditions ID = 10 mA, VGS = 0 VGS = ±20 V, VDS = 0 VDS = 24 V, VGS = 0 VDS = 10 V, I D = 1 mA ID = 15 A, VGS = 10 V Note4 ID = 15 A, VGS = 4.5 V Note4 ID = 15 A, VDS = 5 V Note4 VDS = 10 V VGS = 0 f = 1 MHz VDD = 10 V VGS = 4.5 V ID = 30 A VGS = 10 V, ID = 15 A VDD 10 V RL = 0.67 Rg = 4.7 IF = 2 A, VGS = 0 Note4 IF =30 A, VGS = 0 diF/ dt = 500 A/ s Notes: 4. Pulse test R07DS0779EJ0110 Rev.1.10 May 30, 2012 Page 2 of 6 RJK03L2DNS Preliminary Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area 1000 Drain Current ID (A) Channel Dissipation Pch (W) 40 30 20 10 0 50 100 150 200 1 m s 10 PW = 10 ms DC Operation in O pe 1 this area is ra tio limited by RDS(on) n Tc = 25 °C 0.1 1 shot Pulse 0.1 1 10 100 Case Temperature Tc (°C) Drain to Source Voltage VDS (V) Typical Output Characteristics Typical Transfer Characteristics 50 50 4.5 V 2.9 V 10 V 40 Pulse Test 2.8 V 2.7 V 30 Drain Current ID (A) Drain Current ID (A) 100 2.6 V 20 2.5 V 10 40 VDS = 5 V Pulse Test 30 20 10 VGS = 2.4 V 25°C Tc = 75°C –25°C Drain to Source Saturation Voltage VDS(on) (mV) 0 2 4 6 8 10 0 1 2 3 5 4 Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source on State Resistance vs. Drain Current 100 200 Pulse Test Pulse Test 150 30 100 10 VGS = 4.5 V ID = 10 A 50 10 V 3 5A 2A 0 4 8 12 16 20 Gate to Source Voltage VGS (V) R07DS0779EJ0110 Rev.1.10 May 30, 2012 1 1 3 10 30 100 300 1000 Drain Current ID (A) Page 3 of 6 RJK03L2DNS Preliminary Static Drain to Source on State Resistance vs. Temperature Typical Capacitance vs. Drain to Source Voltage 15 10000 Pulse Test 3000 Capacitance C (pF) 12 ID = 2 A, 5 A, 10 A 9 VGS = 4.5 V 10 V 3 50 0 25 50 75 100 Crss VGS = 0 f = 1 MHz 10 20 30 Case Temperature Tc (°C) Drain to Source Voltage VDS (V) Dynamic Input Characteristics Reverse Drain Current vs. Source to Drain Voltage 20 VGS 40 16 VDD = 25 V 10 V VDS 12 20 8 10 4 VDD = 25 V 10 V 0 0 0 Coss 10 0 100 125 150 ID = 30 A 30 300 30 10 20 30 40 50 50 Reverse Drain Current IDR (A) 0 –25 Drain to Source Voltage VDS (V) 2 A, 5 A, 10 A Gate to Source Voltage VGS (V) 6 Ciss 1000 10 V 40 Pulse Test 5V 30 20 VGS = 0, –5 V 10 0 0.4 0.8 1.2 1.6 2.0 Source to Drain Voltage VSD (V) Gate Charge Qg (nc) Maximum Avalanche Energy vs. Channel Temperature Derating Avalanche Energy EAS (mJ) 20 16 12 8 4 0 25 50 75 100 125 150 Channel Temperature Tch (°C) R07DS0779EJ0110 Rev.1.10 May 30, 2012 Page 4 of 6 RJK03L2DNS Preliminary Normalized Transient Thermal Impedance vs. Pulse Width 3 1 D=1 0.5 0.3 0.2 0.1 0.1 0.05 PDM 2 0.0 1 ulse 0 . 0 tp ho s 1 0.03 0.01 D= PW T PW T 1m 10 m 100 m 1 10 Pulse Width PW (S) Avalanche Test Circuit Avalanche Waveform EAS = L VDS Monitor 1 L • IAP2 • 2 VDSS VDSS – VDD IAP Monitor V(BR)DSS IAP Rg VDS VDD D. U. T ID Vin 15 V 0 VDD Switching Time Test Circuit Switching Time Waveform Vout Monitor Vin Monitor 90% D.U.T. Rg RL Vin Vout Vin 10 V 10% 10% VDS = 10 V 90% td(on) R07DS0779EJ0110 Rev.1.10 May 30, 2012 10% tr 90% td(off) tf Page 5 of 6 RJK03L2DNS Preliminary Package Dimensions 3.3 ± 0.1 Previous Code ⎯ MASS[Typ.] 0.022g 2.9 ± 0.1 0.1 Min 3.3 ± 0.1 0.8 Max +0.15 −0.1 RENESAS Code PWSN0008JB-A 0.04Max 0Min Stand-off 0.22 Typ +0.15 −0.1 0.65 Typ (2.55) 0.32 ± 0.08 0.4 0.575 Typ 2.27 ± 0.2 0.4 JEITA Package Code P-HWSON8-2.9x3.1-0.65 1.55 ± 0.2 Package Name HWSON-8 3.1 ± 0.1 Ordering Information Orderable Part Number RJK03L2DNS-00-J5 Quantity 5000 pcs Shipping Container Taping Note: The symbol of 2nd "-" is occasionally presented as "#". R07DS0779EJ0110 Rev.1.10 May 30, 2012 Page 6 of 6 Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. 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