TGA4811

TGA4811
DC - 60 GHz Low Noise Amplifier
Key Features
•
•
•
•
•
•
•
•
60 GHz Bandwidth
3.0 dB noise figure
> 15 dB small signal gain
13 dBm P1dB
+/- 7 ps group delay variation
Bias: 4.5V, 50 mA
0.15 um 3MI mHEMT Technology
Chip Dimensions: 1.30 x 1.06 x 0.1 mm
(0.051 x 0.042 x 0.004) in
Primary Applications
Measured Data
•
Wideband LNA / gain block
0
•
Test Equipment
-4
•
40 Gb/s optical networks
Bias Conditions: Vd = 6 V, Id = 50 mA
18
14
Gain (dB)
12
-8
10
-12
8
6
-16
4
Return Loss (dB)
16
-20
2
0
-24
0
10
20
30
40
50
60
Fre que ncy (GHz)
16
16
P1dB at 6V,52 mA
12
14
12
P1dB at 4.5V,42 mA
10
10
8
8
6
6
NF at 4.5V,42 mA
4
4
2
2
0
0
0
5
10
15
20
25
30
Frequency (GHz)
35
40
45
Noise Figure (dB)
Output P1dB (dBm)
14
Description
The TriQuint TGA4811 is a DC - 60
GHz low noise amplifier that typically
provides 15 dB small signal gain and
input and output return loss is <10dB.
Normal Noise Figure is 3.0 dB from 2
- 40 GHz. P1dB is 13 dBm.
The TGA4811 is an excellent choice
for Test Equipment, 40Gb/s optical
network applications, and general
wideband LNA and Gain Block
applications.
The TGA4811 is 100% RF tested to
ensure performance compliance.
Lead-Free & RoHS compliant.
50
Samples are available.
Subject to change without notice.
TriQuint Semiconductor Texas www.triquint.com Phone: (972)994 8465 Fax: (972)994 8504 [email protected]
1
May
2006
TGA4811
TABLE I
MAXIMUM RATINGS 1/
SYMBOL
Positive Supply Voltage
-
Negative Supply Voltage Range
V
V
I
PARAMETER
+
+
VALUE
NOTES
6.5 V
2/
-2 TO 0 V
Positive Supply Current
200m A
Gate Supply Current
10 mA
PIN
Input Continuous Wave Power
4 dBm
PD
Power Dissipation
0.69 W
IG
TCH
TM
TSTG
2/ 4/
0
Operating Channel Temperature
110 C
5/
0
Mounting Temperature (30 Seconds)
Storage Temperature
3/
175 C
0
-65 to 110 C
1/
These ratings represent the maximum operable values for this device.
2/
Combinations of resistors voltage and 3V (MAX) on mHEMT.
3/
Total current for the entire MMIC.
4/
When operated at this bias condition with a base plate temperature of 70 oC, the median life will be
reduced.
5/
Junction operating temperature will directly affect the device median time to failure (MTTF). For
maximum life, it is recommended that junction temperatures be maintained at the lowest possible
levels.
TriQuint Semiconductor Texas www.triquint.com Phone: (972)994 8465 Fax: (972)994 8504 [email protected]
2
May
2006
TGA4811
TABLE II
ELECTRICAL CHARACTERISTICS
(Ta = 25 0C, Nominal)
PARAMETER
TYPICAL
UNITS
Drain Voltage
6
V
Quiescent Current
50
mA
Small Signal Gain, S21
15
dB
Input Return Loss, S11
10
dB
Output Return Loss, S22
15
dB
Reverse Isolation, S12
-40
dB
Output Power (P1dB)
13
dBm
Power @ saturated, Psat
15
dBm
Noise figure
3.0
dB
TABLE III
THERMAL INFORMATION
Parameter
R θJC Thermal
Resistance
(channel to backside
of package)
Test Conditions
Vd = 6 V
I D = 0.05 A
Pdiss = 0.3 W
T CH
( o C)
R θ JC
(°° C/W)
TM
(HRS)
80
33.3
8.7E8
Note: Die backside epoxy attached to carrier at 70°C baseplate temperature.
TriQuint Semiconductor Texas www.triquint.com Phone: (972)994 8465 Fax: (972)994 8504 [email protected]
3
May
2006
TGA4811
Measured Data
Bias Conditions: Vd = 6 V, Id = 50 mA
18
0
16
Gain (dB)
12
-8
10
-12
8
6
-16
Return Loss (dB)
-4
14
4
-20
2
0
-24
0
10
20
30
40
50
60
70
80
Fre que ncy (GHz)
16
16
P1dB at 6V,52 mA
12
14
12
P1dB at 4.5V,42 mA
10
10
8
8
6
6
NF at 4.5V,42 mA
4
4
2
2
0
0
0
5
10
15
20
25
30
35
40
45
Noise Figure (dB)
Output P1dB (dBm)
14
50
Frequency (GHz)
TriQuint Semiconductor Texas www.triquint.com Phone: (972)994 8465 Fax: (972)994 8504 [email protected]
4
May
2006
TGA4811
Measured Data
Bias Conditions: Vd = 6 V, Id = 50 mA
70
Group Delay (ps)
60
50
40
30
20
10
0
0
5
10
15
20
25
30
35
40
45
50
55
60
Frequency (GHz)
20
26
6V, 52mA
18
24
22
4.5V, 42mA
Gain (dB)
14
20
12
18
10
16
8
14
6
12
6V, 52mA
4
10
2
Output Power (dBm)
16
8
4.5V, 42mA
0
6
-11
-10
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
Pin (dBm)
TriQuint Semiconductor Texas www.triquint.com Phone: (972)994 8465 Fax: (972)994 8504 [email protected]
5
May
2006
TGA4811
Mechanical Drawing
Vg 2
VD
RF OUT
RF IN
V G1
Units: millimeters
Thickness: 0.1
Chip edge to bond pad dimension are shown to center of bond pad.
Chip size tolerance: ± 0.051
VD
VG1
VG2
RF IN
RF OUT
Pad size (mm)
0.10x0.10
0.10x0.10
0.10x0.10
0.10x0.10
0.10x0.10
TriQuint Semiconductor Texas www.triquint.com Phone: (972)994 8465 Fax: (972)994 8504 [email protected]
6
May
2006
TGA4811
Chip Assembly Diagram
Vd
Vg2
*
100pF
0.1uF
1800pF
RF OUT
RF IN
1800pF
*
0.1uF
Vg1
3 (Three) 0.7 mil chisel bond wires at RF IN and RF OUT or 1 (one) 3 mil
ribbon at RF IN and RF OUT. Vg2 is optional for the circuit.
* 1800pF & 0.1uF capacitors can be substituted with the following
integrated capacitors:
Part Number
GZ0SYC104KJ8182MAW
VB4080X7R105Z16VHX182
M anufacturer
AVX
Presidio
TriQuint Semiconductor Texas www.triquint.com Phone: (972)994 8465 Fax: (972)994 8504 [email protected]
7
May
2006
TGA4811
Optional Testing Circuit Schematic
1800pF
0.1uF
Vd (No Connection)
VDT
Vg2 (No Connection)
Vd(RFout)
100pF
Bias Tee
TGA4811
(PSPL 5542)
RF(out)
RF(in)
DC Block
(PSPL 5509)
Vg1
1800pf
0.1uF
* 1800pF & 0.1uF capacitors can be substituted with the following
integrated capacitors:
Part Number
GZ0SYC104KJ8182MAW
VB4080X7R105Z16VHX182
Manufacturer
AVX
Presidio
TriQuint Semiconductor Texas www.triquint.com Phone: (972)994 8465 Fax: (972)994 8504 [email protected]
8
May
2006
TGA4811
Recommended Bias-Up Procedure
NOTE: To protect the device, this MMHEMT MMIC will be biased differently than typical
PHEMT devices
NOTE: Be sure proper ESD protection is in place
A. If biasing Drain through Vd DC port
1.
2.
3.
4.
5.
Leave Vg at 0V
Increase Vd to 1 V
Adjust Vg to reach 50 mA
Increase Vd to 4.5 V
Repeat steps 3 and 4 until correct bias is reached (i.e. Vd = 4.5 V, Id = 50mA)
6. To Bias-down device, turn Vg to 0V and decrease Vd to 0V
B. If Biasing Drain through Bias Tee and RF port
1.
2.
3.
4.
5.
Leave Vg at 0V
Increase Vd to 1 V
Adjust Vg to reach 50 mA
Increase Vd to 2 V
Repeat steps 3 and 4 until correct bias is reached (i.e. Vd = 2 V, Id = 50mA)
6. To Bias-down device, turn Vg to 0V and decrease Vd to 0V
TriQuint Semiconductor Texas www.triquint.com Phone: (972)994 8465 Fax: (972)994 8504 [email protected]
9
May
2006
TGA4811
Assembly Process Notes
Reflow process assembly notes:
•
•
•
•
Use epoxy with limited exposure to temperatures at 175 oC.
No fluxes should be utilized.
Coefficient of thermal expansion matching is critical for long-term reliability.
Devices must be stored in a dry nitrogen atmosphere.
Component placement and adhesive attachment assembly notes:
•
•
•
•
•
•
•
Vacuum pencils and/or vacuum collets are the preferred method of pick up.
Air bridges must be avoided during placement.
The force impact is critical during auto placement.
Organic attachment can be used in low-power applications.
Curing should be done in a convection oven; proper exhaust is a safety concern.
Microwave or radiant curing should not be used because of differential heating.
Coefficient of thermal expansion matching is critical.
Interconnect process assembly notes:
•
•
•
•
Thermosonic ball bonding is the preferred interconnect technique.
Force, time, and ultrasonics are critical parameters.
Aluminum wire should not be used.
o
Maximum stage temperature is 175 C.
TriQuint Semiconductor Texas www.triquint.com Phone: (972)994 8465 Fax: (972)994 8504 [email protected]
10
May
2006