Circuit and Functional Description Rev. 1.00 / September 2015 ZSSC4151 Automotive Sensor Signal Conditioner with Analog Output Multi-Market Sensing Platforms Precise and Deliberate ZSSC4151 Circuit and Functional Description Contents 1 2 3 4 5 6 7 8 9 10 Introduction ....................................................................................................................................................... 3 Sensor Check and Common Mode Adjustment Unit (SCCM) ......................................................................... 4 Multiplexer (MUX) ............................................................................................................................................. 6 Programmable Gain Amplifier (PGA) ............................................................................................................... 7 Analog-to-Digital Converter (ADC) ................................................................................................................... 8 Calibration Microcontroller (CMC) .................................................................................................................. 10 Power Management ....................................................................................................................................... 11 Glossary ......................................................................................................................................................... 12 Related Documents ........................................................................................................................................ 13 Document Revision History ............................................................................................................................ 13 List of Tables Table 2.1 Table 3.1 Table 4.1 Table 5.1 Table 5.2 Table 5.3 SCCM Settings in the GUI .................................................................................................................. 5 MUX Channels .................................................................................................................................... 6 Gain Settings ...................................................................................................................................... 7 ADC Example Settings ....................................................................................................................... 8 ADC Shift Settings .............................................................................................................................. 9 ADC Reference ................................................................................................................................. 10 List of Figures Figure 1.1 Figure 2.1 Figure 5.1 Figure 7.1 Block Diagram of the ZSSC4151 ........................................................................................................ 3 Analog Front End (AFE) Block Diagram ............................................................................................. 4 ADC Shift Settings Example using 2.5V Signal Span ...................................................................... 10 Power Management Overview.......................................................................................................... 11 For more information, contact ZMDI via [email protected]. Circuit & Functional Description September 3, 2015 © 2015 Zentrum Mikroelektronik Dresden AG — Rev. 1.00 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication subject to changes without notice. 2 of 13 ZSSC4151 Circuit and Functional Description 1 Introduction The signal path of the ZSSC4151 circuits consists of the analog front-end (AFE), the digital signal processing unit, the overvoltage protection circuitry, the ZACwire™ one-wire interface (OWI), and the analog output (AOUT). An 2 * optional I C™ interface is available for calibration and evaluation. A single set of differential inputs (BRP and BRN pins) are inputs from the sensor bridge. The differential input is handled by two signal lines, each with a dynamic range symmetrical to the common mode potential (analog ground is equal to VDDA/2) so that it is possible to amplify positive and negative input signals within the common mode range of the signal input. The input signals used are selected by the input multiplexer. Figure 1.1 Block Diagram of the ZSSC4151 ZSSC4151 SCL I2CTM TS1 External PN Temperature Sensor Power Management TOP Mode Sensor Bridge BRP NVM Input Select MUX ADC Mode Gain Select RAM PGA AOUT OWI CMC BRN Analog Front-End (AFE) DAC / BAMP Interfaces ROM BOT Digital Core Alternate External Temperature Sensor 2 VSSA ZACwireTM ADC SCCM Temp Sensor SDA VDDA Overvoltage Protection VDDE VSSE TS2 Note: Either TS1 or TS2 can be used for the external temperature sensor input, but not both at the same time. SCCM MUX PGA ADC CMC RAM ROM Sensor Check and Common Mode Adjustment Unit Multiplexer Programmable Gain Amplifier Analog-to-Digital Converter Calibration Microcontroller Volatile Memory for Configuration and Conditioning Coefficients Read-Only Memory for Correction Formula and Algorithm NVM Non-volatile Multiple-Time Programmable (MTP) Memory for Configuration and Conditioning Coefficients DAC/BAMP Analog Output Stage 2 2 I C™ I C™ Digital Interface ZACwire™ Digital One-Wire Interface (OWI) POWER Power Management and Protection Unit * I2C™ is a trademark of NXP. Circuit & Functional Description September 3, 2015 © 2015 Zentrum Mikroelektronik Dresden AG — Rev. 1.00 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication subject to changes without notice. 3 of 13 ZSSC4151 Circuit and Functional Description The multiplexer (MUX) transmits the input signals, which can be from a bridge sensor, a selected temperature sensor, or diagnostic voltage levels (see section 2), to the analog-to-digital converter (ADC) in a defined sequence. The temperature sensor signal can be from the internal PTAT source, external diode, external PTCtype RTD sensors, or the sensor bridge as selected by the configuration programmed in NVM via the ZSSC4151 Evaluation Kit Software, also referred to as the graphical user interface (GUI). The multiplexer can support differential or single-end sensor inputs; however, it converts single-ended inputs to differential signals for signal processing. The differential signals are pre-amplified by the programmable gain amplifier (PGA). The ADC converts these signals into digital values. The digital signal correction is processed in the calibration microcontroller (CMC) using a set of selectable ROMresident correction formulas and sensor-specific coefficients stored in the NVM during calibration. The configuration data and the correction parameters can be programmed into the NVM via the digital OWI communication at 2 the output pin or by digital communication via the I C™ interface. During the calibration procedure, the digital interfaces can also provide measurement values. 2 Sensor Check and Common Mode Adjustment Unit (SCCM) The SCCM block contains the circuitry needed to test the sensor inputs for fault conditions. The sensor check detects both shorts and opens. The SCCM has programmable probe currents used during diagnostic checks to account for different sensor types. In addition, the SCCM has an analog front-end digital-to-analog converter (AFEDAC) that can supply diagnostic voltages with up to eight different settings to the signal path. The AFEDAC can be set to reference either VDDA/VSSA or the TOP/BOT pins. Figure 2.1 Analog Front End (AFE) Block Diagram Test MUX TS1 Ext Temp MUX Diagnostics TS2 BRP Filter G1 BRN ADC Input MUX SCCM Input MUX BG, PTAT, Diode ADC G2 G1 AFE DAC TOP BOT Circuit & Functional Description September 3, 2015 Bridge Supply ADC Ref MUX © 2015 Zentrum Mikroelektronik Dresden AG — Rev. 1.00 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication subject to changes without notice. 4 of 13 ZSSC4151 Circuit and Functional Description Table 2.1 SCCM Settings in the GUI SCCM Settings Option Description Current Mode Probe Current Current Cross Current Output Current Sink Current Injection Polarity Sensor Connection Check Current Mode Diagnostics Activated for Bridge 0 6.25µA 1 25µA 2 100µA 3 400µA 0 Sink/source current at the same node 1 Sink/source current at opposite pin BRP/BRN 0 Disable 1 Enable 0 Source current reference in current comparator 1 Sink current reference in current comparator 0 Sink current at pin BRP 1 Sink current at pin BRN 0 Disable 1 Enable 0 Disable 1 Enable 0 TOP and BOT pins as DAC reference 1 VDDA and VSSA pins as DAC reference 0 0.1111111111 (TOP - BOT) or (VDDA – VSSA) 1 0.2222222222 (TOP - BOT) or (VDDA – VSSA) 2 0.3333333333 (TOP - BOT) or (VDDA – VSSA) 3 0.4444444444 (TOP - BOT) or (VDDA – VSSA) 4 0.5 (TOP - BOT) or (VDDA – VSSA) 5 0.5555555556 (TOP - BOT) or (VDDA – VSSA) 6 0.6666666667 (TOP - BOT) or (VDDA – VSSA) 7 0.7777777778 (TOP - BOT) or (VDDA – VSSA) Voltage Mode Reference Select Reference Voltage Circuit & Functional Description September 3, 2015 © 2015 Zentrum Mikroelektronik Dresden AG — Rev. 1.00 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication subject to changes without notice. 5 of 13 ZSSC4151 Circuit and Functional Description 3 Multiplexer (MUX) The MUX allows many combinations of different inputs to feed into the ZSSC4151 through either external pins or internally connected signals. Table 3.1 lists the different multiplexer options. The MUX selects both the negative and positive inputs to the differential signal path as well as assigning the inputs for up to 20 measurement tasks. A total of 40 selections are configurable via the GUI (two inputs on 20 different measurement tasks). Table 3.1 MUX Channels MUX Channel Option Description BRP 0 Main channel bridge positive input BRN 1 Main channel bridge negative input AFEDACP 4 Analog front-end DAC (AFEDAC) positive input AFEDACN 5 Analog front-end DAC (AFEDAC) negative input PTATP 6 PTATN 7 High accuracy internal temperature sensor; temperature sensor is diode-based (both inputs must be selected simultaneously) VDC 8 PTATP 9 Internal supply voltage for control circuitry in analog domain (use for testing only) Important: Reserved for ZMDI use only. Do not select. DION TOP A Voltage from TOP pin TS1 B External temperature input 1. For external diode, measure against TOP, and for external RTD (PTC only), measure against AGND (internal ground). TS2 C External temperature input 2. For external diode, measure against TOP, and for external RTD (PTC only), measure against AGND. AGND D Internal analog ground or ½ (VDDA – VSSA) VDD E Digital supply voltage 1.8V typical (for test only) VSSA F Analog negative supply; normal operation = 0V Circuit & Functional Description September 3, 2015 © 2015 Zentrum Mikroelektronik Dresden AG — Rev. 1.00 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication subject to changes without notice. 6 of 13 ZSSC4151 Circuit and Functional Description 4 Programmable Gain Amplifier (PGA) The programmable gain amplifier (PGA) is a two-stage amplifier with gain settings configurable via the GUI as listed in Table 4.1. This is the analog coarse gain adjustment before the signal is input to the ADC. There is also a digital fine gain adjustment as part of the digital calibration. The digital gain supports both positive and negative gain settings configured via the GUI to achieve the highest possible span. Table 4.1 Gain Settings Gain GUI Option First G1 Stage Second G2 Stage Maximum Input Span 1) VIN_SPAN (mV/V) Input Common Mode Range VIN_CM (% VDDA) 1.0 0 1 1.00 800 5 to 95 1.4 1 1 1.56 578 30 to 65 2.1 2 2 1.11 385 30 to 65 3.15 3 2 1.56 254 30 to 65 4.3 4 2 2.21 186 30 to 65 6.25 5 2 3.13 128 30 to 65 8.3 6 8 1.11 96 30 to 65 12.6 7 8 1.56 63 30 to 65 17.3 8 8 2.21 46 30 to 65 25.0 9 8 3.13 32 30 to 65 33.2 A 32 1.11 24 30 to 65 50.4 B 32 1.56 16 30 to 65 69.0 C 32 2.21 12 30 to 65 100.0 D 32 3.13 8 30 to 65 138.0 E 64 2.21 6 30 to 65 200.0 F 64 3.13 4 30 to 65 1) The internal limitation for the gain is the ADC input, which is limited to 10% to 90% of the ADC reference (example: VDDA – VSSA). Circuit & Functional Description September 3, 2015 © 2015 Zentrum Mikroelektronik Dresden AG — Rev. 1.00 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication subject to changes without notice. 7 of 13 ZSSC4151 Circuit and Functional Description 5 Analog-to-Digital Converter (ADC) The analog-to-digital converter has a two-stage charge-balance architecture. The resolution is configurable from 12 to 18 bits via the GUI. Table 5.1 lists example ADC settings to achieve a specific resolution and conversion time. The conversion time is only the time required for one bridge measurement. Time must be added for autozeroing the bridge measurement, auto-zeroing the temperature measurement, and temperature and diagnostic measurements. Measurement tasks should be organized and configured to allow a bridge measurement between every other temperature and diagnostic measurement. This will maximize throughput for the primary task of measuring the bridge. The following ADC configuration parameters are properly preconfigured and verified by simulation by ZMDI for each measurement task for the ZSSC4151: ADC chopper length, ADC MSB phase clock divider, ADC clock divider, ADC LSB conversion overlap, ADC chopper break length and ADC MSB pre-phase length. Important: Do not change these settings without the support of a ZMDI application engineer. If the settings are changed, a new simulation must be run by ZMDI to ensure that the new configuration does not cause random failures that might not be detected in the final application. Such failures could result in inaccurate readings. This is especially important in safety-critical applications. Table 5.1 ADC Example Settings Note: Settings shaded blue in this table support digital zooming to correct sensor signals with a large offset. For more about digital zooming and MSB/LSB resolution, refer to the ZSSC415x Application Note – ZSSC4151 ADC Segmentation. Resolution ADC MSB Resolution ADC LSB Resolution ADC Conversion Time(µs) 6 6 21 7 5 26 8 4 43 9 3 81 7 6 31 8 5 45 9 4 82 10 3 159 7 7 40 8 6 50 9 5 84 10 4 160 8 7 60 9 6 89 10 5 163 11 4 317 1) 12 13 14 15 Circuit & Functional Description September 3, 2015 © 2015 Zentrum Mikroelektronik Dresden AG — Rev. 1.00 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication subject to changes without notice. 8 of 13 ZSSC4151 Circuit and Functional Description Resolution ADC MSB Resolution ADC LSB Resolution ADC Conversion Time(µs) 8 8 79 9 7 99 10 6 167 11 5 319 9 8 119 10 7 177 11 6 324 12 5 632 9 9 158 10 8 197 11 7 334 12 6 637 1) 16 17 18 1) Important: ZMDI has measured conversion time with the following preconfigured settings, which must not be changed by the user: ADC chopper length=512, ADC MSB phase clock divider=2, ADC clock divider=2, ADC LSB conversion overlap enabled, ADC chopper break length=64, ADC MSB pre-phase length=16, and clock=13MHz. Another option available to the ADC is the shift feature. The ADC shift allows the ADC input to adjust to large offsets in the bridge input signal. The ADC shift is set to capture the maximum span of the incoming signal. Gain in the PGA is also used to maximize the span. Once the measurement is in the digital domain, a digital gain and offset can be used to achieve the full output resolution after calibration. The ADC shift is always shifting to the upper count range, so for negative offsets, it is necessary to switch the polarity of the bridge input. Then during calibration, the digital gain can be set to a negative value. This allows large negative offsets to be calibrated out while the signal remains in a range where the counts increase as the sensor signal increases. Table 5.2 ADC Shift Settings Setting Description -1/2 to +1/2 Centered in ADC range -1/4 to +3/4 Shifted +25% -1/8 to +7/8 Shifted +37.5% -1/16 to +15/16 Shifted +43.75% Recommendation: When adjusting the ADC shift and analog gain, stay within the linear range of the ADC input. The linear range of the ADC input is from 0.1 to 0.9 times the reference for the ADC. For example, for ratiometric readings using 5V and 0V as the reference, the linear ADC input range is from 0.5V to 4.5V. Table 5.3 lists references for the ADC. Circuit & Functional Description September 3, 2015 © 2015 Zentrum Mikroelektronik Dresden AG — Rev. 1.00 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication subject to changes without notice. 9 of 13 ZSSC4151 Circuit and Functional Description Table 5.3 ADC Reference Note: The ADC reference can be selected with the GUI. For more details, see the ZSSC4151 Application Description. Reference Type Description VDDA/VSSA Ratiometric Referenced to protected supply pins TOP/BOT Ratiometric Referenced to bridge drive Bandgap/VSSA Absolute Bandgap 1.2V and VSSA=0V Figure 5.1 ADC Shift Settings Example using 2.5V Signal Span 4.687V 5V 4.5V 29490 counts 3.5V 3.75V 0.65 Ú VDDA Common Mode Input Range (Bridge Inputs Before Gain) 4.375V ADC Linear Range 2.5V 16383 counts 4.8438V 28671 counts 24575 counts -1/16 to +15/16 -1/8 to +7/8 -¼ to +¾ Full ADC Input Range 31743 counts 30718 counts 32767 counts -½ to +½ 2.5V 16383 counts 2.5V 2.5V 16383 counts 16383 counts 14335 counts 0.3 Ú VDDA 1.25V 1.5V 12287 counts 8191 counts 1.875V 2.1875V 15359 counts 2.344V 0.5V 3276 counts 0V 0 counts Note: In this example, the positive sensor input is always ³ the negative input, the ADC = 15 bits + sign, and the reference to ADC is 5V/0V. 6 Calibration Microcontroller (CMC) The calibration microcontroller (CMC) is a 16-bit digital signal processor (DSP) with a 24-bit arithmetic logic unit (ALU). The CMC performs state machine functions for the device, calculations for temperature compensation, and formatting functions for different output interfaces. Features configured through the CMC: Diagnostic options Selection of multiplexer inputs Measurement tasks for bridge, temperature, and diagnostics measurements Conditioning tasks that remove errors in the overall signal path due to DC offsets and temperature effects Format analog output or I C™ communications in Normal Operation Mode (NOM) Format One-Wire Interface (OWI) and I C™ communications in Command Mode or development mode 2 2 The calibration coefficients are unique for each sensor module after the ZSSC4151 has been mounted with the specific sensor. Coefficients are determined by calibration and stored in the NVM memory. During calibration, the module’s bridge and temperature data are collected at different levels. The coefficients can be calculated using either the calibration screen in the GUI or using a .dll file provided by ZMDI. Circuit & Functional Description September 3, 2015 © 2015 Zentrum Mikroelektronik Dresden AG — Rev. 1.00 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication subject to changes without notice. 10 of 13 ZSSC4151 Circuit and Functional Description The terms Main x (Mx) and Auxiliary x (Ax) are used to distinguish different measurement tasks performed by the ADC; e.g., bridge measurement, temperature measurement, supply monitoring, or input diagnostics, such as detection of bridge open or shorted conditions. Typically, main tasks are implemented first. It is possible to configure up to 4 measurement tasks or as few as 2 measurement tasks for the ZSSC4151 using the GUI. The Main 0 and Main 1 tasks are normally reserved for bridge sensor measurements since they are always the first measurements in any sequence. However, the Main channels are not limited to the bridge inputs. Auxiliary 0 through Auxiliary17 can also be assigned to any input. The measurement task is assigned once the multiplexer input is selected for that task. For example, if Main 0 is configured to be connected to inputs BRP and BRN, then Main 0 is now assigned to the bridge measurement. It is also possible to flip the polarity of the input by switching BRP and BRN going into the flexible multiplexer. For more details, see the ZSSC4151 Application Description. 7 Power Management The power management for the ZSSC4151 is shown in Figure 7.1. The over-voltage/reverse-battery (OVRB) protection is a switch that opens if the external supply exceeds the normal operating voltage. The external supply pins are VDDE and VSSE. The protected 5V is VDDA and VSSA. These supply pins are protected from external OVRB and transients. VDDA and VSSA are used by the analog circuitry inside the ZSSC4151, and they supply the sensor bridge. Additionally, there is an internal low dropout (LDO) regulator that generates the digital supply of 1.8V. This regulator supplies the digital logic, memories (NVM, RAM, ROM), and level shifters. Decoupling capacitance for the regulator output is distributed over the digital block internally (no external component required). Refer to the ZSSC415x Application Note – ZSSC4151 Power Management for more details. Figure 7.1 Power Management Overview 5V External Supply VDDE VSSE 5V Protected Supply VDDA VSSA Reverse or Over Voltage Protection ±40v LDO Regulator Digital, NVM, RAM, ROM and Level Shifters 5V to 1.8V VDD VSS 1.8V Supply Internally Decoupled (not pinned out in normal operation) Circuit & Functional Description September 3, 2015 © 2015 Zentrum Mikroelektronik Dresden AG — Rev. 1.00 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication subject to changes without notice. 11 of 13 ZSSC4151 Circuit and Functional Description 8 Glossary Term Description ADC Analog-to-Digital Converter ALU Arithmetic Logic Unit AFE Analog Front-End CMC Calibration Microcontroller BG Bandgap DSP Digital Signal Processor DAC Digital-to-Analog Converter GUI Graphic User Interface LDO Low Dropout (Regulator) LSB Least Significant Bit MSB Most Significant Bit MUX Multiplexer NOM Normal Operation Mode NVM Nonvolatile Memory OVRB Over-Voltage/Reverse-Battery OWI One-Wire Interface PGA Programmable Gain Amplifier PTAT Proportional to Absolute Temperature RAM Random Access Memory RTD Resistance Temperature Detector SCC Sensor Connection Check SCCM Sensor Check and Common Mode Adjustment Unit SSC Sensor Short Check or Sensor Signal Conditioner Circuit & Functional Description September 3, 2015 © 2015 Zentrum Mikroelektronik Dresden AG — Rev. 1.00 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication subject to changes without notice. 12 of 13 ZSSC4151 Circuit and Functional Description 9 Related Documents Note: X_xy refers to the current revision of the document. Document File Name ZSSC4151 Feature Sheet ZSSC4151_Feature_Sheet_Rev_X_xy.pdf ZSSC4151 Data Sheet ZSSC4151_Data_Sheet_Rev_X_xy.pdf ZSSC4151 Application Description ZSSC4151_Application_Description_Rev_X_xy.pdf ZSSC415x Application Note – ZSSC4151 Power Management * ZSSC4151_Power_Management_Rev_X_xy.pdf ZSSC415x Application Note – ZSSC4151 ADC Segmentation * ZSSC4151_ADC_Segmentation_Rev_X_xy.pdf Visit the ZSSC4151 product page at www.zmdi.com/zssc415x on ZMDI’s website at www.zmdi.com or contact your nearest sales office for the latest version of these documents. * Note: Documents marked with an asterisk (*) are available on request from ZMDI. 10 Document Revision History Revision 1.00 Date September 3, 2015 Description First release. Sales and Further Information www.zmdi.com [email protected] Zentrum Mikroelektronik Dresden AG Global Headquarters Grenzstrasse 28 01109 Dresden, Germany ZMD America, Inc. 1525 McCarthy Blvd., #212 Milpitas, CA 95035-7453 USA Central Office: Phone +49.351.8822.306 Fax +49.351.8822.337 USA Phone 1.855.275.9634 Phone +1.408.883.6310 Fax +1.408.883.6358 European Technical Support Phone +49.351.8822.7.772 Fax +49.351.8822.87.772 DISCLAIMER: This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Zentrum Mikroelektronik Dresden AG (ZMD AG) assumes no obligation regarding future manufacture unless otherwise agreed to in writing. The information furnished hereby is believed to be true and accurate. However, under no circumstances shall ZMD AG be liable to any customer, licensee, or any other third party for any special, indirect, incidental, or consequential damages of any kind or nature whatsoever arising out of or in any way related to the furnishing, performance, or use of this technical data. ZMD AG hereby expressly disclaims any liability of ZMD AG to any customer, licensee or any other third party, and any such customer, licensee and any other third party hereby waives any liability of ZMD AG for any damages in connection with or arising out of the furnishing, performance or use of this technical data, whether based on contract, warranty, tort (including negligence), strict liability, or otherwise. European Sales (Stuttgart) Phone +49.711.674517.55 Fax +49.711.674517.87955 Circuit & Functional Description September 3, 2015 Zentrum Mikroelektronik Dresden AG, Japan Office 2nd Floor, Shinbashi Tokyu Bldg. 4-21-3, Shinbashi, Minato-ku Tokyo, 105-0004 Japan ZMD FAR EAST, Ltd. 3F, No. 51, Sec. 2, Keelung Road 11052 Taipei Taiwan Phone +81.3.6895.7410 Fax +81.3.6895.7301 Phone +886.2.2377.8189 Fax +886.2.2377.8199 Zentrum Mikroelektronik Dresden AG, Korea Office U-space 1 Building Unit B, 906-1 660, Daewangpangyo-ro Bundang-gu, Seongnam-si Gyeonggi-do, 463-400 Korea Phone +82.31.950.7679 Fax +82.504.841.3026 © 2015 Zentrum Mikroelektronik Dresden AG — Rev. 1.00 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication subject to changes without notice. 13 of 13