TN-12-10: Migrating N25Q 3V, 128Mb Device Introduction Technical Note Migrating Micron's N25Q 3V, 128Mb, Parameter Blocks Serial Flash Devices to Uniform Subsector Erase Devices Introduction This technical note explains how to migrate from the Micron® N25Q 3V, 128Mb parameter blocks serial NOR Flash device to the N25Q 3V, 128Mb uniform subsector erase serial NOR Flash device. Features compared include memory organization, package options, signal descriptions, the software command set, performance, and block protection. The device supports legacy SPI protocol(s) as well as the latest quad I/O or dual I/O SPI protocol. It is manufactured using Micron's 65nm technology and provides a minimum of 100,000 PROGRAM/ERASE cycles per sector, with 20-year data retention. The device uses a single supply voltage from 2.7V to 3.6V and is offered in the industrial temperature range (–40°C to +85°C). Maximum clock frequency is 108 MHz (quad/dual I/O instructions result in an equivalent clock frequency up to 432 MHz). The primary difference between the two devices is in memory organization: parameter blocks devices offer 4KB subsector granularity in the 8 boot sectors (bottom or top parts), and uniform subsector erase devices provide 4KB subsector granularity in the entire memory array. PDF: 09005aef846aeada tn1210_128_parameter_uniform_migration.pdf - Rev. B 6/11 EN 1 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by Micron without notice. Products are only warranted by Micron to meet Micron's production data sheet specifications. All information discussed herein is provided on an "as is" basis, without warranties of any kind. TN-12-10: Migrating N25Q 3V, 128Mb Device Memory Array Architecture Memory Array Architecture Table 1: Device Comparison Parameter Block Features Uniform Subsector Erase Features 16,777,216 bytes (8 bits each) 16,777,216 bytes (8 bits each) 256 sectors (64KB each) 256 sectors (64KB each) In bottom and top versions: 8 bottom (top) 64KB boot sectors with 16 subsectors (4KB) and 248 standard 64KB sectors 4096 subsectors (4KB each) 65,536 pages (256 bytes each) 65,536 pages (256 bytes each) 64 OTP bytes located outside the main memory array 64 OTP bytes located outside the main memory array Part Number Ordering and Package Configurations Table 2: Package Configurations Uniform Subsector Erase Package Code Parameter Blocks VDFPN8 (8mm x 6mm MLP8) V-PDFN-8/8mm x 6mm F8 Yes Yes TBGA24 (6mm x 8mm AT) 12 Yes Yes F7 – Yes SO16 (300 mils body width) SOP2-16/300 mil SF Yes Yes SO8W (SO8 208 mils body width) SE – Yes Package1 JEDEC Name T-PBGA-24b05/6mm x 8mm VDFPN8 (6mm x 5mm Sawn V-PDFN-8/6mm x 5mm MLP) (Sawn) Note: SOP2-8/208 mil 1. All packages are RoHS-compliant. PDF: 09005aef846aeada tn1210_128_parameter_uniform_migration.pdf - Rev. B 6/11 EN 2 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-12-10: Migrating N25Q 3V, 128Mb Device Part Number Ordering and Package Configurations Table 3: Part Number Cross Reference: 2.7–3.6V Original CP1 Package Equivalent Part Number1 N25Q128A13B1240x T-PBGA-24b05/6mm x 8mm (TBGA 24) N25Q128A13E1240x N25Q128A13B1241x T-PBGA-24b05/6mm x 8mm (TBGA 24) N25Q128A13E1241x N25Q128A13BF840x V-PDFN-8/8mm x 6mm (MLP 8x6) N25Q128A13EF840x N25Q128A13BSE40x SOP2-8/208mil (SO8W) N25Q128A13ESE40x N25Q128A13BSF40x SOP2-16/300mil (SO16W) N25Q128A13ESF40x N25Q128A13B1242x T-PBGA-24b05/6mm x 8mm (TBGA 24) N25Q128A13E1242x N25Q128A13BF740x V-PDFN-8/6mm x 5mm (MLP 6mm x 5mm) (Sawn) N25Q128A13EF740x N25Q128A13TF840x V-PDFN-8/8mm x 6mm (MLP 8mm x 6mm) N25Q128A13EF840x N25Q128A13TSF40x SOP2-16/300mil (SO16W) N25Q128A13ESF40x N25Q128A13T1240x T-PBGA-24b05/6mm x 8mm (TBGA 24) N25Q128A13E1240x N25Q128A23BF840x V-PDFN-8/8mm x 6mm (MLP 8mm x 6mm) N25Q128A13EF840x 2 N25Q128A23BSF40x SOP2-16/300mil (SO16W) N25Q128A13ESF40x 2 N25Q128A23B1240x T-PBGA-24b05/6mm x 8mm (TBGA 24) N25Q128A13E1240x 2 N25Q128A23B1241x T-PBGA-24b05/6mm x 8mm (TBGA 24) N25Q128A13E1241x 2 N25Q128A23T1240x T-PBGA-24b05/6mm x 8mm (TBGA 24) N25Q128A13E1240x 2 N25Q128A23TF840x V-PDFN-8/8mm x 6mm (MLP 8mm x 6mm) N25Q128A13EF840x 2 N25Q128A23TSF40x SOP2-16/300mil (SO16W) N25Q128A13ESF40x 2 N25Q128A43BSE40x SOP2-8/208mil (SO8W) N25Q128A13ESE40x 2 Notes: Note 1. Applies to all part numbers: Packing information details: E = tray; F = tape-and-reel; G = tube (16th digit of part number). 2. Basic XIP application should use Micron XIP mode without any software change. Contact your local Micron sales representative for more information. PDF: 09005aef846aeada tn1210_128_parameter_uniform_migration.pdf - Rev. B 6/11 EN 3 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-12-10: Migrating N25Q 3V, 128Mb Device Signal Descriptions Signal Descriptions Table 4: Signal Descriptions Both devices share the same signals and functions Uniform Parameter Subsector Blocks Erase Signal Signal Type Description C C Input DQ0 DQ0 I/O Serial data input DQ1 DQ1 I/O Serial data output S# S# Input W/VPP/DQ2 W/VPP/DQ2 I/O Write protect/enhanced program supply voltage/additional data I/O HOLD#/DQ3 HOLD#/DQ3 I/O HOLD (RESET function available upon customer request)/additional data I/O VCC VCC Power VSS VSS Ground Notes: Serial clock Chip select Supply voltage Ground 1. DQ0, DQ1, DQ2, and DQ3 become I/O signals according to the protocol used. 2. W is used for hardware write protection: the protected area size is defined by nonvolatile bits (BP0, BP1, BP2, BP3, and TB bit). Also, a software write protection is applicable to every 64KB sector (volatile lock bit) and additional smart protections are available upon customer request. 3. HOLD# is used to pause any serial communications with the device without deselecting the device. 4. Reset functionality, rather than hold, is present in devices with a dedicated part number. Commands The parameter blocks device has a fast power-on reset feature to speed up the poweron sequence for applications that only require reading the memory after the power-on sequence (no modify commands). The uniform subsector erase device does not include the fast power-on reset feature. In dual I/O and quad I/O protocols, the command set is the same for both devices; see the respective data sheets for details. Table 5: Extended SPI Protocol Supported Command Set Code Address Bytes Dummy Clock Cycles Data Bytes 9Eh/9Fh 0 0 1 to 20 READ 03h 3 0 1 to ∞ 1 FAST READ 0Bh 3 8 1 to ∞ 1 DUAL OUTPUT FAST READ 3Bh 3 8 1 to ∞ 1 Command Notes READ Operations READ IDENTIFICATION PDF: 09005aef846aeada tn1210_128_parameter_uniform_migration.pdf - Rev. B 6/11 EN 4 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-12-10: Migrating N25Q 3V, 128Mb Device Commands Table 5: Extended SPI Protocol Supported Command Set (Continued) Code Address Bytes Dummy Clock Cycles Data Bytes Notes DUAL INPUT/OUTPUT FAST READ BB 3 8 1 to ∞ 1 QUAD OUTPUT FAST READ 6Bh 3 8 1 to ∞ 1 QUAD INPUT/OUTPUT FAST READ EBh 3 10 1 to ∞ 1 READ OTP 4Bh 3 8 1 to 65 1 READ SERIAL FLASH DISCOVERY PARAMETER 5Ah 3 9 1 to ∞ 2 WRITE ENABLE 06h 0 0 0 WRITE DISABLE 04h 0 0 0 PAGE PROGRAM 02h 3 0 1 to 256 DUAL INPUT FAST PROGRAM A2h 3 0 1 to 256 DUAL INPUT EXTENDED FAST PROGRAM D2h 3 0 1 to 256 QUAD INPUT FAST PROGRAM 32h 3 0 1 to 256 QUAD INPUT EXTENDED FAST PROGRAM 12h 3 0 1 to 256 PROGRAM OTP 42h 3 0 1 to 65 BULK ERASE C7h 0 0 0 SECTOR ERASE D8h 3 0 0 SUBSECTOR ERASE 20h 3 0 0 PROGRAM/ERASE SUSPEND 75h 0 0 0 PROGRAM/ERASE RESUME 7Ah 0 0 0 READ STATUS REGISTER 05h 0 0 1 to ∞ WRITE STATUS REGISTER 01h 0 0 1 READ LOCK REGISTER E8h 3 0 1 to ∞ WRITE LOCK REGISTER E5h 3 0 1 READ FLAG STATUS REGISTER 70h 0 0 1 to ∞ CLEAR FLAG STATUS REGISTER 50h 0 0 0 READ NONVOLATILE CONFIGURATION REGISTER B5h 0 0 2 WRITE NONVOLATILE CONFIGURATION REGISTER B1h 0 0 2 READ VOLATILE CONFIGURATION REGISTER 85h 0 0 1 to ∞ WRITE VOLATILE CONFIGURATION REGISTER 81h 0 0 1 Command WRITE Operations PROGRAM Operations ERASE Operations 3 SUSPEND Operations REGISTER Operations PDF: 09005aef846aeada tn1210_128_parameter_uniform_migration.pdf - Rev. B 6/11 EN 5 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-12-10: Migrating N25Q 3V, 128Mb Device Commands Table 5: Extended SPI Protocol Supported Command Set (Continued) Code Address Bytes Dummy Clock Cycles Data Bytes READ ENHANCED VOLATILE CONFIGURATION REGISTER 65h 0 0 1 to ∞ WRITE ENHANCED VOLATILE CONFIGURATION REGISTER 61h 0 0 1 Command Notes: Notes 1. The number of dummy clock cycles is configurable by the user. 2. Command applies to the uniform subsector erase device only. 3. For the parameter blocks device, the SUBSECTOR ERASE command is available only in the bottom or top part of the memory array. For the uniform subsector erase device, the SUBSECTOR ERASE command is available for all sectors of the entire memory array. Table 6: RESET Command Codes The following commands are supported only on the uniform subsector erase device Command Code Data Bytes RESET ENABLE 66h 0 RESET MEMORY 99h 0 Note: 1. The uniform subsector erase device features an additional RESET command code that enables the device to be reset through a dedicated command. Refer to the device data sheet for more information. PDF: 09005aef846aeada tn1210_128_parameter_uniform_migration.pdf - Rev. B 6/11 EN 6 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-12-10: Migrating N25Q 3V, 128Mb Device DC Characteristics and Operating Conditions DC Characteristics and Operating Conditions Parameter blocks and uniform subsector erase devices share the same specifications. Table 7: DC Current Characteristics and Operating Conditions Parameter Min Max Unit Input leakage current Symbol ILI Test Conditions – ±2 µA Output leakage current ILO – ±2 µA Standby current ICC1 S = VCC; VIN = VSS or VCC – 100 µA Operating current (FAST READ – single I/O) ICC3 C = 0.1VCC/0.9VCC at 108 MHz; DQ1 = open – 15 mA C = 0.1VCC/0.9VCC at 54 MHz; DQ1 = open Operating current (FAST READ –dual I/ O) C = 0.1VCC/0.9VCC at 108 MHz – 6 mA Operating current (FAST READ – quad I/O) C = 0.1VCC/0.9VCC at 108 MHz – 18 mA Operating current (PAGE PROGRAM – single, dual, quad I/O) ICC4 S# = VCC – 20 mA Operating current (WRITE STATUS REGISTER) ICC5 S# = VCC – 20 mA Operating current (SECTOR ERASE) ICC6 S# = VCC – 20 mA Input low voltage VIL –0.5 0.3VCC V Input high voltage VIH 0.7VCC VCC + 0.4 V Output low voltage VOL IOL = 1.6mA – 0.4 V Output high voltage VOH IOH = –100µA VCC - 0.2 – V Table 8: Operating Conditions Parameter Symbol Min Max Unit Supply voltage VCC 2.7 3.6 V Supply voltage on VPP VPPH 8.5 9.5 V TA –40 85 °C Ambient operating temperature PDF: 09005aef846aeada tn1210_128_parameter_uniform_migration.pdf - Rev. B 6/11 EN 7 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-12-10: Migrating N25Q 3V, 128Mb Device AC Characteristics AC Characteristics Table 9: AC Characteristics Note 1 applies to entire table Parameter Clock frequency for all commands other than READ (SPI-ER, QIO-SPI protocol) Symbol Min Typ3 Max Unit fC DC – 108 MHz Notes fR DC – 54 MHz Clock HIGH time tCH 4 – – ns 2 Clock LOW time tCL 4 – – ns 3 Clock rise time (peak-to-peak) tCLCH 0.1 – – V/ns 5, 4 Clock fall time (peak-to-peak) tCHCL 0.1 – – V/ns 5, 4 S# active setup time (relative to clock) tSLCH 4 – – ns S# not active hold time (relative to clock) tCHSL 4 – – ns Data in setup time tDVCH 2 – – ns Data in hold time tCHDX 3 – – ns S# active hold time (relative to clock) tCHSH 4 – – ns S# not active setup time (relative to clock) tSHCH 4 – – ns S# deselect time after a READ command tSHSL1 20 – – ns S# deselect time after an unsupported READ operation, or any other operation tSHSL2 50 – – ns Output disable time tSHQZ – – 8 ns Clock LOW to output valid under 30pF tCLQV – – 7 ns – – 5 ns Output hold time tCLQX 1 – – ns HOLD command setup time (relative to clock) tHLCH 4 – – ns HOLD command hold time (relative to clock) tCHHH 4 – – ns HOLD command setup time (relative to clock) tHHCH 4 – – ns HOLD command hold time (relative to clock) tCHHL 4 – – ns HOLD command to output Low-Z tHHQX – – 8 ns 4 HOLD command to output High-Z tHLQZ – – 8 ns 4 Write protect setup time tWHSL 20 – – ns 6 Write protect hold time tSHWL 100 – – ns 6 tVPPHSL 200 – – ns 7 tW – 1.3 8 ms tCFSR – 40 – ns tWNVCR – 0.2 3 s tWVCR – 40 – ns Clock frequency for READ commands Clock LOW to output valid under 10pF Enhanced program supply voltage HIGH (VPPH) to CS# LOW for single and dual I/O page program WRITE STATUS REGISTER cycle time CLEAR FLAG STATUS REGISTER cycle time WRITE NONVOLATILE CONFIGURATION REGISTER cycle time WRITE VOLATILE CONFIGURATION REGISTER cycle time PDF: 09005aef846aeada tn1210_128_parameter_uniform_migration.pdf - Rev. B 6/11 EN 8 4 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-12-10: Migrating N25Q 3V, 128Mb Device AC Characteristics Table 9: AC Characteristics (Continued) Note 1 applies to entire table Parameter WRITE VOLATILE ENHANCED CONFIGURATION REGISTER cycle time Notes: Symbol Min Typ3 Max Unit tWRVECR – 40 – ns Notes 1. Both the parameter blocks and uniform subsector erase devices share all but the following specifications: 2. 3. 4. 5. 6. 7. • For the uniform subsector erase device, tW = 8ms (MAX); for the parameter blocks device, tW = 15ms (MAX). • For the uniform subsector erase device, tWNVCR = 0.2s (TYP) and 3s (MAX); for the parameter blocks device, tWNVCR = 1s (TYP) and 15s (MAX). • For the uniform subsector erase device, VPPH can be applied to W/VPP during a BULK ERASE operation. (This operation is not supported in the parameter blocks device. See Note 7.) tCH + tCL must be greater than or equal to 1/fC. Typical values given for TA = 25°C. Value guaranteed by characterization; not 100% tested in production. Expressed as a slew rate. Only applicable as a constraint for a WRITE STATUS REGISTER command when the status register write disable bit is set to 1. VPPH should be kept at a valid level until the PROGRAM or ERASE operation has completed and its result (success or failure) is known. PDF: 09005aef846aeada tn1210_128_parameter_uniform_migration.pdf - Rev. B 6/11 EN 9 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-12-10: Migrating N25Q 3V, 128Mb Device Program and Erase Specifications Program and Erase Specifications Table 10: Program and Erase Specifications Typical values given for TA = 25°C Parameter Blocks Device Parameter Uniform Subsector Erase Device Symbol Typ Max Typ Max Unit Notes tPP Int (n/8) x 0.025 5 Int (n/8) x 0.015 5 ms 1, 2 0.2 – 0.2 – ms 150 500 200 2000 ms PAGE PROGRAM cycle time (n bytes) PROGRAM OTP cycle time (64 bytes) tSSE SUBSECTOR ERASE cycle time SECTOR ERASE cycle time tSE 1 3 0.7 3 s Sector erase, VPP = VPPH tSE N/A N/A 0.6 3 s BULK ERASE cycle time tBE 256 700 170 250 s Bulk erase, VPP = VPPH tBE N/A N/A 160 250 s Notes: 3 3 1. When using the PAGE PROGRAM command to program consecutive bytes, optimized timings are obtained with one sequence including all the bytes versus several sequences of only a few bytes (1< n < 256). 2. Int (A) corresponds to the upper integer part of A. For example, int (12/8) = 2, int (32/8) = 4, int (15.3) = 16. 3. On the parameter blocks device, VPPH cannot be applied to W/VPP during sector erase and bulk erase. Device Identification Manufacturer identification is assigned by JEDEC. The device identification is assigned by the manufacturer and indicates the memory type in the first byte and the memory capacity in the second byte. Device identification is the same for both the parameter blocks and uniform subsector erase devices, and command 9Fh is used to read manufacturer ID and memory type codes in both devices. N25Q has a unique ID composed of 17 read-only bytes, which contain the following data: • The first byte is set to 10h. • The next two bytes of extended device ID specify device configuration (uniform architecture, and hold or reset functionality). • For the parameter blocks device, the next 14 bytes contain optional customized factory data. The customized factory data bytes are factory programmed with customer data upon request or set to 00h. The uniform subsector erase device is already preprogrammed with an unique ID on all versions. Table 11: Read Identification Summary Parameter Parameter Blocks and Uniform Subsector Erase Devices Manufacturer ID 20h Device ID PDF: 09005aef846aeada tn1210_128_parameter_uniform_migration.pdf - Rev. B 6/11 EN 10 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-12-10: Migrating N25Q 3V, 128Mb Device Conclusion Table 11: Read Identification Summary (Continued) Parameter Parameter Blocks and Uniform Subsector Erase Devices Memory type BAh Memory capacity 18h Extended device ID + customized factory data length 10h 10h Extended device ID 2 bytes 2 bytes Customized factory data 14 bytes 14 bytes Unique ID Note: 1. The uniform subsector erase device supports the Serial Flash Discovery Parameter Data Structure table (see device data sheet). Table 12: Extended Device ID, First Byte Bottom and top (Bit 1 and Bit 0) refer to the parameter blocks devices Bit 7 Bit 6 Bit 5 Bit 4 Reserved Reserved Reserved Volatile configuration register, XIP bit setting: 0 = Required 1 = Not required Bit 3 Bit 2 HOLD/RESET function: 0 = HOLD 1 = RESET Addressing: 0 = by byte Bit 1 Bit 0 Architecture: 00 = Uniform 01 = Bottom 11 = Top Conclusion Contrasting the key differences between Micron's N25Q128_3V parameter blocks and uniform subsector erase serial NOR Flash memory devices enables users to migrate applications smoothly from the parameter blocks device to the uniform subsector erase device. Contact your local representative for additional information. PDF: 09005aef846aeada tn1210_128_parameter_uniform_migration.pdf - Rev. B 6/11 EN 11 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. TN-12-10: Migrating N25Q 3V, 128Mb Device Revision History Revision History Rev. B – 6/11 • Updated nomenclature Rev. A – 5/11 • Initial release 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 www.micron.com/productsupport Customer Comment Line: 800-932-4992 Micron and the Micron logo are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective owners. PDF: 09005aef846aeada tn1210_128_parameter_uniform_migration.pdf - Rev. B 6/11 EN 12 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved.