H5N5006LD, H5N5006LS, H5N5006LM Silicon N Channel MOS FET High Speed Power Switching REJ03G1115-0100 (Previous: ADE-208-1549) Rev.1.00 Apr 07, 2006 Features • • • • • Low on-resistance Low leakage current High speed switching Low gate charge Avalanche ratings Outline RENESAS Package code: PRSS0004AE-A (Package name: LDPAK (L) ) RENESAS Package code: PRSS0004AE-B (Package name: LDPAK (S)-(1) ) 4 4 1 1 2 1. Gate 2. Drain 3. Source 4. Drain 2 3 3 H5N5006LD H5N5006LS D RENESAS Package code: PRSS0004AE-C (Package name: LDPAK (S)-(2) ) 4 G 1 2 3 H5N5006LM Rev.1.00 Apr 07, 2006 page 1 of 7 S H5N5006LD, H5N5006LS, H5N5006LM Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Symbol VDSS Ratings 500 Unit V VGSS ID ±30 3.5 V A 14 3.5 A A IAP Note 2 Pch 3.5 50 A W θ ch-c Tch 2.5 150 °C/W °C Tstg –55 to +150 °C Note 1 Drain peak current Body to drain diode reverse drain current ID (pulse) IDR Note 3 Avalanche current Channel dissipation Channel to case Thermal Impedance Channel temperature Storage temperature Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at Tc = 25°C 3. Tch ≤ 150°C Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit V (BR) DSS IGSS 500 — — — — ±0.1 V µA ID = 10 mA, VGS = 0 VGS = ±30 V, VDS = 0 Zero gate voltage drain current Gate to source cutoff voltage IDSS VGS (off) — 3.0 — — 1 4.5 µA V VDS = 500 V, VGS = 0 ID = 1 mA, VDS = 10 V Static drain to source on state resistance Forward transfer admittance RDS (on) |yfs| — 1.8 2.5 3.0 3.0 — Ω S ID = 1.75 A, VGS = 10 V Note 4 ID = 1.75 A, VDS = 10 V Input capacitance Output capacitance Ciss Coss — — 365 35 — — pF pF Reverse transfer capacitance Turn-on delay time Crss td (on) — — 8 20 — — pF ns VDS = 25 V VGS = 0 f = 1 MHz tr 13 48 — — ns ns Drain to source breakdown voltage Gate to source leak current Rise time Turn-off delay time td (off) — — Fall time Total gate charge tf Qg — — 14 14 — — ns nC Gate to source charge Gate to drain charge Qgs Qgd — — 2 8 — — nC nC Body to drain diode forward voltage Body to drain diode reverse recovery time VDF trr — — 0.85 280 1.3 — V ns Body to drain diode reverse recovery charge Note: 4. Pulse test Qrr — 0.8 — µC Rev.1.00 Apr 07, 2006 page 2 of 7 Test Conditions Note 4 VDD ≅ 250 V, ID = 1.75 A RL = 143 Ω VGS = 10 V Rg = 10 Ω VDD = 400 V VGS = 10 V ID = 3.5 A IF = 3.5 A, VGS = 0 IF = 3.5 A, VGS = 0 diF/dt = 100 A/µs H5N5006LD, H5N5006LS, H5N5006LM Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area (A) 40 20 0 0 50 100 1 Case Temperature 0.1 Tc (°C) 10 30 100 300 1000 VDS (V) Typical Transfer Characteristics 5 5 Pulse Test 10 V VDS = 10 V Pulse Test ID (A) 8V ID (A) 3 Drain to Source Voltage Typical Output Characteristics 4 6V 3 4 3 Drain Current Drain Current µs µs Operation in this area is limited by RDS (on) 0.01 Ta = 25°C 0.005 0.1 0.3 1 200 150 10 0 PW = 10 ms (1shot) ID 60 10 10 Drain Current Channel Dissipation 50 n s m tio 1 ra pe C O 5° C 2 D c= T Pch (W) 80 5.5 V 2 1 5V 2 Tc = 75°C 25°C 1 –25°C VGS = 4.5 V 0 0 0 4 8 12 Drain to Source Voltage 16 20 0 VDS (V) 16 12 ID = 3 A 8 2A 4 1A 0 0 4 8 12 Gate to Source Voltage Rev.1.00 Apr 07, 2006 page 3 of 7 16 20 VGS (V) 6 8 10 VGS (V) Static Drain to Source on State Resistance vs. Drain Current Drain to Source On State Resistance RDS(on) (Ω) Drain to Source Saturation Voltage VDS(on) (V) Pulse Test 4 Gate to Source Voltage Drain to Source Saturation Voltage vs. Gate to Source Voltage 20 2 10 5 Pulse Test VGS = 10 V, 15 V 2 1 0.5 0.2 0.1 0.1 0.2 0.5 1 Drain Current 2 ID (A) 5 10 Static Drain to Source on State Resistance vs. Temperature Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS(on) (Ω) H5N5006LD, H5N5006LS, H5N5006LM 10 Pulse Test VGS = 10 V 8 ID = 3 A 6 4 2A 2 1A 0 –40 0 40 80 120 Case Temperature Tc 160 10 5 Tc = –25°C 2 25°C 1 75°C 0.5 0.2 VDS = 10 V Pulse Test 0.1 0.1 Capacitance C (pF) Reverse Recovery Time trr (ns) 200 100 50 20 di / dt = 100 A / µs VGS = 0, Ta = 25°C 200 100 50 10 Crss 5 VGS = 0 f = 1 MHz 2 0.5 1 2 5 10 0 VDS 12 400 8 200 4 VDD = 400 V 250 V 100 V 0 8 16 Gate Charge Rev.1.00 Apr 07, 2006 page 4 of 7 24 0 32 Qg (nc) 150 200 250 40 1000 Switching Time t (ns) VDD = 100 V 250 V 400 V VGS (V) 16 Gate to Source Voltage VGS 600 100 Switching Characteristics 20 ID = 3.5 A 50 Drain to Source Voltage VDS (V) IDR (A) Dynamic Input Characteristics 0 Coss 20 1 0.2 Reverse Drain Current (V) 10 Ciss 500 500 VDS 5 1000 10 0.1 Drain to Source Voltage 2 Typical Capacitance vs. Drain to Source Voltage 1000 800 1 Drain Current ID (A) (°C) Body to Drain Diode Reverse Recovery Time 1000 0.5 0.2 300 tf 100 30 td(off) td(on) 10 3 1 0.1 0.2 tr VGS = 10 V, VDD = 250 V RW = 5 µs, duty ≤ 1 % Rg = 10 Ω 0.5 1 2 Drain Current 5 ID (A) 10 20 H5N5006LD, H5N5006LS, H5N5006LM Reverse Drain Current vs. Souece to Drain Voltage Gate to Source Cutoff Voltage vs. Case Temperature 5 Gate to Source Cutoff Voltage VGS (off) (V) Reverse Drain Current IDR (A) 5 4 3 2 VGS = 0 5 V, 10 V 1 ID = 10 mA 4 3 1 mA 0.1 mA 2 1 VDS = 10 V Pulse Test 0 0 0.4 0.8 1.2 2.0 1.6 Source to Drain Voltage 0 –50 VSD (V) 0 50 100 Case Temperature 200 150 Tc (°C) Normalized Transient Thermal Impedance γ s (t) Normalized Transient Thermal Impedance vs. Pulse Width 3 Tc = 25°C 1 D=1 0.5 0.3 0.2 0.1 θch – c (t) = γ s (t) • θch – c θch – c = 2.5°C/W, Tc = 25°C 0.1 0.05 0.03 PDM 0.02 0.0 1 1s t ho pu 0.01 10 µ D= lse PW T PW T 100 µ 1m 10 m 100 m 1 10 Pulse Width PW (S) Switching Time Test Circuit 90% Vout Monitor Vin Monitor 10 Ω Switching Time Waveform D.U.T. Vin Vout Vin 10 V VDD = 250 V 10% 10% 90% td(on) Rev.1.00 Apr 07, 2006 page 5 of 7 10% RL tr 90% td(off) tf H5N5006LD, H5N5006LS, H5N5006LM Package Dimensions RENESAS Code PRSS0004AE-A MASS[Typ.] 1.40g 4.44 ± 0.2 1.3 ± 0.15 1.3 ± 0.2 1.37 ± 0.2 0.76 ± 0.1 2.54 ± 0.5 2.54 ± 0.5 JEITA Package Code SC-83 RENESAS Code PRSS0004AE-B 2.49 ± 0.2 11.0 ± 0.5 0.2 0.86 +– 0.1 Package Name LDPAK(S)-(1) Unit: mm 10.2 ± 0.3 8.6 ± 0.3 11.3 ± 0.5 0.3 10.0 +– 0.5 Previous Code LDPAK(L) / LDPAK(L)V Previous Code LDPAK(S)-(1) / LDPAK(S)-(1)V 0.4 ± 0.1 MASS[Typ.] 1.30g (1.5) 10.0 Rev.1.00 Apr 07, 2006 page 6 of 7 2.54 ± 0.5 0.4 ± 0.1 0.3 3.0 +– 0.5 2.54 ± 0.5 0.2 0.86 +– 0.1 7.8 7.0 2.49 ± 0.2 0.2 0.1 +– 0.1 1.37 ± 0.2 1.3 ± 0.2 7.8 6.6 1.3 ± 0.15 + 0.3 – 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 Unit: mm 1.7 JEITA Package Code (1.4) Package Name LDPAK(L) 2.2 H5N5006LD, H5N5006LS, H5N5006LM JEITA Package Code RENESAS Code PRSS0004AE-C Previous Code LDPAK(S)-(2) / LDPAK(S)-(2)V MASS[Typ.] 1.35g 7.8 6.6 (2.3) 10.0 2.49 ± 0.2 7.8 7.0 1.3 ± 0.15 + 0.3 – 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 Unit: mm 1.7 Package Name LDPAK(S)-(2) 0.2 0.1 +– 0.1 2.2 1.37 ± 0.2 2.54 ± 0.5 0.2 0.86 +– 0.1 2.54 ± 0.5 0.4 ± 0.1 0.3 5.0 +– 0.5 1.3 ± 0.2 Ordering Information Part Name Quantity Shipping Container H5N5006LD-E H5N5006LSTL-E 500 pcs 1000 pcs Box (Conductive Sack) Taping H5N5006LMTL-E 1000 pcs Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.1.00 Apr 07, 2006 page 7 of 7 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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