Standard Products UT54LVDM031LV Low Voltage Bus-LVDS Quad Driver Data Sheet February 25, 2011 www.aeroflex.com/LVDS INTRODUCTION FEATURES The UT54LVDM031LV Quad Bus-LVDS Driver is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 400.0 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology. >400.0 Mbps (200 MHz) switching rates +340mV nominal differential signaling 3.3 V power supply TTL compatible inputs 10mA output drivers Cold sparing all pins Ultra low power CMOS technology 3.0ns maximum, propagation delay 0.4ns maximum, differential skew Operational environment; total dose irradiation testing to MIL-STD-883 Method 1019 - Total-dose: 300 krad(Si) - Latchup immune (LET > 100 MeV-cm2/mg) Packaging options: - 16-lead flatpack (dual in-line) Standard Microcircuit Drawing 5962-06201 - QML Q and V compliant part The UT54LVDM031LV accepts low voltage TTL input levels and translates them to low voltage (340mV) differential output signals. In addition, the driver supports a three-state function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state. The UT54LVDM031LV and companion quad line receiver UT54LVDS032LV provide new alternatives to high power pseudo-ECL devices for high speed point-to-point interface applications. All pins have Cold Spare buffers. These buffers will be high impedance when VDD is tied to VSS. DOUT1+ DIN1 D1 DOUT1DOUT2+ DIN2 D2 DOUT2DOUT3+ DIN3 D3 DOUT3DOUT4+ DIN4 D4 DOUT4- EN EN Figure 1. UT54LVDM031LV Bus-LVDS Quad Driver Block Diagram 1 APPLICATIONS INFORMATION DIN1 1 16 DOUT1+ 2 3 15 DIN4 14 DOUT4+ DOUT4EN DOUT1- 4 5 EN UT54LVDM031LV Driver VDD DOUT2+ 6 13 12 11 DIN2 7 10 DOUT3+ VSS 8 9 DIN3 DOUT2- The UT54LVDM031LV Bus-LVDS driver’s intended use is for both point-to-point (single termination) and multipoint (double termination) data transmissions over controlled impedance media. The transmission media may be printed-circuit board traces, backplanes, or cables. Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other application specific characteristics. DOUT3- ENABLE DATA INPUT Figure 2. UT54LVDM031LV Pinout 1/4 UT54LVDS032LV RT 35 + - DATA OUTPUT 1/4 UT54LVDM031LV Figure 3. Point-to-Point Application TRUTH TABLE Enables Input EN EN DIN DOUT+ DOUT- L H X Z Z L L H H H L All other combinations of ENABLE inputs The UT54LVDM031LV differential line driver is a balanced current source design. A current mode driver, has a high output impedance and supplies a constant current for a range of loads (a voltage mode driver on the other hand supplies a constant voltage for a range of loads). Current is switched through the load in one direction to produce a logic state and in the other direction to produce the other logic state. The current mode requires (as discussed above) that a resistive termination be employed to terminate the signal and to complete the loop as shown in Figure 3. AC or unterminated configurations are not allowed. The 10mA loop current will develop a differential voltage of 350mV across the 35 termination resistor which the receiver detects with a 250mV minimum differential noise margin neglecting resistive line losses (driven signal minus receiver threshold (340mV 100mV = 250mV)). The signal is centered around +1.2V (Driver Offset, VOS) with respect to ground as shown in Figure 4. Note: The steady-state voltage (VSS) peak-to-peak swing is twice the differential voltage (VOD) and is typically 700mV. Output PIN DESCRIPTION Pin No. Name Description 1, 7, 9, 15 DIN Driver input pin, TTL/CMOS compatible 2, 6, 10, 14 DOUT+ Non-inverting driver output pin, LVDS levels 3, 5, 11, 13 DOUT- Inverting driver output pin, LVDS levels 4 EN Active high enable pin, OR-ed with EN 12 EN Active low enable pin, OR-ed with EN 16 VDD Power supply pin, +3.3V + 0.3V 8 VSS Ground pin 2 The current mode driver provides substantial benefits over voltage mode drivers, such as an RS-422 driver. Its quiescent current remains relatively flat versus switching frequency. Whereas the RS-422 voltage mode driver increases exponentially in most cases between 20 MHz - 50 MHz. This is due to the overlap current that flows between the rails of the device when the internal gates switch. Whereas the current mode driver switches a fixed current between its output without any substantial overlap current. This is similar to some ECL and PECL devices, but without the heavy static ICC requirements of the ECL/PECL design. LVDS requires 80% less current than similar PECL devices. AC specifications for the driver are a tenfold improvement over other existing RS-422 drivers. 3V DIN 0V DOUT- VOH VOS V0D SINGLE-ENDED VOL DOUT+ +VOD 0V (DIFF.) 0V VSS -VOD The Three-State function allows the driver outputs to be disabled, thus obtaining an even lower power state when the transmission of data is not required. DOUT+ - DOUTDIFFERENTIAL OUTPUT Note: The footprint of the UT54LVDM031LV is the same as the industry standard Quad Differential (RS-422) Driver. Figure 4. Bus-LVDS Driver Output ABSOLUTE MAXIMUM RATINGS1 (Referenced to VSS) SYMBOL PARAMETER LIMITS VDD DC supply voltage VI/O Voltage on any pin during operation -0.3 to (VDD + 0.3V) Voltage on any pin during cold spare -.3 to 4.0V TSTG -0.3 to 4.0V Storage temperature -65 to +150C PD Maximum power dissipation 1.25 W TJ Maximum junction temperature2 +150C Thermal resistance, junction-to-case3 10C/W DC input current ±10mA JC II Notes: 1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond limits indicated in the operational sections of this specification is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability and performance. 2. Maximum junction temperature may be increased to +175C during burn-in and life test. 3. Test per MIL-STD-883, Method 1012. RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMITS VDD Positive supply voltage 3.0 to 3.6V TC Case temperature range -55 to +125C VIN DC input voltage 0V to VDD 3 DC ELECTRICAL CHARACTERISTICS1, 2 (VDD = 3.3V + 0.3V; -55C < TC < +125C) SYMBOL PARAMETER CONDITION MIN MAX UNIT VIH High-level input voltage (TTL) 2.0 VDD V VIL Low-level input voltage (TTL) VSS 0.8 V VOL Low-level output voltage RL = 35 VOH High-level output voltage RL = 35 IIN Input leakage current VIN = VDD or GND, VDD = 3.6V ICS Cold Spare Leakage Current VOD1 0.855 V 1.750 V -10 +10 A VIN=3.6V, VDD=VSS -20 +20 Differential Output Voltage RL = 35(figure 5) 250 400 mV Change in Magnitude of VOD for Complementary Output States RL = 35(figure 5) 35 mV Offset Voltage + VOL RL = 35, VOS = VOH --------------------------------- 1.550 V VOS Change in Magnitude of VOS for Complementary Output States RL = 35(figure 5) 35 mV VCL3 Input clamp voltage ICL = +18mA -1.5 V IOS2, 3 Output Short Circuit Current VIN = VDD, VOUT+ = 0V or VIN = GND, VOUT- = 0V 45 mA IOZ3 Output Three-State Current EN = 0.8V and EN = 2.0 V, VOUT = 0V or VDD, VDD = 3.6V +10 ICCL3 Loaded supply current, drivers enabled RL = 35 all channels VIN = VDD or VSS(all inputs) ICCZ3 Loaded supply current, drivers disabled DIN = VDD or VSS EN = VSS, EN = VDD VOD1 VOS 2 1.055 -10 mA 60.0 mA 6.0 Notes: 1. Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except differential voltages. 2. Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only. 3. Guaranteed by characterization. 4 DOUT+ 40pF DIN D Generator RL = 35 50 Driver Enabled 40pF DOUT- Figure 5. Driver VOD and VOS Test Circuit or Equivalent Circuit 5 VOD AC SWITCHING CHARACTERISTICS1, 2, 3 (VDD = +3.3V + 0.3V, TA = -55 C to +125 C) SYMBOL PARAMETER MIN MAX UNIT tPHLD6 Differential Propagation Delay High to Low (figures 6 and 7) 0.5 1.8 ns tPLHD6 Differential Propagation Delay Low to High (figures 6 and 7) 0.5 1.8 ns tSKD Differential Skew (tPHLD - tPLHD) (figures 6 and 7) 0 0.4 ns tSK1 Channel-to-Channel Skew1 (figures 6 and 7) 0 0.5 ns tSK25 Chip-to-Chip Skew (figure 6 and 7) 1.3 ns tTLH4 Rise Time (figures 6 and 7) 1.5 ns tTHL4 Fall Time (figures 6 and 7) 1.5 ns tPHZ Disable Time High to Z (figures 8 and 9) 5.0 ns tPLZ Disable Time Low to Z (figures 8 and 9) 5.0 ns tPZH Enable Time Z to High (figures 8 and 9) 7.0 ns tPZL Enable Time Z to Low (figures 8 and 9) 7.0 ns Notes: 1. Channel-to-Channel Skew is defined as the difference between the propagation delay of the channel and the other channels in the same chip with an event on the inputs. 2. Generator waveform for all tests unless otherwise specified: f = 1 MHz, ZO = 50, tr < 1ns, and tf < 1ns. 3. CL includes probe and jig capacitance. 4. Guaranteed by characterization 5. Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays. 6. May be tested at higher load capacitance and the limit interpolated from characterization data to guarantee this parameter. 6 DOUT+ 40pF DIN D Generator RL = 35 50 Driver Enabled 40pF DOUT- Figure 6. Driver Propagation Delay and Transition Time Test Circuit or Equivalent Circuit VDD VDD/2 DIN DOUT- VDD/2 tPLHD 0V tPHLD VOH 0V (Differential) VOL DOUT+ 80% 80% VDIFF = DOUT+ - DOUT- 0V 0V VDIFF 20% 20% tTHL tTLH Figure 7. Driver Propagation Delay and Transition Time Waveforms 7 DOUT+ 40pF VDD 17.5 DIN D VSS 17.5 EN DOUT- 40pF Generator 50 EN Figure 8. Driver Three-State Delay Test Circuit or Equivalent Circuit EN when EN = VDD 50% VDD 50% 0V or VDD 50% 50% EN when EN = VSS DOUT+ when DIN =VDD DOUT- when DIN = VSS 0V tPHZ tPZH VOH 50% 50% VOS VOS 50% 50% DOUT+ when DIN = VSS DOUT- when DIN = VDD VOL tPZL tPLZ Figure 9. Driver Three-State Delay Waveform 8 PACKAGING Notes: 1. All exposed metalized areas are gold plated over electroplated nickel per MIL-PRF-38535. 2. The lid is electrically connected to VSS. 3. Lead finishes are in accordance to MIL-PRF-38535. 4. Package dimensions and symbols are similar to MIL-STD-1835 variation F-5A. 5. Lead position and coplanarity are not measured. 6. ID mark symbol is vendor option. 7. With solder, increase maximum by 0.003. Figure 10. 16-pin Ceramic Flatpack 9 ORDERING INFORMATION UT54LVDM031LV BUS-LVDS QUAD DRIVER: UT 54LVDM031LV - * * * * * Lead Finish: (A) = Hot solder dipped (C) = Gold (X) = Factory option (gold or solder) Screening: (C) = HiRel Range flow (P) = Prototype flow Package Type: (U) = 16-lead Flatpack (dual-in-line) Access Time: Not applicable Device Type: UT54LVDM031LV Bus-LVDS Driver Notes: 1. Lead finish (A,C, or X) must be specified. 2. If an “X” is specified when ordering, then the part marking will match the lead finish and will be either “A” (solder) or “C” (gold). 3. Prototype flow per Aeroflex Colorado Springs Manufacturing Flows Document. Tested at 25C only. Lead finish is GOLD ONLY. Radiation neither tested nor guaranteed. 4. HiRel Temperature Range flow per Aeroflex Colorado Springs Manufacturing Flows Document. Devices are tested at -55C, room temp, and 125C. Radiation neither tested nor guaranteed. 10 UT54LVDM031LV QUAD BUS-LVDS DRIVER: SMD 5962 -06201 ** * * * Lead Finish: (A) = Hot solder dipped (C) = Gold (X) = Factory Option (gold or solder) Case Outline: (X) = 16 lead Flatpack (dual-in-line) Class Designator: (Q) = QML Class Q (V) = QML Class V Device Type 01 LVDS Driver 100 krad(Si) 300 krad(Si) Drawing Number: 5962-06201 Total Dose (R) = 1E5 rad(Si) (F) = 3E5 rad(Si) Federal Stock Class Designator: No Options Notes: 1.Lead finish (A,C, or X) must be specified. 2.If an “X” is specified when ordering, part marking will match the lead finish and will be either “A” (solder) or “C” (gold). 3.Total dose radiation must be specified when ordering. QML Q and QML V not available without radiation hardening. 11 Aeroflex Colorado Springs - Datasheet Definition Advanced Datasheet - Product In Development Preliminary Datasheet - Shipping Prototype Datasheet - Shipping QML & Reduced Hi-Rel COLORADO Toll Free: 800-645-8862 Fax: 719-594-8468 INTERNATIONAL Tel: 805-778-9229 Fax: 805-778-1980 NORTHEAST Tel: 603-888-3975 Fax: 603-888-4585 SE AND MID-ATLANTIC Tel: 321-951-4164 Fax: 321-951-4254 WEST COAST Tel: 949-362-2260 Fax: 949-362-2266 CENTRAL Tel: 719-594-8017 Fax: 719-594-8468 www.aeroflex.com [email protected] Aeroflex Colorado Springs, Inc. reserves the right to make changes to any products and services herein at any time without notice. Consult Aeroflex or an authorized sales representative to verify that the information in this data sheet is current before using this product. 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