IRFR9110, IRFU9110 Data Sheet 3.1A, 100V, 1.200 Ohm, P-Channel Power MOSFETs These are advanced power MOSFETs designed, tested, and guaranteed to withstand a specific level of energy in the avalanche breakdown mode of operation. These are P-Channel enhancement mode silicon gate power field-effect transistors designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. July 1999 4001.3 Features • 3.1A, 100V • rDS(ON) = 1.200Ω • Temperature Compensating PSPICE™ Model • Peak Current vs Pulse Width Curve • UIS Rating Curve • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Symbol Formerly developmental type TA17541. D Ordering Information PART NUMBER File Number PACKAGE BRAND IRFR9110 TO-252AA IF9110 IRFU9110 TO-251AA IF9110 G S NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-252AA variant in the tape and reel, i.e., IRFR91109A. Packaging JEDEC TO-251AA SOURCE DRAIN GATE JEDEC TO-252AA GATE SOURCE DRAIN (FLANGE) DRAIN (FLANGE) 4-77 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 IRFR9110, IRFU9110 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Single Pulse Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg IRFR9110, IRFU9110 -100 -100 ±20 3.1 Refer to Peak Current Curve Refer to UIS Curve 25 0.2 -55 to 150 UNITS V V V A 300 260 oC oC W W/oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS -100 - - V -2.0 - -4.0 V - - -1 µA - - -50 µA VGS = ±20V - - 100 nA Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA Zero Gate Voltage Drain Current Gate to Source Leakage Current IDSS IGSS VDS = -100V, VGS = 0V TC = 25oC TC = 150oC On Resistance rDS(ON) ID = 1.9A, VGS = -10V - - 1.200 Ω Turn-On Time tON VDD = -50V, ID = 4A RL = 11Ω, VGS = -10V RGS = 24Ω - - 50 ns - 10 - ns tr - 27 - ns td(OFF) - 15 - ns tf - 17 - ns tOFF - - 50 ns - - 8.7 nC - - 4.1 nC - - 2.2 nC - 290 - pF - 94 - pF - 18 - pF Turn-On Delay Time td(ON) Rise Time Turn-Off Delay Time Fall Time Turn-Off Time Total Gate Charge Qg Gate to Drain Charge Qgd Gate to Source Charge Qgs Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS VGS = 0 to -10V VDD = -80V, ID = 3.1A, RL = 25.8Ω VDS = -25V, VGS = 0V f = 1MHz Thermal Resistance Junction to Case RθJC - - 5.00 oC/W Thermal Resistance Junction to Ambient RθJA - - 100 oC/W MIN TYP MAX UNITS ISD = -3.1A - - -5.5 V ISD = -4.0A, dISD/dt = -100A/µs - 105 160 ns 0.51 1.0 µC Source to Drain Diode Ratings and Specifications PARAMETER Source to Drain Diode Voltage Reverse Recovery Time SYMBOL VSD trr Reverse Recovery Charge QRR 4-78 TEST CONDITIONS IRFR9110, IRFU9110 Typical Performance Curves Unless Otherwise Specified -3.5 -3.0 1.0 ID , DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.2 0.8 0.6 0.4 0.2 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0 0 25 50 75 100 TC , CASE TEMPERATURE (oC) 125 25 150 50 75 100 125 150 TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 10 ZθJC , TRANSIENT THERMAL IMPEDANCE 0.5 1 0.2 0.1 0.1 PDM 0.05 0.02 0.01 t1 t2 SINGLE PULSE 0.01 10-5 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC + TC 10-4 10-3 10-2 10-1 100 101 t 1, RECTANGULAR PULSE DURATION (s) FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE -30 TC = 25oC, TJ = MAX RATED ID , DRAIN CURRENT (A) -10 100µs 1ms -1 10ms OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) -0.1 -1 100ms DC VDSS MAX = -100V -10 -100 VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA 4-79 IDM , PEAK CURRENT CAPABILITY (A) -20 VGS = -20V FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT CAPABILITY AS FOLLOWS: 150 – T C I = I 25 ----------------------- 125 -10 VGS = -10V TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION -1 10-5 10-4 10-3 10-2 10-1 t, PULSE WIDTH (s) TC = 25oC 100 FIGURE 5. PEAK CURRENT CAPABILITY 101 IRFR9110, IRFU9110 -10 EAS = 140mJ CONDITIONS: VDD = -25V, IAS = -3.1A, L = 21mH, STARTING TJ = 25oC -7.75 IAS , AVALANCHE CURRENT (A) Unless Otherwise Specified (Continued) STARTING TJ = 25oC STARTING TJ = 150oC If R = 0 tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD) If R ≠ 0 tAV = (L/R) In [(IAS * R) / (1.3 RATED BVDSS - VDD +1] -1 0.01 -6 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX TC = 25oC -5 ID, DRAIN CURRENT (A) Typical Performance Curves VGS = -8V VGS = -20V -4 -3 VGS = -7V -2 VGS = -6V 0 10 0 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID(ON), ON STATE DRAIN CURRENT (A) -6 25oC -4 150oC -2 -4 -6 -8 -10 1.0 0.5 0 40 80 120 160 FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE 2.0 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = -10V, ID = -3.1A 1.5 1.0 THRESHOLD VOLTAGE VGS = VDS , ID = -250µA NORMALIZED GATE NORMALIZED DRAIN TO SOURCE ON RESISTANCE -40 TJ, JUNCTION TEMPERATURE (oC) FIGURE 8. TRANSFER CHARACTERISTICS 2.0 -10 1.5 VGS, GATE TO SOURCE VOLTAGE (V) 2.5 -8 VGS = VDS , ID = -250µA 0.0 -80 0 -2 -6 2.0 -55oC 0 -4 FIGURE 7. SATURATION CHARACTERISTICS PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDD = -15V -8 -2 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING -10 VGS = -5V VGS = -4.5V -1 0.1 1 TAV, TIME IN AVALANCHE (ms) VGS = -10V 1.5 1.0 0.5 0.5 0.0 -80 -40 0 40 80 120 TJ , JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 4-80 180 0.0 -80 -40 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (oC) FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE IRFR9110, IRFU9110 Typical Performance Curves Unless Otherwise Specified (Continued) VDS , DRAIN TO SOURCE VOLTAGE (V) CISS C, CAPACITANCE (pF) -10.0 -100 300 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 200 COSS 100 CRSS 0 0 -5 -10 -15 -20 VDD = BVDSS VDD = BVDSS -75 -7.5 RL = 32.2Ω IG(REF) = -1.45mA VGS = -10V -50 -5.0 0.75 BVDSS 0.75 BVDSS 0.50 BVDSS 0.50 BVDSS 0.25 BVDSS 0.25 BVDSS -25 0 -25 20 VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE IG(REF) t, TIME (µs) IG(ACT) -2.5 80 0.0 IG(REF) IG(ACT) NOTE: Refer to Application Notes AN7254 and AN7260. FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT Test Circuits and Waveforms VDS tAV L 0 VARY tP TO OBTAIN REQUIRED PEAK IAS - RG + 0V VGS VDD DUT VDD tP IAS IAS VDS tP 0.01Ω BVDSS FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(OFF) td(ON) tr 0 RL DUT VGS RG VDD + tf 10% 10% VDS VGS 0 90% 90% 10% 50% 50% PULSE WIDTH 90% FIGURE 16. SWITCHING TIME TEST CIRCUIT 4-81 FIGURE 17. RESISTIVE SWITCHING WAVEFORMS VGS , GATE TO SOURCE VOLTAGE (V) 400 IRFR9110, IRFU9110 PSPICE Electrical Model .SUBCKT IRFU9220 2 1 3 REV 9/6/94 CA 12 8 723e-12 CB 15 14 733e-12 CIN 6 8 517e-12 RLDRAIN DPLCAP 5 DRAIN 2 10 DBODY 5 7 DBDMOD DBREAK 5 11 DBKMOD DPLCAP 10 6 DPLCAPMOD LDRAIN RSCL2 EBREAK 7 11 17 18 -244.4 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 5 10 8 6 1 EVTO 20 6 8 18 1 ESG + RLGATE RGATE GATE 1 LDRAIN 2 5 1e-9 LGATE 1 9 2.609e-9 LSOURCE 3 7 2.609e-9 DBREAK ESCL 50 6 8 RDRAIN - - 18 20 8 9 5 51 EVTO + IT 8 17 1 RSCL1 + 51 16 VTO + 21 6 11 + EBREAK 17 18 MOS2 DBODY MOS1 LGATE RIN CIN RLSOURCE MOS1 16 6 8 8 MOSMOD M=0.99 MOS2 16 21 8 8 MOSMOD M=0.01 8 RSOURCE 7 3 SOURCE LSOURCE RBREAK 17 18 RBKMOD 1 RDRAIN 50 16 RDSMOD 1.194 RGATE 9 20 2.17 RIN 6 8 1e9 RLDRAIN 2 5 10 RLGATE 1 9 26.09 RLSOURCE 3 7 26.09 RSCL1 5 51 RSCLMOD 1e-6 RSCL2 5 50 1e3 RSOURCE 8 7 RDSMOD 90.1e-3 RVTO 18 19 RVTOMOD 1 S1A 12 S2A 13 8 S1B 14 13 13 15 17 RBREAK S2B 18 RVTO CB CA IT + 6 EGS 8 - + EDS - 14 5 8 19 - VBAT + S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 8 19 DC 1 VTO 21 6 -0.77 ESCL 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/4.6,6))} .MODEL DBDMOD D (IS=2.56e-14 RS=8.09e-2 TRS1=-2.45e-3 TRS2=-1.33e-5 CJO=4.21e-10 TT=1.17e-7) .MODEL DBKMOD D (RS=5.07 TRS1=-1.05e-3 TRS2=1.28e-5) .MODEL DPLCAPMOD D (CJO=170e-12 IS=1e-30 N=10) .MODEL MOSMOD PMOS (VTO=-3.58 KP=1.38 IS=1e-30 N=10 TOX=1 L=1u W=1u) .MODEL RBKMOD RES (TC1=1.1e-3 TC2=-2.73e-6) .MODEL RDSMOD RES (TC1=6.95e-3 TC2=2.23e-5) .MODEL RSCLMOD RES (TC1=2.40e-3 TC2=-1.5e-5) .MODEL RVTOMOD RES (TC1=-3.27e-3 TC2=-1.33e-6) .MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=5.29 VOFF=3.29) .MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=3.29 VOFF=5.29) .MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=0.1 VOFF=-4.9) .MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-4.9 VOFF=0.1) .ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; written by William J. Hepp and C. Frank Wheatley. 4-82 IRFR9110, IRFU9110 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. 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