Plastic Packages for Integrated Circuits Package Outline Drawing W7x8.56 56 BALL WAFER LEVEL CHIP SCALE PACKAGE (WLCSP 0.4mm Pitch) Rev 0, 7/13 X Y 2.400 3.110±0.030 H G 56x 0.265±0.035 F E 2.800 3.210±0.030 D 0.400 C B 0.205 A (4x) 0.10 1 PIN 1 (A1 CORNER) 2 3 4 5 6 7 0.355 0.400 TOP VIEW BOTTOM VIEW PACKAGE OUTLINE 0.05 Z Z SEATING PLANE 3 0.240 0.290 0.265±0.035 56x 0.10 M Z X Y 0.05 M Z 0.400 0.200±0.030 TYPICAL RECOMMENDED LAND PATTERN 0.500±0.050 SIDE VIEW NOTES: 1. 2. 3. 4. 5. Dimensions and tolerance per ASME Y 14.5M - 1994. Dimension is measured at the maximum bump diameter parallel to primary datum Z. Primary datum Z and seating plane are defined by the spherical crowns of the bump. Bump position designation per JESD 95-1, SPP-010. There shall be a minimum clearance of 0.10mm between the edge of the bump and the body edge. 1