PANASONIC PU7457

Power Transistor Arrays (F-MOS FETs)
PU7457
Silicon N-Channel Power F-MOS FET (with built-in zener diode)
■ Features
● High avalanche energy capacity
● High electrostatic breakdown voltage
● No secondary breakdown
● High breakdown voltage, large allowable power dissipation
● Allowing Low-voltage drive
unit: mm
4.4±0.5
● Contactless relay
● Diving circuit for a solenoid
● Driving circuit for a motor
● Control equipment
● Switching power supply
4.0±0.2
8.0
9.5±0.2
■ Applications
1.65±0.2
25.3±0.2
0.5±0.15
0.8±0.25
1.0±0.25
0.5±0.15
2.54±0.2
9✕2.54=22.86±0.25
C1.5±0.5
■ Absolute Maximum Ratings (TC = 25°C)
Parameter
Ratings
Unit
Drain to Source breakdown voltage
VDSS
100 ± 15
V
Gate to Source voltage
Drain current
Avalanche energy capacity
*
1
Symbol
VGSS
±20
V
DC
ID
±3
A
Pulse
IDP
Non repetition
EAS*
Allowable power
TC = 25°C
dissipation
Ta = 25°C
±9
A
22.5
mJ
15
PD
Channel temperature
Tch
150
°C
Storage temperature
Tstg
−55 to +150
°C
3
4
5
6
7
8
9 10
G: Gate
D: Drain
S: Source
10-Lead Plastic SIL Package
Internal Connection
3
W
3.5
2
5
4
7
6
9
8
2
1
10
L = 5mH, IL = 3A, 1 pulse
■ Electrical Characteristics (TC = 25°C)
Parameter
Symbol
Conditions
min
typ
max
Unit
Drain to Source cut-off current
IDSS
VDS = 80V, VGS = 0
10
µA
Gate to Source leakage current
IGSS
VGS = ±20V, VDS = 0
±10
µA
Drain to Source breakdown voltage
VDSS
ID = 1mA, VGS = 0
85
115
V
Gate threshold voltage
Vth
VDS = 10V, ID = 1mA
1
2.5
V
RDS(on)1
VGS = 10V, ID = 2A
300
450
mΩ
RDS(on)2
VGS = 4V, ID = 2A
400
600
mΩ
−1.6
V
Drain to Source ON-resistance
Forward transfer admittance
| Yfs |
VDS = 10V, ID = 2A
Diode forward voltage
VDSF
IDR = 3A, VGS = 0
Input capacitance (Common Source) Ciss
2.5
4
S
130
pF
160
pF
Reverse transfer capacitance (Common Source) Crss
25
pF
Turn-on time
ton
0.2
µs
Fall time
tf
0.3
µs
Turn-off time (delay time)
td(off)
1.5
µs
Output capacitance (Common Source)
Coss
VDS = 10V, VGS = 0, f = 1MHz
VGS = 10V, ID = 2A
VDD = 50V, RL = 25Ω
1
Power Transistor Arrays (F-MOS FETs)
PD  Ta
Area of safe operation (ASO)
100
EAS  Tj
t=100µs
ID
3
1ms
10ms
1
DC
100ms
0.3
0.1
0.03
0.01
25
(1) TC=Ta
(2) With a 50 × 50 × 2mm
Al heat sink
(3) Without heat sink
20
16
(1)
12
8
(2)
4
(3)
0
1
3
10
30
100
300
1000
0
Drain to source voltage VDS (V)
20
40
60
1
0.3
0.1
0.03
0.01
30
6
5
4
3
2
100
ID  VDS
4V
3.5V
4
3
3V
2
1
2.5V
15W
0
0
10
20
30
1
2
3
4
5
4
3
2
1
6
0
25
40
50
60
Drain to source voltage VDS (V)
50
75
100
125
150
Case temperature TC (˚C)
| Yfs |  ID
600
5
TC=25˚C
500
VGS=4V
400
300
10V
200
100
0
Forward transfer admittance |Yfs| (S)
Drain to source ON-resistance RDS(on) (Ω)
Drain current ID (A)
VGS=10V
150
5
RDS(on)  ID
7
125
VDS=10V
ID=1mA
Gate to source voltage VGS (V)
8
100
0
0
L-load (mH)
75
VDS=10V
TC=25˚C
0
5
50
Vth  TC
1
6
5
6
Gate threshold voltage Vth (V)
Drain current ID (A)
Avalanche current IAS (A)
22.5mJ
10
10
Junction temperature Tj (˚C)
ID
3
15
ID  VGS
7
1
20
0
25
80 100 120 140 160
8
TC=25˚C
3
ID=3A
Ambient temperature Ta (˚C)
IAS  L-load
10
2
Avalanche energy capacity EAS (mJ)
IDP
10
Allowable power dissipation PD (W)
24
Non repetitive pulse
TC=25˚C
30
Drain current ID (A)
PU7457
VDS=10V
TC=25˚C
4
3
2
1
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
Drain current ID (A)
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
Drain current ID (A)
Power Transistor Arrays (F-MOS FETs)
VDS, VGS  Qg
ton, tf, td(off)  ID
103
Coss
102
Ciss
Crss
10
1
ID=3A
TC=25˚C
70
20
40
60
80
100
Drain to source voltage VDS (V)
4.0
14
3.5
12
60
10
50
VDS=25V
8
40
50V
6
30
20
4
VGS
2
10
VDS
0
0
16
0
2
4
6
8
10
0
12
Gate charge amount Qg (nC)
Switching time ton,tf,td(off) (µs)
80
f=1MHz
TC=25˚C
Gate to source voltage VGS (V)
104
Drain to source voltage VDS (V)
Input capacitance (Common source), Output capacitance (Common source),
Reverse transfer capacitance (Common source) Ciss,Coss,Crss (pF)
Ciss, Coss, Crss  VDS
PU7457
VDD=50V
VGS=10V
TC=25˚C
3.0
2.5
2.0
1.5
td(off)
1.0
0.5
tf
ton
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
Drain current ID (A)
PZSM  tp
10000
Zener diode power PZSM (W)
3000
tp
1000
300
100
30
10
3
1
0.1
0.3
1
3
10
30
100
Pulse width tp (ms)
3