IRFB9N65A, SiHFB9N65A Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Low Gate Charge Qg Results in Simple Drive Requirement 650 RDS(on) () VGS = 10 V 0.93 Qg (Max.) (nC) 48 Qgs (nC) 12 Qgd (nC) 19 Configuration • Improved Gate, Avalanche and Dynamic dV/dt Ruggedness Available RoHS* COMPLIANT • Fully Characterized Capacitance and Avalanche Voltage and Current Single • Compliant to RoHS Directive 2002/95/EC D APPLICATIONS TO-220AB • Switch Mode Power Supply (SMPS) • Uninterruptible Power Supply G D G • High Speed Power Switching TYPICAL SMPS TOPOLOGIES S • Single Transistor Flyback S • Single Transistor Forward N-Channel MOSFET ORDERING INFORMATION Package TO-220AB IRFB9N65APbF SiHFB9N65A-E3 IRFB9N65A SiHFB9N65A Lead (Pb)-free SnPb ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 650 Gate-Source Voltage VGS ± 30 Continuous Drain Current VGS at 10 V TC = 25 °C TC = 100 °C Pulsed Drain Currenta ID IDM Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery TC = 25 °C dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque for 10 s 6-32 or M3 screw UNIT V 8.5 5.4 A 21 1.3 W/°C EAS 325 mJ IAR 5.2 A EAR 16 mJ PD 167 W dV/dt 2.8 V/ns TJ, Tstg - 55 to + 150 300d °C 10 lbf · in 1.1 N·m Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 °C, L = 24 mH, Rg = 25 , IAS = 5.2 A (see fig. 12). c. ISD 5.2 A, dI/dt 90 A/μs, VDD VDS, TJ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91104 S11-0561-Rev. C, 11-Apr-11 www.vishay.com 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFB9N65A, SiHFB9N65A Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 62 Case-to-Sink, Flat, Greased Surface RthCS 0.50 - Maximum Junction-to-Case (Drain) RthJC - 0.75 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS VDS VGS = 0 V, ID = 250 μA MIN. TYP. MAX. UNIT 650 - - V Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance VDS/TJ VGS(th) Reference to 25 °C, ID = 1 - 670 - mV/°C VDS = VGS, ID = 250 μA 2.0 - 4.0 V nA VGS = ± 30 V - - ± 100 VDS = 650 V, VGS = 0 V - - 25 VDS = 520 V, VGS = 0 V, TJ = 125 °C - - 250 - - 0.93 3.9 - - S - 1417 - - 177 - - 7.0 - VDS = 1.0 V, f = 1.0 MHz - 1912 - VDS = 520 V, f = 1.0 MHz - 48 - - 84 - - - 48 - - 12 - - 19 - 14 - - 20 - - 34 - - 18 - - - 5.2 - - 21 IGSS IDSS RDS(on) gfs mAd ID = 5.1 Ab VGS = 10 V VDS = 50 V, ID = 3.1 A μA Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Output Capacitance Coss Effective Output Capacitance Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Turn-On Delay Time td(on) Turn-Off Delay Time Fall Time VGS = 0 V Coss eff. Total Gate Charge Rise Time VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 tr td(off) VDS = 0 V to 520 VGS = 10 V Vc ID = 5.2 A, VDS = 400 V see fig. 6 and 13b VDD = 325 V, ID = 5.2 A Rg = 9.1 ,RD = 62 , see fig. 10b tf pF nC ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage IS ISM VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G TJ = 25 °C, IS = 5.2 A, VGS = 0 S Vb TJ = 25 °C, IF = 5.2 A, dI/dt = 100 A/μsb - - 1.5 V - 493 739 ns - 2.1 3.2 μC Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 μs; duty cycle 2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS. d. Uses SiHFIB5N65A data and test conditions. www.vishay.com 2 Document Number: 91104 S11-0561-Rev. C, 11-Apr-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFB9N65A, SiHFB9N65A Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 100 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP 10 1 20µs PULSE WIDTH 4.5V TJ = 25 °C 0.1 0.1 1 10 10 TJ = 150 ° C TJ = 25 ° C 1 0.1 4.0 100 VDS , Drain-to-Source Voltage (V) I D , Drain-to-Source Current (A) 10 4.5V 1 20µs PULSE WIDTH TJ = 150 ° C 10 VDS , Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics Document Number: 91104 S11-0561-Rev. C, 11-Apr-11 100 RDS(on) , Drain-to-Source On Resistance (Normalized) 3.0 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 1 6.0 7.0 8.0 9.0 Fig. 3 - Typical Transfer Characteristics TOP 0.1 5.0 VGS , Gate-to-Source Voltage (V) Fig. 1 - Typical Output Characteristics 100 V DS = 100V 20µs PULSE WIDTH ID = 5.2A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature ( °C) Fig. 4 - Normalized On-Resistance vs. Temperature www.vishay.com 3 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFB9N65A, SiHFB9N65A Vishay Siliconix 2000 ISD , Reverse Drain Current (A) 1600 C, Capacitance (pF) 100 V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd Ciss 1200 Coss 800 400 Crss 0 10 TJ = 150 ° C 1 TJ = 25 ° C 0.1 0.2 A 1 10 100 1000 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 0.6 0.8 1.0 1.2 Fig. 7 - Typical Source-Drain Diode Forward Voltage 100 ID = 5.2A OPERATION IN THIS AREA LIMITED BY RDS(on) VDS = 520V VDS = 325V VDS = 130V 16 10us ID , Drain Current (A) VGS , Gate-to-Source Voltage (V) 0.4 VSD ,Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V) 20 V GS = 0 V 12 8 10 100us 1ms 1 10ms 4 FOR TEST CIRCUIT SEE FIGURE 13 0 0 10 20 30 40 50 QG , Total Gate Charge (nC) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage www.vishay.com 4 0.1 TC = 25 ° C TJ = 150 ° C Single Pulse 10 100 1000 10000 VDS , Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area Document Number: 91104 S11-0561-Rev. C, 11-Apr-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFB9N65A, SiHFB9N65A Vishay Siliconix RD VDS 10.0 VGS D.U.T. RG + ID , Drain Current (A) 8.0 - VDD 10V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 6.0 Fig. 10a - Switching Time Test Circuit 4.0 VDS 90 % 2.0 0.0 25 50 75 100 125 150 10 % VGS TC , Case Temperature ( ° C) t d(on) Fig. 9 - Maximum Drain Current vs. Case Temperature tr t d(off) t f Fig. 10b - Switching Time Waveforms Thermal Response (Z thJC ) 1 D = 0.50 0.20 0.1 0.10 PDM 0.05 t1 0.02 0.01 0.01 0.00001 t2 SINGLE PULSE (THERMAL RESPONSE) 0.0001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (s) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 91104 S11-0561-Rev. C, 11-Apr-11 www.vishay.com 5 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFB9N65A, SiHFB9N65A Vishay Siliconix 15 V Driver L VDS D.U.T. RG + A - VDD IAS 20 V tp A A 0.01 Ω V DSav , Avalanche Voltage (V) 800 780 760 740 720 Fig. 12a - Unclamped Inductive Test Circuit 700 V DS A 0 1 2 3 4 5 6 I av , Avalanche Current (A) tp Fig. 12d - Typical Drain-to-Source Voltage vs. Avalanche Current QG I AS 10 V QGS Q GD EAS , Single Pulse Avalanche Energy (mJ) Fig. 12b - Unclamped Inductive Waveforms VG 800 TOP BOTTOM ID 2.3A 3.3A 5.2A Charge 600 Fig. 13a - Basic Gate Charge Waveform Current regulator Same type as D.U.T. 400 50 kΩ 200 12 V 0.2 µF 0.3 µF D.U.T. 0 25 50 75 100 125 + V - DS 150 Starting TJ , Junction Temperature ( °C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current VGS 3 mA IG ID Current sampling resistors Fig. 13b - Gate Charge Test Circuit www.vishay.com 6 Document Number: 91104 S11-0561-Rev. C, 11-Apr-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFB9N65A, SiHFB9N65A Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91104. Document Number: 91104 S11-0561-Rev. C, 11-Apr-11 www.vishay.com 7 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TO-220-1 A E DIM. Q H(1) D 3 2 L(1) 1 M* L b(1) INCHES MIN. MAX. MIN. MAX. A 4.24 4.65 0.167 0.183 b 0.69 1.02 0.027 0.040 b(1) 1.14 1.78 0.045 0.070 F ØP MILLIMETERS c 0.36 0.61 0.014 0.024 D 14.33 15.85 0.564 0.624 E 9.96 10.52 0.392 0.414 e 2.41 2.67 0.095 0.105 e(1) 4.88 5.28 0.192 0.208 F 1.14 1.40 0.045 0.055 H(1) 6.10 6.71 0.240 0.264 0.115 J(1) 2.41 2.92 0.095 L 13.36 14.40 0.526 0.567 L(1) 3.33 4.04 0.131 0.159 ØP 3.53 3.94 0.139 0.155 Q 2.54 3.00 0.100 0.118 ECN: X15-0364-Rev. C, 14-Dec-15 DWG: 6031 Note • M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM C b e J(1) e(1) Package Picture ASE Revison: 14-Dec-15 Xi’an Document Number: 66542 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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