I2P AK PSMN7R8-120ES N-channel 120 V 7.9 mΩ standard level MOSFET in I2PAK 18 February 2013 Product data sheet 1. General description Standard level N-channel MOSFET in I2PAK package qualified to 175 °C. This product is designed and qualified for use in a wide range of industrial, communications and domestic power supply equipment. 2. Features and benefits • • • • High efficiency due to low switching and conduction losses Improved dynamic avalanche performance Suitable for standard level gate drive I2PAK package for slimline adaptors & height constrained applications 3. Applications • • • • AC-to-DC power supply Synchronous rectification Motor control Slimline adaptors & chargers 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 120 V ID drain current Tmb = 25 °C; VGS = 10 V; Fig. 1 - - 70 A Ptot total power dissipation Tmb = 25 °C; Fig. 2 - - 349 W VGS = 10 V; ID = 25 A; Tj = 25 °C; 4.7 6.72 7.9 mΩ Static characteristics RDSon drain-source on-state resistance Fig. 12 Dynamic characteristics QGD QG(tot) gate-drain charge VGS = 10 V; ID = 25 A; VDS = 60 V; - 50.5 - nC total gate charge Fig. 14; Fig. 15 - 167 - nC VGS = 10 V; Tj(init) = 25 °C; ID = 70 A; - - 386 mJ Avalanche ruggedness EDS(AL)S non-repetitive drainsource avalanche energy Vsup ≤ 120 V; unclamped; RGS = 50 Ω; Fig. 3 Scan or click this QR code to view the latest information for this product PSMN7R8-120ES NXP Semiconductors N-channel 120 V 7.9 mΩ standard level MOSFET in I2PAK 5. Pinning information Table 2. Pinning information Pin Symbol Description 1 G gate 2 D drain 3 S source mb D drain Simplified outline Graphic symbol D mb G S mbb076 1 2 3 I2PAK (SOT226) 6. Ordering information Table 3. Ordering information Type number Package PSMN7R8-120ES Name Description Version I2PAK plastic single-ended package (I2PAK); TO-262 SOT226 7. Marking Table 4. Marking codes Type number Marking code PSMN7R8-120ES PSMN7R8-120ES 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 120 V VDGR drain-gate voltage Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ - 120 V VGS gate-source voltage -20 20 V ID drain current VGS = 10 V; Tmb = 25 °C; Fig. 1 - 70 A VGS = 10 V; Tmb = 100 °C; Fig. 1 - 70 A IDM peak drain current pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 4 - 280 A Ptot total power dissipation Tmb = 25 °C; Fig. 2 - 349 W Tstg storage temperature -55 175 °C PSMN7R8-120ES Product data sheet All information provided in this document is subject to legal disclaimers. 18 February 2013 © NXP B.V. 2013. All rights reserved 2 / 13 PSMN7R8-120ES NXP Semiconductors N-channel 120 V 7.9 mΩ standard level MOSFET in I2PAK Symbol Parameter Tj Tsld(M) Conditions Min Max Unit junction temperature -55 175 °C peak soldering temperature - 260 °C Source-drain diode IS source current Tmb = 25 °C - 70 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 280 A VGS = 10 V; Tj(init) = 25 °C; ID = 70 A; - 386 mJ Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy Vsup ≤ 120 V; unclamped; RGS = 50 Ω; Fig. 3 003aak697 80 ID (A) 03aa16 120 Pder (%) 60 80 40 40 20 0 Fig. 1. 0 50 100 150 Tj (°C) Continuous drain current as a function of mounting base temperature PSMN7R8-120ES Product data sheet 0 200 Fig. 2. 0 100 150 Tmb (°C) 200 Normalized total power dissipation as a function of mounting base temperature All information provided in this document is subject to legal disclaimers. 18 February 2013 50 © NXP B.V. 2013. All rights reserved 3 / 13 PSMN7R8-120ES NXP Semiconductors N-channel 120 V 7.9 mΩ standard level MOSFET in I2PAK 003aak698 102 IAL (A) (1) 10 (2) 1 10-3 Fig. 3. 10-2 10-1 1 tAL (ms) 10 Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time ID (A) 003aak696 103 Limit RDSon = VDS / ID tp = 10 us 102 100 us 10 DC 1 ms 1 10-1 Fig. 4. 10 ms 100 ms 1 102 10 VDS (V) 103 Safe operating area; continuous and peak drain current as a function of drain-source voltage 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base Fig. 5 - 0.35 0.43 K/W PSMN7R8-120ES Product data sheet All information provided in this document is subject to legal disclaimers. 18 February 2013 © NXP B.V. 2013. All rights reserved 4 / 13 PSMN7R8-120ES NXP Semiconductors N-channel 120 V 7.9 mΩ standard level MOSFET in I2PAK Symbol Parameter Rth(j-a) thermal resistance from junction to ambient Conditions vertical in free air Min Typ Max Unit - 65 - K/W 003aak695 1 Zth(j-mb) (K/W) δ = 0.5 0.2 0.1 0.1 0.05 0.02 P 10-2 single shot 10-3 10-6 Fig. 5. 10-4 10-3 10-2 T t tp 10-5 tp δ= T 10-1 1 tp (s) Transient thermal impedance from junction to mounting base as a function of pulse duration 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 120 - - V ID = 250 µA; VGS = 0 V; Tj = -55 °C 108 - - V gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C; 2 3 4 V 1 - - V - - 4.6 V VDS = 120 V; VGS = 0 V; Tj = 25 °C - 0.1 1 µA VDS = 120 V; VGS = 0 V; Tj = 175 °C - - 500 µA VGS = 20 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = -20 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = 10 V; ID = 25 A; Tj = 25 °C; 4.7 6.72 7.9 mΩ - 19.4 22.9 mΩ Static characteristics V(BR)DSS VGS(th) Fig. 10; Fig. 11 ID = 1 mA; VDS = VGS; Tj = 175 °C; Fig. 10 ID = 1 mA; VDS = VGS; Tj = -55 °C; Fig. 10 IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance Fig. 12 VGS = 10 V; ID = 25 A; Tj = 175 °C; Fig. 12; Fig. 13 PSMN7R8-120ES Product data sheet All information provided in this document is subject to legal disclaimers. 18 February 2013 © NXP B.V. 2013. All rights reserved 5 / 13 PSMN7R8-120ES NXP Semiconductors N-channel 120 V 7.9 mΩ standard level MOSFET in I2PAK Symbol Parameter Conditions Min Typ Max Unit RG internal gate resistance (AC) f = 1 MHz 0.39 0.78 1.56 Ω total gate charge ID = 25 A; VDS = 60 V; VGS = 10 V; - 167 - nC QGS gate-source charge Fig. 14; Fig. 15 - 36.9 - nC QGS(th) pre-threshold gatesource charge - 24.2 - nC QGS(th-pl) post-threshold gatesource charge - 12.7 - nC QGD gate-drain charge - 50.5 - nC VGS(pl) gate-source plateau voltage ID = 25 A; VDS = 60 V; Fig. 14; Fig. 15 - 4.5 - V Ciss input capacitance VDS = 60 V; VGS = 0 V; f = 1 MHz; - 9473 - pF Coss output capacitance Tj = 25 °C; Fig. 16 - 441 - pF Crss reverse transfer capacitance - 298 - pF td(on) turn-on delay time VDS = 60 V; RL = 2.4 Ω; VGS = 10 V; - 45.5 - ns tr rise time RG(ext) = 5 Ω; Tj = 25 °C - 55.3 - ns td(off) turn-off delay time - 151.8 - ns tf fall time - 60.8 - ns Dynamic characteristics QG(tot) Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 17 - 0.81 1.2 V trr reverse recovery time IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V; - 75.7 - ns Qr recovered charge VDS = 60 V - 264 - nC PSMN7R8-120ES Product data sheet All information provided in this document is subject to legal disclaimers. 18 February 2013 © NXP B.V. 2013. All rights reserved 6 / 13 PSMN7R8-120ES NXP Semiconductors N-channel 120 V 7.9 mΩ standard level MOSFET in I2PAK ID (A) 003aak689 120 10 RDSon (mΩ ) VGS (V) = 5 100 003aak688 40 6 5.5 8 6.5 30 80 60 20 40 4.5 10 20 0 Fig. 6. 4 0 1 2 VDS(V) 0 3 Fig. 7. Output characteristics: drain current as a function of drain-source voltage; typical values 003aak686 200 0 4 8 12 VGS (V) 16 Drain-source on-state resistance as a function of gate-source voltage; typical values 003aak687 100 ID (A) gfs (S) 80 150 60 100 40 50 0 Fig. 8. 0 20 40 60 80 ID (A) Forward transconductance as a function of drain current; typical values PSMN7R8-120ES Product data sheet 0 100 Fig. 9. 0 1 2 3 4 5 6 VGS (V) Transfer characteristics: drain current as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. 18 February 2013 Tj = 25 ° C Tj = 175 °C 20 © NXP B.V. 2013. All rights reserved 7 / 13 PSMN7R8-120ES NXP Semiconductors N-channel 120 V 7.9 mΩ standard level MOSFET in I2PAK 003aad280 5 03aa35 10- 1 ID (A) VGS(th) (V) 4 3 typ max 10- 3 typ 2 min 10- 2 max 10- 4 min 10- 5 1 0 - 60 0 60 120 Tj (°C) 10- 6 180 Fig. 10. Gate-source threshold voltage as a function of junction temperature VGS (V) = 4.5 2 4 VGS (V) 6 Fig. 11. Sub-threshold drain current as a function of gate-source voltage 003aak694 12 RDSon (mW) 11 0 003aag654 3 a 5 2.5 10 2 9 1.5 5.5 8 6 7 10 6 5 1 6.5 7 0 25 50 75 100 ID (A) 0.5 0 -60 125 Fig. 12. Drain-source on-state resistance as a function of drain current; typical values PSMN7R8-120ES Product data sheet 0 60 120 Tj (° C) 180 Fig. 13. Normalized drain-source on-state resistance factor as a function of junction temperature All information provided in this document is subject to legal disclaimers. 18 February 2013 © NXP B.V. 2013. All rights reserved 8 / 13 PSMN7R8-120ES NXP Semiconductors N-channel 120 V 7.9 mΩ standard level MOSFET in I2PAK 003aak691 10 VDS VGS (V) ID VGS(pl) VDS = 96 V 8 60 V 24 V 6 VGS(th) VGS 4 QGS1 QGS2 QGS QGD QG(tot) 2 003aaa508 0 Fig. 14. Gate charge waveform definitions 0 50 100 150 QG (nC) 200 Fig. 15. Gate-source voltage as a function of gate charge; typical values 003aak692 105 003aak693 100 C (pF) IS (A) 80 Ciss 104 60 40 103 Coss Tj = 25 ° C Tj = 175 °C 20 Crss 102 10-1 1 10 VDS (V) 102 0 0 0.3 0.6 0.9 VSD (V) 1.2 Fig. 16. Input, output and reverse transfer capacitances Fig. 17. Source (diode forward) current as a function of as a function of drain-source voltage; typical source-drain (diode forward) voltage; typical values values PSMN7R8-120ES Product data sheet All information provided in this document is subject to legal disclaimers. 18 February 2013 © NXP B.V. 2013. All rights reserved 9 / 13 PSMN7R8-120ES NXP Semiconductors N-channel 120 V 7.9 mΩ standard level MOSFET in I2PAK 11. Package outline Plastic single-ended package (I2PAK); low-profile 3-lead TO-262 SOT226 A A1 E D1 mounting base D L1 Q b1 L 1 2 3 b e c e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1 c D max D1 E e L L1 Q mm 4.5 4.1 1.40 1.27 0.85 0.60 1.3 1.0 0.7 0.4 11 1.6 1.2 10.3 9.7 2.54 15.0 13.5 3.30 2.79 2.6 2.2 OUTLINE VERSION SOT226 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 06-02-14 09-08-25 TO-262 Fig. 18. Package outline I2PAK (SOT226) PSMN7R8-120ES Product data sheet All information provided in this document is subject to legal disclaimers. 18 February 2013 © NXP B.V. 2013. All rights reserved 10 / 13 PSMN7R8-120ES NXP Semiconductors N-channel 120 V 7.9 mΩ standard level MOSFET in I2PAK In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 12. Legal information 12.1 Data sheet status Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Document status [1][2] Product status [3] Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Definition Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 12.2 Definitions Preview — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 12.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. PSMN7R8-120ES Product data sheet Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the All information provided in this document is subject to legal disclaimers. 18 February 2013 © NXP B.V. 2013. All rights reserved 11 / 13 PSMN7R8-120ES NXP Semiconductors N-channel 120 V 7.9 mΩ standard level MOSFET in I2PAK grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of nonautomotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. PSMN7R8-120ES Product data sheet All information provided in this document is subject to legal disclaimers. 18 February 2013 © NXP B.V. 2013. All rights reserved 12 / 13 PSMN7R8-120ES NXP Semiconductors N-channel 120 V 7.9 mΩ standard level MOSFET in I2PAK 13. Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Marking ................................................................... 2 8 Limiting values .......................................................2 9 Thermal characteristics .........................................4 10 Characteristics ....................................................... 5 11 Package outline ................................................... 10 12 12.1 12.2 12.3 12.4 Legal information .................................................11 Data sheet status ............................................... 11 Definitions ...........................................................11 Disclaimers .........................................................11 Trademarks ........................................................ 12 © NXP B.V. 2013. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 18 February 2013 PSMN7R8-120ES Product data sheet All information provided in this document is subject to legal disclaimers. 18 February 2013 © NXP B.V. 2013. All rights reserved 13 / 13