REVISIONS LTR DESCRIPTION DATE Prepared in accordance with ASME Y14.24 APPROVED Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 PMIC N/A PREPARED BY Phu H. Nguyen Original date of drawing YY MM DD CHECKED BY 12-11-08 Phu H. Nguyen APPROVED BY Thomas M. Hess SIZE A REV AMSC N/A 4 CODE IDENT. NO. 5 6 7 8 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http://www.landandmaritime.dla.mil/ TITLE MICROCIRCUIT, LINEAR, LOW POWER, RAIL TO RAIL, OUTPUT PRECISION JFET AMPLIFIER, MONOLITHIC SILICON DWG NO. V62/12653 16236 PAGE 1 OF 8 5962-V024-13 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance low power, rail-to-rail, output precision JFET amplifier microcircuit, with an operating temperature range of -55°C to +125°C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturer’s PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/12653 - Drawing number 01 X E Device type (See 1.2.1) Case outline (See 1.2.2) Lead finish (See 1.2.3) 1.2.1 Device type(s). Device type Generic 01 AD8643-EP Circuit function Low power, rail-to-rail, output precision JFET amplifier 1.2.2 Case outline(s). The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 14 JEDEC MS-012-AB X Package style Standard Small Outline Package 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator A B C D E Z 1.3 Absolute maximum ratings. Material Hot solder dip Tin-lead plate Gold plate Palladium Gold flash palladium Other 1/ Supply voltage ......................................................................................... 27.3 V Input voltage ............................................................................................ V- to V+ Differential input voltage .......................................................................... ±Supply voltage Output short circuit duration .................................................................... Indefinite Operating temperature range: ................................................................. -55°C to +125°C Storage temperature range ..................................................................... -65°C to 150°C Junction temperature .............................................................................. -65°C to 150°C Lead temperature (Soldering, 60 sec) ..................................................... 300°C DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12653 PAGE 2 1.4 Thermal characteristics. Thermal resistance Case outline Case X θJA 120 θJC 36 Unit °C/W 2. APPLICABLE DOCUMENTS JEDEC – SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEP95 – Registered and Standard Outlines for Semiconductor Devices (Copies of these documents are available online at http:/www.jedec.org or from JEDEC – Solid State Technology Association, 3103 North 10th Street, Suite 240–S, Arlington, VA 22201.) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturer’s part number as shown in 6.3 herein and as follows: A. B. C. Manufacturer’s name, CAGE code, or logo Pin 1 identifier ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturer’s part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 1/ 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12653 PAGE 3 TABLE I. Electrical performance characteristics. 1/ Test Symbol Limits Test conditions VS = 5.0 V, VCM = 2.5 V TA = 25°C unless otherwise noted Min Unit Typ Max 50 1000 1.8 µV mV 1.9 mV 1 180 0.5 60 3 pA Input characteristics Offset voltage VOS -55°C < TA < +85°C +85°C < TA < +125°C , VCM = 1.5 V Input bias current 0.25 IB -55°C < TA < +125°C Input offset current IOS -55°C < TA < +125°C Input voltage range Common mode rejection ratio Large signal voltage gain Offset voltage drift Output characteristics Output voltage high CMRR AVO ΔVOS/ΔT 0 74 80 VCM = 0 V to 2.5 V RL = 10 kΩ, VO = 0.5 V to 4.5 V -55°C < TA < +125°C 0.01 Supply current/Amplifier IOUT PSRR VS = 5 V to 26 V 90 ISY SR GBP øm eN p-p eN iN 0.05 0.05 ±6 107 195 -55°C < TA < +125°C Dynamic performance Slew rate Gain bandwidth product Phase margin Noise performance Voltage noise Voltage noise density Current noise density µV/°C V VOL IL = 1 mA, -55°C to +125°C Output current Power supply Power supply rejection ratio 93 140 2.5 4.95 4.94 VOH IL = 1 mA, -55°C to +125°C Output voltage low V dB V/mV f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz mA 250 270 dB µA 2 2.5 50 V/µs MHz Degrees 4.0 28.5 0.5 µV p-p nV/√Hz fA/√Hz See footnote at end of table. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12653 PAGE 4 TABLE I. Electrical performance characteristics - Continued. 1/ Test Symbol Limits Test conditions VS = ±13 V, VCM = 0 V TA = 25°C unless otherwise noted Min Unit Typ Max 70 1000 1.8 µV mV 0.25 pA -55°C < TA < +125°C 1 260 -55°C < TA < +125°C 0.5 65 Input characteristics Offset voltage VOS -55°C < TA < +85°C Input bias current Input offset current Input voltage range Common mode rejection ratio Large signal voltage gain Offset voltage drift Output characteristics Output voltage high IB IOS CMRR AVO ΔVOS/ΔT -13 90 215 VCM =-13 V to +10 V RL = 10 kΩ, VO = -11 V to +11 V -55°C < TA < +125°C IL = 1 mA, -55°C to +125°C VOL Output current Power supply Power supply rejection ratio IOUT Supply current/Amplifier µV/°C V -12.95 -12.94 IL = 1 mA, -55°C to +125°C PSRR VS = ±2.5 V to ±13 V 90 ISY ±12 mA 107 200 dB µA -55°C < TA < +125°C Dynamic performance Slew rate Gain bandwidth product Phase margin Noise performance Voltage noise Voltage noise density Current noise density 1/ SR GBP øm eN p-p eN iN V dB V/mV 12.95 12.94 VOH Output voltage low +10 107 290 2.5 f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz 290 330 3 3.5 60 V/µs MHz Degrees 4.2 27.5 0.5 µV p-p nV/√Hz fA/√Hz Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12653 PAGE 5 Case X e b 14 8 0°-8° E 1 E1 7 L D DETAIL A SEE DETAIL A A1 A Symbol A A1 b c D c SEATING PLANE Millimeters Min Max Dimensions Inches Symbol Min Max 1.35 0.10 0.31 0.17 8.55 .053 .004 .012 .012 .337 1.75 0.25 0.51 0.25 8.75 .019 .010 .020 .020 .345 E E1 e L Millimeters Min Max Min Inches Max 3.80 4.00 5.80 6.20 1.27 BSC 0.40 1.27 .150 .157 .228 .244 .050 BSC .016 .050 NOTES: 1. Controlling dimensions are in millimeters; inch dimensions are rounded off millimeter equivalents for reference only and are not appropriate for use in design. 2. Falls within JEDEC MS-012-AB. FIGURE 1. Case outline. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12653 PAGE 6 Case outline X Terminal Terminal symbol number OUT A 14 -IN A 13 +INA 12 Terminal number 1 2 3 Terminal symbol OUT D -IN D +IN D 4 5 V+ +IN B 11 10 +IN C 6 7 -IN B OUT B 9 8 -IN C OUT C V- FIGURE 2. Terminal connections. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12653 PAGE 7 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturer’s standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturer’s data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. DLA Land and Maritime maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number V62/12653-01XE 24355 AD8643TRZ-EP-R7 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code 24355 DLA LAND AND MARITIME COLUMBUS, OHIO Source of supply Analog Devices 1 Technology Way P.O. Box 9106 Norwood, MA 02062-9106 SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12653 PAGE 8