5962H1124002KXC

REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
REV
SHEET
REV
SHEET
15
16
17
18
19
20
REV STATUS
OF SHEETS
REV
PMIC N/A
PREPARED BY
Steve L. Duncan
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
SHEET
1
2
3
4
5
DRAWING APPROVAL DATE
15-05-20
REVISION LEVEL
7
9
10
11
12
13
http://www.landandmaritime.dla.mil/
MICROCIRCUIT, HYBRID, CMOS, LINEAR,
ANALOG MULTIPLEXER, 64 CHANNEL,
+3.3 TO +5 VOLT
SIZE
CAGE CODE
A
67268
SHEET
DSCC FORM 2233
APR 97
8
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
CHECKED BY
Greg Cecil
APPROVED BY
Charles F. Saffle
6
5962-11240
1 OF
20
5962-E215-15
14
1. SCOPE
1.1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A
choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When
available, a choice of radiation hardness assurance levels are reflected in the PIN.
1.2 PIN. The PIN shall be as shown in the following example:
5962
H
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
11240
01
K
X
C
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
/
\/
Drawing number
1.2.1 Radiation hardness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA
levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number
01
RHD8540
02
RHD8541
Circuit function
64 channel analog multiplexer, 32 channels voltage,
32 channels voltage and current
64 channel analog multiplexer
1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance level.
All levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K,
and E) or QML Listing (Class G and D). The product assurance levels are as follows:
Device class
Device performance documentation
K
Highest reliability class available. This level is intended for use in space
applications.
H
Standard military quality class level. This level is intended for use in applications
where non-space high reliability devices are required.
G
Reduced testing version of the standard military quality class. This level uses the
Class H screening and In-Process Inspections with a possible limited temperature
range, manufacturer specified incoming flow, and the manufacturer guarantees (but
may not test) periodic and conformance inspections (Group A, B, C and D).
E
Designates devices which are based upon one of the other classes (K, H, or G)
with exception(s) taken to the requirements of that class. These exception(s) must
be specified in the device acquisition document; therefore the acquisition document
should be reviewed to ensure that the exception(s) taken will not adversely affect
system performance.
D
Manufacturer specified quality class. Quality level is defined by the manufacturers
internal, QML certified flow. This product may have a limited temperature range.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
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APR 97
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A
REVISION LEVEL
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2
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
Descriptive designator
X
See figure 1
Terminals
Package style
96
Ceramic quad flat pack
1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38534.
1.3 Absolute maximum ratings. 1/
Supply voltage (VCC) ..................................................................
Digital input overvoltage range (VEN ,VA) ....................................
Analog input overvoltage range .................................................
Power dissipatation (PD):
Device type 01........................................................................
Device type 02........................................................................
Thermal resistance junction-to-case (θJC) ..................................
Storage temperature ..................................................................
Lead temperature (soldering, 10 seconds) ................................
+7.0 V dc
(< VCC + .4)V, (> GND - .4)V
(< VCC + .4)V, (> GND - .4)V
33.6 mW
22.4 mW
10°C/W
-65°C to +150°C
+300°C
1.4 Recommended operating conditions.
Supply voltage range (VCC) .......................................................
Maximum logic low level input voltage ......................................
Minimum logic high level input voltage .....................................
Case operating temperature range (TC).....................................
+3.0 V to +5.5 V dc
.3 VCC
.7 VCC
-55°C to +125°C
1.5 Radiation features. 2/
Maximum Total Ionizing Dose (TID) ..(dose rate = 50 - 300 rad(Si)/s):
In accordance with MIL-STD-883, method 1019, condition A.
Enhanced Low Dose Rate Sensitivity (ELDRS) .........................
Single Event Latchup (SEL) .......................................................
14
2
Neutron Displacement Damage (> 1 x 10 neutrons/cm ) ........
1 Mrad(Si)
3/
2
> 100 MeV-cm /mg 4/
3/
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATIONS
MIL-PRF-38534 - Hybrid Microcircuits, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 - Test Method Standard Microcircuits.
MIL-STD-1835 - Interface Standard for Electronic Component Case Outlines.
1/ Stresses above the absolute maximum ratings may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
2/ See section 4.3.5 for the manufacturer's radiation hardness assurance analysis and testing.
3/ Not tested, Immune by 100 percent CMOS technology.
4/ Single Event Latchup (SEL) immunity is accomplished by double, fully enclosing, guard rings in the CMOS design layout.
The guard rings eliminate the parasitic pnpn structure that is responsible for latchup in CMOS circuits. This limit is
guaranteed by design or process, but not tested.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-11240
A
REVISION LEVEL
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3
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 - List of Standard Microcircuit Drawings.
MIL-HDBK-780 - Standard Microcircuit Drawings.
(Copies of these documents are available online at http://quicksearch.dla.mil or from the Standardization Document Order
Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item performance requirements for device classes D, E, G, H, and K shall be in
accordance with MIL-PRF-38534. Compliance with MIL-PRF-38534 shall include the performance of all tests herein or as
designated in the device manufacturer's Quality Management (QM) plan or as designated for the applicable device class. The
manufacturer may eliminate, modify or optimize the tests and inspections herein, however the performance requirements as
defined in MIL-PRF-38534 shall be met for the applicable device class. In addition, the modification in the QM plan shall not
affect the form, fit, or function of the device for the applicable device class.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38534 and herein.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.
3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3.
3.2.4 Switching test waveform(s). The switching test waveform(s) shall be as specified on figure 4.
3.2.5 Block diagram. The block diagram(s) shall be as specified on figure 5.
3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document
revision level control and shall be made available to the preparing and acquiring activity upon request.
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are
as specified in table I and shall apply over the full specified operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are defined in table I.
3.5 Marking of device(s). Marking of device(s) shall be in accordance with MIL-PRF-38534. The device shall be marked with
the PIN listed in 1.2 herein. In addition, the manufacturer's vendor similar PIN may also be marked.
3.6 Data. In addition to the general performance requirements of MIL-PRF-38534, the manufacturer of the device described
herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample,
for each device type listed herein. Also, the data should include a summary of all parameters manually tested, and for those
which, if any, are guaranteed. This data shall be maintained under document revision level control by the manufacturer and be
made available to the preparing activity (DLA Land and Maritime -VA) upon request.
3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to supply to this
drawing. The certificate of compliance (original copy) submitted to DLA Land and Maritime -VA shall affirm that the
manufacturer's product meets the performance requirements of MIL-PRF-38534 and herein.
3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38534 shall be provided with each lot of
microcircuits delivered to this drawing.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
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DSCC FORM 2234
APR 97
SIZE
5962-11240
A
REVISION LEVEL
SHEET
4
TABLE I. Electrical performance characteristics.
Test
Symbol
Supply currents 1/
+ICC
+ISBY
Address input 1/
currents
IAL
(A0-A3)
Group A
subgroups
Conditions
-55°C ≤ TC ≤ +125°C
VCC = +5 V
unless otherwise specified
VEN = .3 VCC
1,2,3
VEN = .7 VCC
1,2,3
1
2
1
VA = .3 VCC
2
1
2
1
2
1
2
1
2
VA = .7 VCC
IAH
(B0-B3)
Enable input 1/
currents
����)
(EN
IENL
����
EN(0-15)
����(16-31)
EN
IENL
����
EN(32-47)
����
EN(48-63)
IENH
����
EN(0-15)
����
EN(16-31)
1
VA = .3 VCC
1
2
1
2
1
VA = .7 VCC
IINLK5
IINLK0
1
VIN = +5 V, VEN = .7 VCC, output
and all unused MUX inputs
under test = 0 V
02
3.2
01
1.2
mA
800
20
200
10
µA
-20
-200
-10
-100
-10
-100
100
10
100
-20
-200
-10
-100
-10
-100
20
200
10
100
10
100
-5
5
-50
50
-10
10
-100
-5
-50
-5
100
5
50
5
-50
50
-10
-100
-5
-50
10
100
5
50
-5
5
-50
50
-5
5
-50
50
02
01
02
01,02
01
02
01,02
01,02
01
02
01,02
01
02
01,02
2
1
VIN = 0 V, VEN = .7 VCC, output
and all unused MUX inputs
under test = +5 V
Max
4.8
2
1
2
1
2
Unit
01
2
IENH
����(32-47)
EN
����(48-63)
EN
Input leakage current
(CH0-CH15) 1/
Limits
Min
IAL
(B0-B3)
IAH
(A0-A3)
Device
types
01,02
2
mA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
See footnote at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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A
REVISION LEVEL
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TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Output leakge current
(VOUT) 1/
IOUTLK
Switch ON 1/
resistance
RDSON
Conditions
-55°C ≤ TC ≤ +125°C
VCC = +5 V
unless otherwise specified
Group A
subgroups
1
VOUT = +5 V, VEN = .7 VCC, All
inputs grounded except
channel being tested
1
2
3
1
2
3
1
2
3
VIN = 0 V, VEN = .3 VCC,
IOUT = +1 mA
VIN = +5 V, VEN = .3 VCC,
IOUT = -1 mA
tAHL
01,02
2
VIN = +2.5 V, VEN = .3 VCC,
IOUT = -0.6 mA
Address to output delay
Device
types
01,02
10
tALH
9,11
RL = 10 kΩ, CL = 50 pF,
See figure 4
01,02
10
Enable to output delay
tONEN
9,11
RL = 1 kΩ, CL = 50 pF,
See figure 4
01,02
10
tOFFEN
1/
9,10,11
RL = 1 kΩ, CL = 50 pF,
See figure 4
01,02
Unit
Min
Max
-5
5
-50
50
nA
750
1000
500
750
1000
500
750
1000
500
01,02
9,11
RL = 10 kΩ, CL = 50 pF,
See figure 4
Limits
10
150
10
200
10
150
10
200
10
150
10
200
10
200
Ω
ns
ns
ns
ns
These devices have been tested to (1 Mrad(Si)) to Method 1019, condition A of MIL-STD-883 at +25°C for these
parameters to assure the requirements of RHA designator level "H” (1Mrad(Si)) are met.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-11240
A
REVISION LEVEL
SHEET
6
FIGURE 1. Case outline.
STANDARD
MICROCIRCUIT DRAWING
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DSCC FORM 2234
APR 97
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REVISION LEVEL
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Case outline X - Continued.
FIGURE 1. Case outline(s) - Continued.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
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A
REVISION LEVEL
SHEET
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Case outline X - Continued.
Inches
Symbol
Min
Millimeters
Max
Min
Max
A
.200
5.08
A1
.180
4.57
A2
.005
.011
0.13
0.28
b
.0135
.0195
0.34
0.50
c
.005
.008
0.13
0.20
D/E
1.287
1.313
32.69
33.35
D1
1.145
1.155
29.08
29.34
e
.050 BSC
1.27 BSC
F
.200 TYP
5.08 TYP
J
.035 TYP
0.89 TYP
L
2.490
2.510
L1
63.25
63.75
2.580
65.53
L2
1.700
1.740
43.18
44.20
L3
2.090
2.110
53.09
53.59
L4
.400 TYP
10.16 TYP
N
96
96
S1
.030 TYP
0.76 TYP
S2
.015 TYP
0.38 TYP
NOTES:
1. Pin 1 is indicated by an ESD triangle on top of the package and by an index on the bottom of the package.
2. The U.S. preferred system of measurement is the metric SI. This item was designed using inch-pound units of
measurement. In case of problems involving conflicts between the metric and inch-pound units, the inch-pound
units shall rule.
3. N equals 96, the total number of leads on the package.
4. Pin numbers are for reference only.
FIGURE 1. Case outline(s) - Continued.
STANDARD
MICROCIRCUIT DRAWING
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REVISION LEVEL
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Device type
01
Case outline
Terminal
number
Terminal symbol
Terminal
number
1
A2
33
2
B2
3
A3
4
X
Terminal symbol
Terminal
number
Terminal symbol
CH11
65
CH49
34
CH27
66
CH48
35
CH12
67
OUTPUT I(48-63)
B3
36
CH28
68
OUTPUT V(48-63)
5
EN(0-15)
37
CH13
69
OUTPUT I(32-47)
6
EN(16-31)
38
CH29
70
OUTPUT V(32-47)
7
CH0
39
CH14
71
GND
8
CH16
40
CH30
72
GND
9
CH1
41
CH15
73
CH47
10
CH17
42
CH31
74
CH46
11
CH2
43
NC
75
CH45
12
CH18
44
VCC
76
CH44
13
CH3
45
NC
77
CH43
14
CH19
46
NC
78
CH42
15
CH4
47
NC
79
CH41
16
CH20
48
NC
80
CH40
17
CH5
49
NC
81
CH39
18
CH21
50
Case GND
82
CH38
19
CH6
51
CH63
83
CH37
20
CH22
52
CH62
84
CH36
21
CH7
53
CH61
85
CH35
22
CH23
54
CH60
86
CH34
23
GND
55
CH59
87
CH33
24
GND
56
CH58
88
CH32
25
OUTPUT V(0-15)
57
CH57
89
GND
26
OUTPUT V(16-31)
58
CH56
90
GND
27
CH8
59
CH55
91
EN(48-63)
28
29
CH24
CH9
60
61
CH54
CH53
92
93
EN(32-47)
A0
30
31
CH25
CH10
62
63
CH52
CH51
94
95
B0
A1
32
CH26
64
CH50
96
B1
NOTE: NC is a no connect pin. NC pins should be grounded to eliminate or minimize electrostatic
discharge (ESD) or static buildup.
FIGURE 2. Terminal connections.
STANDARD
MICROCIRCUIT DRAWING
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REVISION LEVEL
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Device type
02
Case outline
Terminal
number
Terminal symbol
Terminal
number
1
A2
33
2
B2
3
A3
4
X
Terminal symbol
Terminal
number
Terminal symbol
CH11
65
CH49
34
CH27
66
CH48
35
CH12
67
NC
B3
36
CH28
68
OUTPUT V(48-63)
5
EN(0-15)
37
CH13
69
NC
6
EN(16-31)
38
CH29
70
OUTPUT V(32-47)
7
CH0
39
CH14
71
GND
8
CH16
40
CH30
72
GND
9
CH1
41
CH15
73
CH47
10
CH17
42
CH31
74
CH46
11
CH2
43
NC
75
CH45
12
CH18
44
VCC
76
CH44
13
CH3
45
NC
77
CH43
14
CH19
46
NC
78
CH42
15
CH4
47
NC
79
CH41
16
CH20
48
NC
80
CH40
17
CH5
49
NC
81
CH39
18
CH21
50
Case GND
82
CH38
19
CH6
51
CH63
83
CH37
20
CH22
52
CH62
84
CH36
21
CH7
53
CH61
85
CH35
22
CH23
54
CH60
86
CH34
23
GND
55
CH59
87
CH33
24
GND
56
CH58
88
CH32
25
OUTPUT V(0-15)
57
CH57
89
GND
26
OUTPUT V(16-31)
58
CH56
90
GND
27
28
CH8
59
CH55
91
EN(48-63)
29
CH24
CH9
60
61
CH54
CH53
92
93
EN(32-47)
A0
30
31
CH25
CH10
62
63
CH52
CH51
94
95
B0
A1
32
CH26
64
CH50
96
B1
NOTE: NC is a no connect pin. NC pins should be grounded to eliminate or minimize electrostatic
discharge (ESD) or static buildup.
FIGURE 2. Terminal connections - Continued.
STANDARD
MICROCIRCUIT DRAWING
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REVISION LEVEL
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Truth table (CH0-CH15) and (CH16-CH31)
B3
X
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
1/
2/
B2
X
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
B1
X
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
B0
X
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
EN(0-15)
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
"ON" Channel 1/
None
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
CH8
CH9
CH10
CH11
CH12
CH13
CH14
CH15
EN(16-31)
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
"ON" Channel 2/
None
CH16
CH17
CH18
CH19
CH20
CH21
CH22
CH23
CH24
CH25
CH26
CH27
CH28
CH29
CH30
CH31
Between (CH0-CH15) and OUTPUT(0-15).
Between (CH16-CH31) and OUTPUT(16-31).
Truth table (CH32-CH47) and (CH48-CH63)
1/
2/
A3
A2
A1
A0
EN(32-47)
"ON" Channel 1/
EN(48-63)
"ON" Channel 2/
X
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
X
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
X
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
X
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
None
CH32
CH33
CH34
CH35
CH36
CH37
CH38
CH39
CH40
CH41
CH42
CH43
CH44
CH45
CH46
CH47
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
None
CH48
CH49
CH50
CH51
CH52
CH53
CH54
CH55
CH56
CH57
CH58
CH59
CH60
CH61
CH62
CH63
Between (CH32-CH47) and OUTPUT(32-47) and CURRENT(32-47).
Between (CH48-CH63) and OUTPUT(48-63) and CURRENT(48-63).
FIGURE 3. Truth table(s). (Device type 01)
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-11240
A
REVISION LEVEL
SHEET
12
Truth table (CH0-CH15) and (CH16-CH31)
B3
X
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
1/
2/
B2
X
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
B1
X
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
B0
X
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
EN(0-15)
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
"ON" Channel 1/
None
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
CH8
CH9
CH10
CH11
CH12
CH13
CH14
CH15
EN(16-31)
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
"ON" Channel 2/
None
CH16
CH17
CH18
CH19
CH20
CH21
CH22
CH23
CH24
CH25
CH26
CH27
CH28
CH29
CH30
CH31
Between (CH0-CH15) and OUTPUT(0-15).
Between (CH16-CH31) and OUTPUT(16-31).
Truth table (CH32-CH47) and (CH48-CH63)
1/
2/
A3
A2
A1
A0
EN(32-47)
"ON" Channel 1/
EN(48-63)
"ON" Channel 2/
X
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
X
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
X
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
X
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
None
CH32
CH33
CH34
CH35
CH36
CH37
CH38
CH39
CH40
CH41
CH42
CH43
CH44
CH45
CH46
CH47
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
None
CH48
CH49
CH50
CH51
CH52
CH53
CH54
CH55
CH56
CH57
CH58
CH59
CH60
CH61
CH62
CH63
Between (CH32-CH47) and OUTPUT(32-47).
Between (CH48-CH63) and OUTPUT(48-63).
FIGURE 3. Truth table(s). (Device type 02)
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-11240
A
REVISION LEVEL
SHEET
13
FIGURE 4. Switching test waveform(s).
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-11240
A
REVISION LEVEL
SHEET
14
FIGURE 5. Block diagram. (Device Type 01)
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-11240
A
REVISION LEVEL
SHEET
15
FIGURE 5. Block diagram - Continued. (Device Type 02)
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-11240
A
REVISION LEVEL
SHEET
16
TABLE II. Electrical test requirements.
MIL-PRF-38534 test requirements
Subgroups
(in accordance with
MIL-PRF-38534, group A
test table)
Interim electrical parameters
1,9
Final electrical parameters
1*,2,3,9,10,11
Group A test requirements
1,2,3,9,10,11
Group C end-point electrical
parameters
1,2,3,9,10,11
End-point electrical parameters
for Radiation Hardness Assurance
(RHA) devices
1
* PDA applies to subgroup 1.
4. VERIFICATION
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38534 or as
modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form,
fit, or function as described herein.
4.2 Screening. Screening shall be in accordance with MIL-PRF-38534. The following additional criteria shall apply:
a.
b.
Burn-in test, method 1015 of MIL-STD-883.
(1)
Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to either DLA Land and Maritime -VA or the acquiring activity upon request.
Also, the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance
with the intent specified in method 1015 of MIL-STD-883.
(2)
TA as specified in accordance with table I of method 1015 of MIL-STD-883.
Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter
tests prior to burn-in are optional at the discretion of the manufacturer.
4.3 Conformance and periodic inspections. Conformance inspection (CI) and periodic inspection (PI) shall be in accordance
with MIL-PRF-38534 and as specified herein.
4.3.1 Group A inspection (CI). Group A inspection shall be in accordance with MIL-PRF-38534 and as follows:
a.
Tests shall be as specified in table II herein.
b.
Subgroups 4, 5, 6, 7, and 8 shall be omitted.
4.3.2 Group B inspection (PI). Group B inspection shall be in accordance with MIL-PRF-38534.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-11240
A
REVISION LEVEL
SHEET
17
4.3.3 Group C inspection (PI). Group C inspection shall be in accordance with MIL-PRF-38534 and as follows:
a.
End-point electrical parameters shall be as specified in table II herein.
b.
Steady-state life test, method 1005 of MIL-STD-883.
(1)
Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to either DLA Land and Maritime -VA or the acquiring activity upon request.
Also, the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance
with the intent specified in method 1005 of MIL-STD-883.
(2)
TA as specified in accordance with table I of method 1005 of MIL-STD-883.
(3)
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.3.4 Group D inspection (PI). Group D inspection shall be in accordance with MIL-PRF-38534.
4.3.5. Radiation hardness assurance (RHA). RHA qualification is required only for those devices with the RHA designator as
specified herein. See table IIIA and table IIIB.
Table IIIA. Radiation Hardness Assurance Method Table.
RHA
method
employed
Total Dose Testing
RHA level "H"
(1 Mrad)
Worst Case Analysis Performed
Element
level
Hybrid device
level
Tested at
(1 Mrad)
Tested at
(1 Mrad)
(See 4.3.5.1.1)
End point electricals after
total dose
Includes
Combines Combines total End-of-life Element level Hybrid device
temperature temperature
dose and
level
effects and radiation displacement
effects
effects
No
No
No
No
TC = +25°C
TC = +25°C
Table IIIB. Hybrid level and element level test table.
Total Dose
Low Dose Rate High Dose Rate
(LDR)
(HDR)
CMOS IC
G
Tested
(1 Mrad)
(See 4.3.5.1.1)
ELDRS
G
Radiation Test
Heavy Ion
SET
SEL
(transient) (latch-up)
Not
Tested
G
100 MeV2
cm /mg
Proton
Neutron
Low
High
SEE Displacement
Energy Energy (upset) Damage (DD)
Not
Not
Not
Tested Tested Tested
G
NOTE:
G = Guaranteed by design or process
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-11240
A
REVISION LEVEL
SHEET
18
4.3.5.1 Radiation Hardness Assurance (RHA) inspection. RHA qualification is required for those devices with the RHA
designator as specified herein. End-point electrical parameters for radiation hardness assurance (RHA) devices shall be
specified in table II. Radiation testing will be in accordance with the qualifying activity (DLA Land and Maritime -VQ) approved
plan and with MIL-PRF-38534, Appendix G.
a.
The hybrid device manufacturer shall establish procedures controlling component radiation testing, and shall establish
radiation test plans used to implement component lot qualification during procurement. Test plans and test reports
shall be filed and controlled in accordance with the manufacturer's configuration management system.
b.
The hybrid device manufacturer shall designate a RHA program manager to oversee component lot qualification, and
to monitor design changes for continued compliance to RHA requirements.
4.3.5.1.1 Hybrid level RHA qualification. Hybrid level and element level testing are the same for the devices on this Standard
Microcircuit Drawing (SMD) since the active element is accessible to the device leads for test.
4.3.5.1.1.1 Qualification by similarity. The devices on this SMD contain multiple of a common active element (that are
accessible to the package leads for test), therefore the device types on this SMD are considered similar for the purpose of RHA
qualification. The part number 5962H1024301KXC was RHA tested, therefore the device types 01 and 02 on this SMD are
considered qualified by similarity. The package used for (5962H1024301KXC) is the same package construction and material
as this drawing except for size and pin count. Internal Gas Analysis data demonstrates that the hydrogen level between the two
packages is negligible.
4.3.5.1.2 Element level qualification.
4.3.5.1.2.1 Total ionizing dose irradiation testing. A minimum of 5 biased devices of the active element used will be tested
every wafer lot. These active elements will be tested at HDR in accordance with condition A of method 1019 of MIL-STD-883 to
1 Mrad(Si) for the device parameters as specified in table I herein.
4.3.5.1.2.1.1 Accelerated annealing test. Accelerated annealing tests shall be performed on all devices requiring a RHA level
greater than 5k rads (Si). The post-anneal end-point electrical parameter limits shall be as specified in table I herein and shall be
the pre-irradiation end-point electrical parameter limit at 25°C ±5°C. Testing shall be performed at initial qualification and after
any design or process changes which may affect the RHA response of the device.
4.3.5.2. Total Ionizing Dose (TID). See paragraph 4.3.5.1.2.1 and 4.3.5.1.2.1.1 herein.
4.3.5.2.1 Radiation Lot Acceptance Testing (RLAT). Every wafer diffusion lot of integrated circuits used in this hybrid
microcircuit device will be Radiation Lot Acceptance Testing (RLAT) tested at HDR in accordance with condition A (dose rate of
50 - 300 rad(Si)/s) of method 1019 of MIL-STD-883. A minimum of 5 samples under worst case biased conditions will be tested.
0.9000/90% statistics are applied to the device parameters as specified in table I herein.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38534.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing.
6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated as specified in MIL-PRF38534.
6.4 Record of users. Military and industrial users shall inform DLA Land and Maritime when a system application requires
configuration control and the applicable SMD to that system. DLA Land and Maritime will maintain a record of users and this list
will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices
(FSC 5962) should contact DLA Land and Maritime-VA, telephone (614) 692-8108.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-11240
A
REVISION LEVEL
SHEET
19
6.5 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA, Columbus, Ohio 43218-3990,
or telephone (614) 692-1081.
6.6 Sources of supply. Sources of supply are listed in MIL-HDBK-103 and QML-38534. The vendors listed in MIL-HDBK-103
and QML-38534 have submitted a certificate of compliance (see 3.7 herein) to DLA Land and Maritime-VA and have agreed to
this drawing.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-11240
A
REVISION LEVEL
SHEET
20
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 15-05-20
Approved sources of supply for SMD 5962-11240 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38534 during the next revisions. MIL-HDBK-103 and QML-38534 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DLA Land and Maritime -VA. This information
bulletin is superseded by the next dated revisions of MIL-HDBK-103 and QML-38534. DLA Land and Maritime
maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
Vendor
similar
PIN 2/
5962-1124001KXC
5962H1124001KXC
88379
88379
RHD8540-201-1S
RHD8540-901-1S
5962-1124002KXC
5962H1124002KXC
88379
88379
RHD8541-201-1S
RHD8541-901-1S
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed contact the Vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may not
satisfy the performance requirements of this drawing.
Vendor CAGE
number
Vendor name
and address
88379
Aeroflex Plainview Incorporated,
(Aeroflex Microelectronic Solutions)
35 South Service Road
Plainview, NY 11803
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.