PTFA181001E PTFA181001F Thermally-Enhanced High Power RF LDMOS FETs 100 W, 1805 – 1880 MHz Description The PTFA181001E and PTFA181001F are 100-watt LDMOS FETs designed for EDGE and WCDMA power amplifier applications in the DCS band. Features include input and output matching, and thermally-enhanced packages with slotted or earless flanges. Manufactured with Infineon's advanced LDMOS process, these devices provide excellent thermal performance and superior reliability. VDD = 28 V, IDQ = 750 mA, ƒ = 1880 MHz, 3GPP WCDMA signal, P/A R = 8 dB, 10 MHz carrier spacing 35 Efficiency 25 IM3 -38 20 -43 15 -48 10 ACPR -53 5 34 36 38 40 42 • Thermally-enhanced packages • Broadband internal matching • Typical EDGE performance at 1879.8 MHz, 28 V - Average output power = 45 W - Linear Gain = 16.5 dB - Efficiency = 36% - EVM RMS = 1.8% • Typical CW performance, 1880 MHz, 28 V - Output power at P–1dB = 120 W - Gain 15.5 dB - Efficiency = 52% • Integrated ESD protection: Human Body Model, Class 2 (minimum) • Excellent thermal stability, low HCI drift • Capable of handling 10:1 VSWR @ 28 V, 100 W (CW) output power • Pb-free and RoHS compliant 30 Drain Efficiency (%) IM3 (dBc), ACPR (dBc) -23 -33 PTFA181001F Package H-37248-2 Features 2-Carrier WCDMA Drive-up -28 PTFA181001E Package H-36248-2 44 46 Average Output Power (dBm) RF Characteristics EDGE Measurements (not subject to production test—verified by design/characterization in Infineon test fixture) VDD = 28 V, IDQ = 750 mA, POUT = 45 W, ƒ = 1879.8 MHz Characteristic Symbol Min Typ Max Unit RMS EVM — 1.8 — % Modulation Spectrum @ 400 KHz ACPR — –61 — dBc Modulation Spectrum @ 600 KHz ACPR — –73 — dBc Gain Gps — 16.5 — dB Drain Efficiency ηD — 36 — % Error Vector Magnitude All published data at TCASE = 25°C unless otherwise indicated *See Infineon distributor for future availability. ESD: Electrostatic discharge sensitive device—observe handling precautions! Data Sheet 1 of 11 Rev. 02.1, 2009-02-20 PTFA181001E PTFA181001F RF Characteristics (cont.) Two-tone Measurements (tested in Infineon test fixture) VDD = 28 V, IDQ = 750 mA, POUT = 100 W PEP, ƒ = 1850 MHz, tone spacing = 1 MHz Characteristic Symbol Min Typ Max Unit Gain Gps 16 16.5 — dB Drain Efficiency ηD 39 41 — % Intermodulation Distortion IMD — –30 –28 dBc DC Characteristics Characteristic Conditions Symbol Min Typ Max Unit Drain-Source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 65 — — V Drain Leakage Current VDS = 28 V, V GS = 0 V IDSS — — 1.0 µA VDS = 63 V, V GS = 0 V IDSS — — 10.0 µA On-State Resistance VGS = 10 V, V DS = 0.1 V RDS(on) — 0.85 — Ω Operating Gate Voltage VDS = 28 V, ID = 750 mA VGS 2.0 2.5 3.0 V Gate Leakage Current VGS = 10 V, V DS = 0 V IGSS — — 1.0 µA Maximum Ratings Parameter Symbol Value Unit Drain-Source Voltage VDSS 65 V Gate-Source Voltage VGS –0.5 to +12 V Junction Temperature TJ 200 °C Total Device Dissipation PD Above 25°C derate by 407 W 2.33 W/°C Storage Temperature Range TSTG –40 to +150 °C Thermal Resistance (TCASE = 70°C, 100 W CW) RθJC 0.43 °C/W Ordering Information Type and Version Package Type Package Description Marking PTFA181001E V4 H-36248-2 Thermally-enhanced slotted flange, single-ended PTFA181001E PTFA181001F V4 H-37248-2 Thermally-enhanced earless flange, single-ended PTFA181001F *See Infineon distributor for future availability. Data Sheet 2 of 11 Rev. 02.1, 2009-02-20 PTFA181001E PTFA181001F Typical Performance (data taken in a production test fixture) EDGE Modulation Spectrum Performance Edge EVM and Modulation Spectrum vs. Quiescent Current VDD = 28 V, IDQ = 750 mA, ƒ = 1879.8 MHz 2.4 -20 EVM 2.2 -30 2.0 -40 1.8 -50 1.6 -60 400 kHz 1.4 600 kHz 1.2 1.0 0.65 0.70 0.75 0.80 0.85 -70 -80 -20 45 Efficiency -40 35 400 kHz -60 25 -80 -100 -90 0.90 5 37 39 41 43 45 47 49 Output Power (dBm) Quiescent Current (A) EDGE EVM Performance Intermodulation Distortion vs. Output Power VDD = 28 V, IDQ = 750 mA, ƒ = 1879.8 MHz (as measured in a broadband circuit) VDD = 28 V, IDQ = 750 mA, ƒ1 = 1879 MHz, ƒ2 = 1880 MHz 45 8 -20 25 2 15 EVM -30 IMD (dBc) 4 Drain Efficiency (%) 35 6 41 43 45 47 -45 -50 7th -65 49 37 Output Power (dBm) Data Sheet 5th -40 -55 5 39 -35 -60 0 37 3rd Order -25 Efficiency EVM RMS (avg. %) . 15 600 kHz Drain Efficiency (%) -10 Modulation Spectrum (dBc) 2.6 Modulation Spectrum (dBc) EVM RMS (avg. %) . VDD = 28 V, ƒ = 1879.8 MHz, POUT = 46.5 dBm 39 41 43 45 47 49 Output Power, Avg. (dBm) 3 of 11 Rev. 02.1, 2009-02-20 PTFA181001E PTFA181001F Typical Performance (cont.) Broadband CW Performance (at P-1dB) IM3 vs. Output Power at Selected Biases VDD = 28 V, IDQ = 750 mA VDD = 28 V, ƒ1 = 1879, ƒ2 = 1880 MHz Efficiency Gain (dB) 18 17 Output Power 16 55 50 45 Gain 15 40 14 1805 1818 1831 1844 1857 35 1883 1870 -20 -25 -30 IMD (dBc) 60 Efficiency (%), Output Power (dBm) 19 IDQ = 375 mA -35 IDQ = 1125 mA -40 -45 -50 IDQ = 750 mA -55 -60 37 39 43 45 47 Linear Broadband Performance Power Sweep VDD = 28 V, IDQ = 750 mA, POUT Avg = 47 dBm VDD = 28 V, ƒ = 1880 MHz 40 17.5 50 30 17.0 Gain 45 40 20 10 Efficiency 0 Return Loss 30 25 20 1805 -10 -20 1818 1831 1844 1857 1870 Power Gain (dB) 55 35 41 IDQ = 1125 mA 16.5 IDQ = 750 mA 16.0 15.5 15.0 IDQ = 375 mA 14.5 14.0 -30 1883 36 Frequency (MHz) Data Sheet 49 Output Power, Avg. (dBm) Gain, Return Loss (dB) Efficiency (%) Frequency (MHz) 38 40 42 44 46 48 50 52 Output Power (dBm) 4 of 11 Rev. 02.1, 2009-02-20 PTFA181001E PTFA181001F Typical Performance (cont.) Gain & Efficiency vs. Output Power Output Power (P–1dB) vs. Drain Voltage VDD = 28 V, IDQ = 750 mA, ƒ = 1880 MHz IDQ = 750 mA, ƒ = 1880 MHz 18 16 45 15 35 14 25 Efficiency 13 15 12 5 36 38 40 42 44 46 48 50 Output Power (dBm) 55 Gain Drain Efficiency (%) 17 Gain (dB) 52 65 51 50 49 24 52 26 Voltage normalized to typical gate voltage, series show current TCASE = 25°C Drain Efficiency (%) -20 25 -30 ACP FC – 0.75 MHz 20 -40 15 -50 10 -60 5 -70 ACPR FC + 1.98 MHz 0 Normalized Bias Voltage (V) Efficiency Adj. Ch. Power Ratio (dBc) -10 30 -80 33 35 37 39 41 43 45 1.03 0.15 A 1.02 0.44 A 1.01 0.73 A 1.10 A 1.00 2.20 A 0.99 3.30 A 0.98 4.41 A 0.97 5.51 A 0.96 0.95 -20 47 0 20 40 60 80 100 Case Temperature (°C) Output Power, Avg. (dBm) Data Sheet 32 Bias Voltage vs. Temperature IS-95 CDMA Performance VDD = 28 V, IDQ = 750 mA, ƒ = 1880 MHz TCASE = 90°C 30 Drain Voltage (V) Output Power (dBm) 35 28 5 of 11 Rev. 02.1, 2009-02-20 PTFA181001E PTFA181001F Typical Performance (cont.) Three-Carrier CDMA2000 Performance 40 -35 35 -40 30 -45 Efficiency 25 -50 -55 20 ACP Up 15 -60 10 -65 ALT Up 5 -70 ACP Low Adj. Ch. Power Ratio (dBc) Drain Efficiency (%) VDD = 28 V, IDQ = 750 mA, ƒ = 1880 MHz -75 0 33 35 37 39 41 43 45 47 Output Power, Avg. (dBm) RD G E NE R Broadband Circuit Impedance Z Source Ω Frequency Z Load Ω MHz R jX R jX 1805 4.62 –6.23 1.71 2.79 1830 4.18 –6.10 1.41 2.92 1850 4.20 –6.13 1.47 3.05 1860 4.58 –6.20 1.99 3.13 1880 4.42 –6.36 1.91 3.16 Data Sheet 6 of 11 1880 MHz 1805 MHz 0.1 0.0 S Z Load Z Source 1805 MHz 0. 1 1880 MHz WA <--- G DTOW ARD LOA GTHS N E L VE - WAV E LE NGT H S T OW A Z Load 0 .1 D Z Source Z0 = 50 Ω Rev. 02.1, 2009-02-20 PTFA181001E PTFA181001F Reference Circuit C1 0.001µF R2 1.3K V R1 1.2K V QQ1 LM7805 VDD Q1 BCP56 C2 0.001µF R3 2K V C3 0.001µF R4 2K V R5 10 V C4 10µF 35V R6 5.1K V C5 0.1µF R8 2K V R7 5.1K V C6 1µF C7 0.01µF L1 C8 10pF l5 R9 10 V l1 C12 10pF l3 l6 C14 10µF 50V V DD C15 10µF 50V C24 10pF C21 1.5pF DUT l2 C13 1µF l8 l4 C9 10pF R F_IN C11 1µF l7 l10 l11 l12 l13 C22 1.5pF C10 0.6pF l14 l15 RF_OUT C23 0.6pF l9 L2 C16 1µF C17 10pF C18 1µF C19 10µF 50V a181001ef_sch_06-04-18 C20 10µF 50V Reference circuit schematic for ƒ = 1880 MHz Circuit Assembly Information DUT PCB PTFA181001E or PTFA181001F 0.76 mm [.030"] thick, εr = 4.5 LDMOS Transistor Rogers TMM4 2 oz. copper Microstrip Electrical Characteristics at 1880 MHz1 Dimensions: L x W (mm) Dimensions: L x W (in.) l1 l2 l3 l4 l5 l6 l7 l8, l9 l10 l11 (taper) l12 (taper) l13 l14 l15 0.314 0.172 0.016 0.024 0.218 0.019 0.044 0.233 0.039 0.037 0.033 0.069 0.038 0.331 λ, 50.0 Ω λ, 38.0 Ω λ, 11.4 Ω λ, 60.0 Ω λ, 60.0 Ω λ, 6.9 Ω λ, 6.9 Ω λ, 53.0 Ω λ, 4.9 Ω λ, 4.9 Ω / 10.3 Ω λ, 10.3 Ω / 41.0 Ω λ, 41.0 Ω λ, 41.0 Ω λ, 50.0 Ω 27.43 x 1.37 14.73 x 2.16 1.27 x 10.16 2.24 x 0.99 19.33 x 0.99 1.52 x 17.78 3.43 x 17.78 20.45 x 1.24 3.10 x 25.65 2.92 x 25.65 / 11.43 2.79 x 11.43 / 1.91 6.35 x 1.91 3.25 x 1.91 28.98 x 1.37 1.080 0.580 0.050 0.088 0.761 0.060 0.135 0.805 0.122 0.115 0.110 0.250 0.128 1.141 x 0.054 x 0.085 x 0.400 x 0.039 x 0.039 x 0.700 x 0.700 x 0.049 x 1.010 x 1.010 / 0.450 x 0.450 / 0.075 x 0.075 x 0.075 x 0.054 1Electrical characteristics are rounded. Data Sheet 7 of 11 Rev. 02.1, 2009-02-20 PTFA181001E PTFA181001F Reference Circuit (cont.) R3 R5 R5 C5 R6 R3 QQ1 C1 C3 R4 C4 R2 C5 R6 VDD C2 R1 C6 R7 C10 C8 C7 R8 R9 C9 C11 C13 C6 C8 R8 C24 C22 C18 C16 C19 C2 R1 C7 C15 C14 VDD C1 Q1 R7 C12 C21 C23 R2 VDD L1 Q1 C3 R4 C4 QQ1 a181001ef_dtl C20 C17 VDD A181001_01 L2 a181001ef_assy Reference circuit assembly diagram (not to scale) Component Description Suggested Manufacturer P/N or Comment C1, C2, C3 C4 C5 C6, C11, C13, C16, C18 C7 C8, C9, C12, C17, C24 C10, C23 C14, C15, C19, C20 C21, C22 L1, L2 Q1 QQ1 R1 R2 R3, R8 R4 R5, R9 R6, R7 Capacitor, 0.001 µF Tantalum capacitor, 10 µF, 35 V Capacitor, 0.1 µF Capacitor, 1.0 µF Capacitor, 0.01 µF Ceramic capacitor, 10 pF Ceramic capacitor, 0.6 pF Tantalum capacitor, 10 µF, 50 V Ceramic capacitor, 1.5 pF Ferrite, 8.9 mm Transistor Voltage regulator Chip Resistor 1.2 k-ohms Chip Resistor 1.3 k-ohms Chip Resistor 2 k-ohms Potentiometer 2 k-ohms Chip Resistor 10 ohms Chip Resistor 5.1 k-ohms Digi-Key Digi-Key Digi-Key ATC ATC ATC ATC Garrett Electronics ATC Elna Magnetics Infineon Technologies National Semiconductor Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key PCC1772CT-ND 399-1655-2-ND PCC104BCT-ND 920C105 200B 103 100B 100 100B 0R6 TPSE106K050R0400 100B 1R5 BDS 4.6/3/8.9-4S2 BCP56 LM7805 P1.2KGCT-ND P1.3KGCT-ND P2KECT-ND 3224W-202ETR-ND P10ECT-ND P5.1KECT-ND Gerber files for this circuit available on request Data Sheet 8 of 11 Rev. 02.1, 2009-02-20 PTFA181001E PTFA181001F Package Outline Specifications Package H-36248-2 (45° X 2.72 [.107]) CL 4.83±0.51 [.190±.020] D FLANGE 9.78 [.385] LID 9.40 +0.10 19.43 ±0.51 [.765±.020] –0.15 [.370 +.004 –.006 ] S C L G 2X 12.70 [.500] 2X R1.63 [R.064] 4X R1.52 [R.060] 27.94 [1.100] 19.81±0.20 [.780±.008] 1.02 [.040] C L SPH 1.57 [.062] 3.61±0.38 [.142±.015] 0.0381 [.0015] -A34.04 [1.340] 0 7 1 1 1 7 _ h -3 6 2 4 8 -2 _ p o Diagram Notes—unless otherwise specified: 1. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001]. 2. All tolerances ± 0.127 [.005] unless specified otherwise. 3. Pins: D = drain, S = source, G = gate. 4. Interpret dimensions and tolerances per ASME Y14.5M-1994. 5. Primary dimensions are mm. Alternate dimensions are inches. 6. Gold plating thickness: S, D, G - flange & leads: 1.14 ± 0.38 micron [45 ± 15 microinch] Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/products Data Sheet 9 of 11 Rev. 02.1, 2009-02-20 PTFA181001E PTFA181001F Package Outline Specifications (cont.) Package H-37248-2 ( 45° X 2.72 [.107]) CL 4.83±0.51 [.190±.020] D +0.10 LID 9.40 –0.15 [.370+.004 –.006 ] FLANGE 9.78 [.385] C L 19.43±0.51 [.765±.020] G 4X R0.508+0.381 –0.127 [R.020+.015 – .005] 2X 12.70 [.500] 19.81±0.20 [.780±.008] C L SPH 1.57 [.062] 1.02 [.040] 0.0381 [.0015] -A- S 0 7 1 1 1 7 _ h -3 7 2 4 8 -2 _ p o 3.61±0.38 [.142±.015] 20.57 [.810] Diagram Notes—unless otherwise specified: 1. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001]. 2. All tolerances ± 0.127 [.005] unless specified otherwise. 3. Pins: D = drain, S = source, G = gate. 4. Interpret dimensions and tolerances per ASME Y14.5M-1994. 5. Primary dimensions are mm. Alternate dimensions are inches. 6. Gold plating thickness: S, D, G - flange & leads: 1.14 ± 0.38 micron [45 ± 15 microinch] Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/products Data Sheet 10 of 11 Rev. 02.1, 2009-02-20 PTFA181001E/F Confidential, Limited Internal Distribution Revision History: 2009-02-20 2006-04-14, Data Sheet Previous Version: Page Subjects (major changes since last revision) Update to product V4, with new package technologies. Update package outline diagrams. 1, 2, 9, 10 8 Data Sheet Fixed typing error We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] To request other information, contact us at: +1 877 465 3667 (1-877-GO-LDMOS) USA or +1 408 776 0600 International GOLDMOS® is a registered trademark of Infineon Technologies AG. Edition 2009-02-20 Published by Infineon Technologies AG 81726 Munich, Germany © 2009 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com/rfpower). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet 11 of 11 Rev. 02.1, 2009-02-20