INTEGRATED CIRCUITS DATA SHEET UBA2033 HF full bridge driver IC Product specification 2002 Oct 08 Philips Semiconductors Product specification HF full bridge driver IC UBA2033 FEATURES GENERAL DESCRIPTION • Full bridge driver circuit The UBA2033 is a high voltage monolithic integrated circuit made in the EZ-HV SOI process. The circuit is designed for driving the MOSFETs in a full bridge configuration. In addition, it features a disable function, an internal adjustable oscillator and an external drive function with a low-voltage level shifter for driving the bridge. To guarantee an accurate 50% duty factor, the oscillator signal can be passed through a divider before being fed to the output driver. • Integrated bootstrap diodes • Integrated high voltage level shift function • High voltage input for the internal supply voltage • 550 V maximum voltage • Bridge disable function • Input for start-up delay • Adjustable oscillator frequency • Predefined bridge position during start-up. APPLICATIONS • The UBA2033 can drive (via the MOSFETs) any kind of load in a full bridge configuration • The circuit is especially designed as a commutator for High Intensity Discharge (HID) lamps. ORDERING INFORMATION TYPE NUMBER UBA2033TS 2002 Oct 08 PACKAGE NAME DESCRIPTION VERSION SSOP28 plastic shrink small outline package; 28 leads; body width 5.3 mm SOT341-1 2 Philips Semiconductors Product specification HF full bridge driver IC UBA2033 BLOCK DIAGRAM −LVS handbook, full pagewidth +LVS EXTDR 1 2 3 16 6 HIGHER LEFT DRIVER HV 15 17 SGND 14 9 UVLO SHL FSR LOGIC SIGNAL GENERATOR HIGHER RIGHT DRIVER HIGH VOLTAGE LEVEL SHIFTER 28 26 13 RC GHL 27 STABILIZER VDD FSL OSCILLATOR UBA2033TS 2 LOWER RIGHT DRIVER 23 LOWER LEFT DRIVER 20 GHR SHR GLR 10 SU 12 LOW VOLTAGE LEVEL SHIFTER LOGIC BD 1.29 V bridge disable 11 n.c. DD Fig.1 Block diagram. 2002 Oct 08 4, 5, 7, 8, 18, 19, 22, 24, 25 3 GLL 21 PGND MBL457 Philips Semiconductors Product specification HF full bridge driver IC UBA2033 PINNING SYMBOL PIN DESCRIPTION −LVS 1 negative supply voltage (for logic input) EXTDR 2 oscillator signal input +LVS 3 positive supply voltage (for logic input) n.c. 4 not connected n.c. 5 not connected HV 6 high voltage supply input n.c. 7 not connected n.c. 8 not connected VDD 9 internal low voltage supply SU 10 DD handbook, halfpage −LVS 1 28 GHR EXTDR 2 27 FSR +LVS 26 SHR 3 n.c. 4 25 n.c. n.c. 5 24 n.c. input signal for start-up delay HV 6 23 GLR 11 divider disable input n.c. 7 BD 12 bridge disable control input n.c. 8 RC 13 RC input for internal oscillator SGND 14 signal ground GHL 15 gate of higher left output MOSFET FSL 16 floating supply voltage left SHL 17 source of higher left MOSFET n.c. 18 n.c. 22 n.c. UBA2033TS 21 PGND VDD 9 20 GLL SU 10 19 n.c. DD 11 18 n.c. BD 12 17 SHL not connected RC 13 16 FSL 19 not connected SGND 14 15 GHL GLL 20 gate of lower left output MOSFET PGND 21 power ground n.c. 22 not connected GLR 23 gate of lower right output MOSFET n.c. 24 not connected n.c. 25 not connected SHR 26 source of higher right MOSFET FSR 27 floating supply voltage right GHR 28 gate of higher right output MOSFET 2002 Oct 08 MBL458 Fig.2 Pin configuration. 4 Philips Semiconductors Product specification HF full bridge driver IC UBA2033 • Internal oscillator mode. FUNCTIONAL DESCRIPTION In this mode the bridge commutating frequency is determined by the values of an external resistor (Rosc) and capacitor (Cosc). In this mode pin EXTDR must be connected to pin +LVS. To realize an accurate 50% duty factor, the internal divider should be used. The internal divider is enabled by connecting pin DD to SGND. Due to the presence of the divider the bridge frequency is half the oscillator frequency. The commutation of the bridge will take place at the falling edge of the signal on pin RC. To minimize the current consumption pins +LVS, −LVS and EXTDR can be connected together to either pin SGND or VDD. In this way the current source in the logic voltage supply circuit is shut off. Supply voltage The UBA2033 is powered by a supply voltage applied to pin HV, for instance the supply voltage of the full bridge. The IC generates its own low supply voltage for the internal circuitry. Therefore an additional low voltage supply is not required. A capacitor has to be connected to pin VDD to obtain a ripple-free internal supply voltage. The circuit can also be powered by a low voltage supply directly applied to pin VDD. In this case pin HV should be connected to pin VDD or SGND. Start-up With an increasing supply voltage the IC enters the start-up state; the higher power transistors are kept off and the lower power transistors are switched on. During the start-up state the bootstrap capacitors are charged and the bridge output current is zero. The start-up state is defined until VDD = VDD(UVLO), where UVLO stands for Under Voltage Lock-out. The state of the outputs during the start-up phase is overruled by the bridge disable function. • External oscillator mode without the internal divider. Release of the power drive • External oscillator mode with the internal divider. In the external oscillator mode the external source is connected to pin EXTDR and pin RC is short-circuited to pin SGND to disable the internal oscillator. If the internal divider is disabled (pin DD = VDD) the duty factor of the bridge output signal is determined by the external oscillator signal and the bridge frequency equals the external oscillator frequency. At the moment the supply voltage on pin VDD or HV exceeds the level of release power drive, the output voltage of the bridge depends on the control signal on pin EXTDR (see Table 1). The bridge position after start-up, disable, or delayed start-up (via pin SU) depends on the status of the pins DD and EXTDR. If pin DD = LOW (divider enabled) the bridge will start in the pre-defined position: pin GLR and pin GHL = HIGH and pin GLL and pin GHR = LOW. If pin DD = HIGH (divider disabled) the bridge position will depend on the status of pin EXTDR. The external oscillator mode can also be used with the internal divider function enabled (pin RC and pin DD = SGND). Due to the presence of the divider the bridge frequency is half the external oscillator frequency. The commutation of the bridge is triggered by the falling edge of the EXTDR signal with respect to V−LVS. The design equation for the bridge oscillator frequency is: 1 f bridge = -------------------------------------------------( k osc × R osc × C osc ) If the supply voltage on pin VDD or HV decreases and drops below the reset level of power drive the IC enters the start-up state again. Non-overlap time The non-overlap time is the time between turning off the conducting pair of MOSFETs and turning on the next pair. The non-overlap time is internally fixed to a very small value, which allows an HID system to operate with a very small phase difference between load current and full bridge voltage (pins SHL and SHR). Especially when igniting an HID lamp via a LC resonance circuit, a small ‘dead time’ is essential. The high maximum operating frequency, together with a small ‘dead time’, also gives the opportunity to ignite the HID lamp at the third harmonic of the full bridge voltage, thereby reducing costs in the magnetic power components. Oscillation At the point where the supply voltage on pin HV crosses the level of release power drive, the bridge begins commutating between the following two defined states: • Higher left and lower right MOSFETs on, higher right and lower left MOSFETs off • Higher left and lower right MOSFETs off, higher right and lower left MOSFETs on. The oscillation can take place in three different modes: 2002 Oct 08 5 Philips Semiconductors Product specification HF full bridge driver IC UBA2033 ’Dead time’ can be increased by adding a resistor (for slowly turning on the full bridge power FETs) and a diode (for quickly turning off the full bridge power FETs) in parallel, both in series with the gate drivers (see Fig.3). moment the gate drive voltage is equal to the voltage on pin VDD for the low side transistors and VDD − 0.6 V for the high side transistors. If this voltage is too low for sufficient drive of the MOSFETs the release of the power drive can be delayed via pin SU. Divider function A simple RC filter (R between pins VDD and SU; C between pins SU and SGND) can be used to make a delay, or a control signal from a processor can be used. If pin DD = SGND, then the divider function is enabled/present. If the divider function is present there is no direct relation between the position of the bridge output and the status of pin EXTDR. Bridge disable The bridge disable function can be used to switch off all the MOSFETs as soon as the voltage on pin BD exceeds the bridge disable voltage (1.29 V). The bridge disable function overrules all the other states. Start-up delay Normally, the circuit starts oscillating as soon as pin VDD or HV reaches the level of release power drive. At this Table 1 Logic table; note 1 DEVICE STATUS Start-up state Oscillation state INPUTS BD SU DD OUTPUTS EXTDR GHL GHR GLL GLR HIGH X X X LOW LOW LOW LOW LOW X X X LOW LOW HIGH HIGH HIGH X X X LOW LOW LOW LOW LOW LOW X X LOW LOW HIGH HIGH LOW HIGH HIGH HIGH LOW HIGH HIGH LOW LOW HIGH LOW LOW HIGH LOW HIGH LOW LOW HIGH LOW HIGH HIGH LOW LOW HIGH LOW LOW-to-HIGH HIGH HIGH-to-LOW Note 1. X = don’t care a) BD, SU and DD logic levels are with respect to SGND b) EXTDR logic levels are with respect to V−LVS c) GHL logic levels are with respect to SHL d) GHR logic levels are with respect to SHR e) GLL and GLR logic levels are with respect to PGND f) If pin DD = LOW the bridge enters the state (oscillation state and pin BD = LOW and pin SU = HIGH) in the pre-defined position pin GHL and pin GLR = HIGH and pin GLL and pin GHR = LOW. 2002 Oct 08 6 Philips Semiconductors Product specification HF full bridge driver IC UBA2033 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); all voltages are measured with respect to SGND; positive currents flow into the IC. SYMBOL VDD PARAMETER supply voltage (low voltage) VHV supply voltage (high voltage) VFSL floating supply voltage left VFSR MIN. MAX. UNIT DC value 0 14 V transient at t < 0.1 µs 0 17 V 0 550 V VSHL = VSHR = 550 V 0 564 V VSHL = VSHR = 0 V 0 14 V VSHL = VSHR = 550 V 0 564 V VSHL = VSHR = 0 V 0 14 V source voltage for higher left MOSFETs with respect to PGND and SGND −3 +550 V with respect to SGND; t < 1 µs −14 − V source voltage for higher right MOSFETs with respect to PGND and SGND −3 +550 V with respect to SGND; t < 1 µs −14 − V VPGND power ground voltage with respect to SGND 0 5 V V−LVS negative supply voltage for logic input −0.9 +17 V I−LVS negative supply current for logic input pin EXTDR = HIGH −1 − mA V+LVS positive supply voltage for logic input VHV = 0 V; DC value 0 14 V transient at t < 0.1 µs 0 17 V Vi(EXTDR) input voltage from external oscillator on pin EXTDR with respect to V−LVS 0 V+LVS V Vi(RC) input voltage on pin RC DC value 0 VDD V transient at t < 0.1 µs 0 17 V Vi(SU) input voltage on pin SU DC value 0 VDD V transient at t < 0.1 µs 0 17 V DC value 0 VDD V transient at t < 0.1 µs 0 17 V DC value 0 VDD V transient at t < 0.1 µs 0 17 V repetitive 0 4 V/ns VSHL VSHR Vi(BD) floating supply voltage right CONDITIONS input voltage on pin BD Vi(DD) input voltage on pin DD SR slew rate at output pins Tj junction temperature −40 +150 °C Tamb ambient temperature −40 +150 °C Tstg storage temperature −55 +150 °C Vesd electrostatic discharge voltage on pins HV, +LVS, −LVS, EXTDR, FSL, GHL, SHL, SHR, GHR and FSR − 900 V note 1 Note 1. In accordance with the Human Body Model (HBM): equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor. 2002 Oct 08 7 Philips Semiconductors Product specification HF full bridge driver IC UBA2033 THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER CONDITIONS thermal resistance from junction to ambient VALUE UNIT 100 K/W in free air QUALITY SPECIFICATION In accordance with “SNW-FQ-611D”. CHARACTERISTICS Tj = 25 °C; all voltages are measured with respect to SGND; positive currents flow into the IC; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT High voltage IHV high voltage supply current t < 0.5 s and VHV = 550 V 0 − 30 µA IFSL, IFSR high voltage floating supply current t < 0.5 s and VFSL = VFSR = 564 V 0 − 30 µA VHV = 11 V; note 1 − 0.5 1.0 mA Start-up; powered via pin HV Ii(HV) HV input current VHV(rel) level of release power drive voltage 11 12.5 14 V VHV(UVLO) reset level of power drive voltage 8.5 10 11.5 V VHV(hys) HV hysteresis voltage 2.0 2.5 3.0 V VDD internal supply voltage VHV = 20 V 10.5 11.5 13.5 V VDD = 8.25 V; note 2 − 0.5 1.0 mA 8.25 9.0 9.75 V Start-up; powered via pin VDD Ii(DD) VDD input current VDD(rel) level of release power drive voltage VDD(UVLO) reset level of power drive voltage 5.75 6.5 7.25 V VDD(hys) hysteresis voltage 2.0 2.5 3.0 V Output stage Ron(H) higher MOSFETs on resistance VFSR = VFSL = 12 V (with respect to SHR and SHL); Isource = 50 mA 15 21 26 Ω Roff(H) higher MOSFETs off resistance VFSR = VFSL = 12 V (with respect to SHR and SHL); Isink = 50 mA 9 14 18 Ω Ron(L) lower MOSFETs on resistance VDD = 12 V; Isource = 50 mA 15 21 26 Ω Roff(L) lower MOSFETs off resistance VDD = 12 V; Isink = 50 mA 9 14 18 Ω Io(source) output source current VDD = VFSL = VFSR = 12 V; VGHR = VGHL = VGLR = VGLL = 0 V 130 180 − mA Io(sink) output sink current VDD = VFSL = VFSR = 12 V; 150 VGHR = VGHL = VGLR = VGLL = 12 V 200 − mA Vdiode bootstrap diode voltage drop Idiode = 20 mA 1.7 2.1 2.5 V tno non-overlap time − − 250 ns VFSL HS lockout voltage left 3.0 4.0 5.0 V 2002 Oct 08 8 Philips Semiconductors Product specification HF full bridge driver IC SYMBOL UBA2033 PARAMETER CONDITIONS VFSR HS lockout voltage right IFSL FS supply current left IFSR FS supply current right VDD = 12 V MIN. TYP. MAX. UNIT 3.0 4.0 5.0 V VFSL = 12 V 2 4 6 µA VFSR = 12 V 2 4 6 µA DD input VIH HIGH-level input voltage 6 − − V VIL LOW-level input voltage − − 3 V Ii(DD) input current into pin DD − − 1 µA 4 − − V SU input VIH HIGH-level input voltage VDD = 12 V VIL LOW-level input voltage − − 2 V Ii(SU) input current into pin SU − − 1 µA External drive input VIH HIGH-level input voltage with respect to V−LVS 4.0 − − V VIL LOW-level input voltage with respect to V−LVS − − 1.0 V Ii(EXTDR) input current into pin EXTDR − − 1 µA fbridge bridge frequency − − 250 kHz note 3 Low voltage logic supply I+LVS low voltage supply current V+LVS = VEXTDR = 5.75 to 14 V with − respect to V−LVS 250 500 µA V+LVS low voltage supply voltage with respect to V−LVS − 14 V 5.75 Bridge disable input Vref(dis) disable reference voltage 1.23 1.29 1.35 V Ii(BD) disable input current − − 1 µA Internal oscillator fbridge bridge oscillating frequency note 3 − − 100 kHz ∆fosc(T) oscillator frequency variation with temperature fbridge = 250 Hz and Tamb = −40 to +150 °C −10 0 +10 % ∆fosc(VDD) oscillator frequency variation with VDD fbridge = 250 Hz and VDD = 7.25 to 14 V −10 0 +10 % kH high level trip point VRC(high) = kH × VDD 0.38 0.4 0.42 kL low level trip point VRC(low) = kL × VDD − 0.01 − kosc oscillator constant fbridge = 250 Hz 0.94 1.02 1.10 Rext external resistor to VDD 100 − − kΩ Notes 1. The current is specified without commutation of the bridge. The current into pin HV is limited by a thermal protection circuit. The current is limited to 11 mA at Tj = 150 °C. 2. The current is specified without commutation of the bridge and pin HV is connected to VDD. 3. The minimum frequency is mainly determined by the value of the bootstrap capacitors. 2002 Oct 08 9 Philips Semiconductors Product specification HF full bridge driver IC UBA2033 APPLICATION INFORMATION by connecting pin DD to SGND. The IC is powered by the high voltage supply. Because the internal oscillator is used, the bridge commutating frequency is determined by the values of Rosc and Cosc. The bridge starts oscillating when the HV supply voltage exceeds the level of release power drive (typically 12.5 V on pin HV). If the supply voltage on pin HV drops below the reset level of power drive (typically 10 V on pin HV), the UBA2033 enters the start-up state. Basic application A basic full bridge configuration with an HID lamp is shown in Fig.3. The bridge disable, the start-up delay and the external drive functions are not used in this application. The pins −LVS, +LVS, EXTDR and BD are short-circuited to SGND. The internal oscillator is used and to realize a 50% duty cycle the internal divider function has to be used handbook, full pagewidth high voltage 550 V (max) −LVS EXTDR +LVS HV VDD SU Ci Rosc C3 DD BD RC SGND Cosc R>100 Ω 1 28 2 27 3 26 FSR C1 SHR R>100 Ω 23 10 UBA2033TS 21 11 20 12 17 13 16 14 15 LR IGNITOR LL GLR PGND GLL SHL FSL C2 GHL MBL459 GND Fig.3 Basic configuration. 2002 Oct 08 R>100 Ω GHR 6 9 HL HR 10 R>100 Ω Philips Semiconductors Product specification HF full bridge driver IC UBA2033 Application with external control short-circuited to SGND. The bridge commutation frequency is determined by the external oscillator. The bridge disable input (pin BD) can be used to immediately turn off all four MOSFETs in the full bridge. Figure 4 shows an application containing a system ground-referenced control circuit. Pin +LVS can be connected to the same supply as the external oscillator control unit and pin −LVS is connected to SGND. Pin RC is voltage handbook,high full pagewidth 550 V (max) −LVS low voltage EXTDR +LVS HV Ci VDD EXTERNAL OSCILLATOR CONTROL CIRCUIT SU DD BD RC SGND C3 R>100 Ω 1 28 2 27 3 26 FSR SHR C1 R>100 Ω 23 10 UBA2033TS 21 11 20 12 17 13 16 14 15 LR IGNITOR LL GLR PGND GLL SHL FSL C2 GHL MBL460 GND Fig.4 External control configuration. 2002 Oct 08 R>100 Ω GHR 6 9 HL HR 11 R>100 Ω Philips Semiconductors Product specification HF full bridge driver IC UBA2033 Additional application information GATE CHARGE AND SUPPLY CURRENT AT HIGH FREQUENCY USE GATE RESISTORS The total gate current needed to charge the gates of the power MOSFETs equals: At ignition of an HID lamp, a large EMC spark occurs. This can result in a large voltage transient or oscillation at the gates of the full bridge MOSFETs (LL, LR, HR and HL). When these gates are directly coupled to the gate drivers (pins GHR, GLR, GHL and GLL), voltage overstress of the driver outputs may occur. Therefore it is advised to add a resistor with a minimum value of 100 Ω in series with each gate driver to isolate the gate driver outputs from the actual power MOSFETs gate. I gate = 4 × f bridge × Q gate Where: Igate = gate current fbridge = bridge frequency Qgate = gate charge. This current is supplied via the internal low voltage supply (VDD). Since this current is limited to 11 mA (see “Characteristics” table note 1), at higher frequencies and with MOSFETs having a relative high gate charge, this maximum VDD supply current may not be sufficient anymore. As a result the internal low voltage supply (VDD) and the gate drive voltage will drop resulting in an increase of the higher resistance (Ron) of the full bridge MOSFETs. In this case an auxiliary low voltage supply is necessary. ’Dead time’ can also be adjusted via the combination gate resistor and gate-source capacitance. 2002 Oct 08 12 Philips Semiconductors Product specification HF full bridge driver IC UBA2033 PACKAGE OUTLINE SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm D SOT341-1 E A X c HE y v M A Z 28 15 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 14 w M bp e detail X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2.0 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 10.4 10.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.1 0.7 8 0o Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT341-1 2002 Oct 08 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 95-02-04 99-12-27 MO-150 13 o Philips Semiconductors Product specification HF full bridge driver IC UBA2033 SOLDERING If wave soldering is used the following conditions must be observed for optimal results: Introduction to soldering surface mount packages • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. Reflow soldering The footprint must incorporate solder thieves at the downstream end. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 220 °C for thick/large packages, and below 235 °C for small/thin packages. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Wave soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. 2002 Oct 08 14 Philips Semiconductors Product specification HF full bridge driver IC UBA2033 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, HBGA, LFBGA, SQFP, TFBGA not suitable suitable(2) HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, SMS not PLCC(3), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO REFLOW(1) suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2002 Oct 08 15 Philips Semiconductors Product specification HF full bridge driver IC UBA2033 DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2002 Oct 08 16 Philips Semiconductors Product specification HF full bridge driver IC UBA2033 NOTES 2002 Oct 08 17 Philips Semiconductors Product specification HF full bridge driver IC UBA2033 NOTES 2002 Oct 08 18 Philips Semiconductors Product specification HF full bridge driver IC UBA2033 NOTES 2002 Oct 08 19 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: [email protected]. SCA74 © Koninklijke Philips Electronics N.V. 2002 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 613502/01/pp20 Date of release: 2002 Oct 08 Document order number: 9397 750 09574