PHILIPS TDA8001T

INTEGRATED CIRCUITS
DATA SHEET
TDA8001
Smart card interface
Product specification
Supersedes data of 1995 Feb 01
File under Integrated Circuits, IC02
1996 Dec 12
Philips Semiconductors
Product specification
Smart card interface
TDA8001
FEATURES
APPLICATIONS
• Protected I/O line
• Pay TV (multistandards conditional access system,
videoguard, newscript)
• VCC regulation (5 V ±5%, 100 mA max. with controlled
rise and fall times)
• Multi-application smart card readers (banking, vending
machine, electronic payment identification).
• VPP generation (12.5, 15 or 21 V ±2.5%, 50 mA max.,
with controlled rise and fall times) (only at TDA8001 and
TDA8001T)
GENERAL DESCRIPTION
• Clock generation (up to 10 MHz), with synchronous
frequency doubling
The TDA8001 is a complete, low-cost analog interface
which can be positioned between an asynchronous smart
card (ISO 7816) and a microcontroller. It is directly
compatible with the new Datacom chip verifier.
• Overload, thermal and card extraction protections
• Current limitation in case of short-circuit
• Idle mode and special circuitry for spikes killing during
powering on and off
The complete supply, protection and control functions are
realized with only a few external components, making this
product very attractive for consumer applications
(see Chapter “Application information”).
• Two voltage supervisors (digital and analog supplies)
• Automatic activation and deactivation sequences
through an independent internal clock
• Enhanced ESD protections on card side (4 kV min.)
• Easy chaining for multiple card readers
• ISO 7816 compatibility.
ORDERING INFORMATION
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
TDA8001;
TDA8001A
DIP28
plastic dual in-line package; 28 leads (600 mil)
SOT117-1
TDA8001T;
TDA8001AT
SO28
plastic small outline package; 28 leads; body width 7.5 mm
SOT136-1
1996 Dec 12
2
Philips Semiconductors
Product specification
Smart card interface
TDA8001
QUICK REFERENCE DATA
SYMBOL
PARAMETER
VDD
supply voltage
IDD
supply current
CONDITIONS
MIN.
TYP.
MAX.
UNIT
6.7
−
18
V
idle mode; VDD = 12 V
−
32
−
mA
active modes; unloaded
−
45
−
mA
Vth2
threshold voltage on VSUP
4.5
−
4.72
V
Vth4
threshold voltage on VDD
6
−
6.5
V
VCC
card supply voltage
including static and dynamic
loads on 100 nF capacitor
4.75
5.0
5.25
V
ICC
card supply current
operating
−
−
−100
mA
detection
−
−150
−
mA
limitation
−
−
−200
mA
−
−
30
V
VH
high voltage supply for
VPP
VPP
card programming
voltage (only at TDA8001
and TDA8001T)
(P = 5, 12.5, 15 and 21 V)
including static and dynamic
loads on 100 nF capacitor
P − 2.5% −
P + 2.5% V
IPP
programming current
(read or write mode)
operating
−
−
−50
mA
detection
−
−75
−
mA
limitation
−
−
−100
mA
0.38
−
V/µs
maximum load capacitor 150 nF −
SR
slew rate on VCC and VPP
(rise and fall)
tde
deactivation cycle duration
75
100
125
µs
fclk
clock frequency
0
−
8
MHz
Ptot
continuous total power
dissipation
TDA8001; Tamb = +70 °C;
see Fig.10
−
−
0.92
W
TDA8001T; Tamb = +70 °C;
see Fig.11
−
−
2
W
0
−
+70
°C
Tamb
1996 Dec 12
operating ambient
temperature
3
Philips Semiconductors
Product specification
Smart card interface
TDA8001
BLOCK DIAGRAM
handbook, full pagewidth
ALARM
ALARM
I/O(µC)
RSTIN
VSUP
DELAY
15
16
VDD
GND1
13
12
17
18
VOLTAGE
SUPERVISOR
MAIN
SUPPLY
28
3
PROTECTIONS
AND
ENABLE
26
4
TDA8001
19
22
LOGIC
9
CVNC
I/O
RST
PRES
8
OFF
PRES
2
INTERNAL
CLOCK
DETECT
CMDVCC
PROTECTIONS
20
27
VCC
GENERATOR
14
CLOCK
ENABLE
5
VPP
GENERATOR
10
VCC
CMD7
25
GND2
23
CMD3.5
CLKOUT2
VPP12.5
VPP15
VPP21
CLOCK
CIRCUITRY
CLK
24
6
7
VPP
21
OSCILLATOR
1
11
MBH813
XTAL
VH
Fig.1 Block diagram.
1996 Dec 12
4
Philips Semiconductors
Product specification
Smart card interface
TDA8001
PINNING
PIN
SYMBOL
DESCRIPTION
TDA8001
TDA8001T
TDA8001A
TDA8001AT
XTAL
1
1
crystal connection
DETECT
2
2
card extraction open collector output (active LOW)
I/O
3
3
data line to/from the card
RST
4
4
card reset output
CLK
5
5
clock output to the card
VPP12.5
6
−
control input for applying the 12.5 V programming voltage (active LOW)
n.c.
−
6
not connected
VPP15
7
−
control input for applying the 15 V programming voltage (active LOW)
n.c.
−
7
not connected
PRES
8
8
card presence contact input (active LOW)
PRES
9
9
card presence contact input (active HIGH)
VPP
10
−
card programming voltage output
n.c.
−
10
not connected
VH
11
11
HIGH voltage supply for VPP generation
GND1
12
12
ground 1
VDD
13
13
positive supply voltage
VCC
14
14
card supply output voltage
VSUP
15
15
voltage supervisor input
DELAY
16
16
external capacitor connection for delayed reset timing
ALARM
17
17
open-collector reset output for the microcontroller (active HIGH)
ALARM
18
18
open-collector reset output for the microcontroller (active LOW)
OFF
19
19
open-collector interrupt output to the microcontroller (active LOW)
CMDVCC
20
20
control input for applying supply voltage to the card (active LOW)
VPP21
21
−
control input for applying the 21 V programming voltage (active LOW)
n.c.
−
21
not connected
CVNC
22
22
internally generated 5 V reference, present when VDD is on; to be
decoupled externally (100 nF)
CMD3.5
or CDMTC
23
23
control input for having the crystal frequency divided-by-4 at pin CLK
CLKOUT2
24
24
clock output to the microcontroller, or any other R4590
(crystal frequency divided by two)
GND2
25
25
ground 2
RSTIN
26
26
card reset input from the microcontroller (active HIGH)
CMD7
or CDMS
27
27
control input for having the crystal frequency divided by 2 at pin CLK
I/O(µC)
28
28
data line to/from the microcontroller
1996 Dec 12
5
Philips Semiconductors
Product specification
Smart card interface
TDA8001
handbook, halfpage
handbook, halfpage
XTAL 1
28 I/O(µC)
DETECT 2
XTAL 1
27 CMD7 or CDMS
DETECT 2
27 CMD7 or CDMS
I/O 3
26 RSTIN
I/O 3
26 RSTIN
RST 4
25 GND2
RST 4
25 GND2
CLK 5
24 CLKOUT2
CLK 5
24 CLKOUT2
VPP12.5 6
VPP15 7
PRES 8
n.c. 6
23 CMD3.5 or CDMTC
22 CVNC
TDA8001
TDA8001T 21 VPP21
PRES 9
23 CMD3.5 or CDMTC
n.c. 7
22 CVNC
TDA8001A
TDA8001AT
21 n.c.
PRES 8
PRES 9
20 CMDVCC
VPP 10
20 CMDVCC
19 OFF
n.c. 10
19 OFF
VH 11
18 ALARM
VH 11
18 ALARM
GND1 12
17 ALARM
GND1 12
17 ALARM
VDD 13
16 DELAY
VDD 13
16 DELAY
VCC 14
15 VSUP
VCC 14
15 VSUP
MBH811
MBH812
Fig.2 Pin configuration.
1996 Dec 12
28 I/O(µC)
Fig.3 Pin configuration.
6
Philips Semiconductors
Product specification
Smart card interface
TDA8001
CMD3.5 and internal ENRST are sampled in order to give
the first clock pulse the correct width, and to avoid false
pulses during frequency change.
FUNCTIONAL DESCRIPTION
Power supply
The circuit operates within a supply voltage range of
6.7 to 18 V. VDD and GND are the supply pins. All card
contacts remain inactive during power up or down.
The CLKOUT2 pins may be used to clock a
microcontroller or an other TDA8001. The signal 1⁄2 fxtal is
available when the circuit is powered up.
POWER UP
State diagram
The logic part is powered first and is in the reset condition
until VDD reaches Vth1. The sequencer is blocked until VDD
reaches Vth4 + Vhys4.
Once activated, the circuit has six possible modes of
operation:
POWER DOWN
• Activation
• Idle
• Read
When VDD falls below Vth4, an automatic deactivation of
the contacts is performed.
• Write
• Deactivation
Voltage supervisor
• Fault.
This block surveys the 5 V supply of the microcontroller
(VSUP) in order to deliver a defined reset pulse and to avoid
any transients on card contacts during power up or down
of VSUP. The voltage supervisor remains active even if VDD
is powered-down.
Figure 6 shows the way these modes are accessible.
IDLE MODE
After reset, the circuit enters the IDLE state. A minimum
number of circuits are active while waiting for the
microcontroller to start a session.
POWER ON
• All card contacts are inactive
As long as VSUP is below Vth2 + Vhys2 the capacitor CDEL,
connected to pin DELAY, will be discharged. When VSUP
rises to the threshold level, CDEL will be recharged.
ALARM and ALARM remain active, and the sequencer is
blocked until the voltage on the DELAY line reaches Vth3.
• I/O(µC) is high impedance
• Voltage generators are stopped
• Oscillator or XTAL input is running, delivering CLKOUT2
• Voltage supervisors are active.
POWER DOWN (see Fig.4)
The DETECT line is HIGH if a card is present (PRES and
PRES active) and LOW if a card is not present. The OFF
line is HIGH if no hardware problem is detected.
If VSUP falls below Vth2, CDEL will be discharged, ALARM
and ALARM become active, and an automatic deactivation
of the contacts is performed.
ACTIVATION SEQUENCE
Clock circuitry (see Fig.5)
From the IDLE mode, the circuit enters the ACTIVATION
mode when the microcontroller sets the CMDVCC line
(active LOW). The I/O(µC) signal must not be LOW.
The internal circuitry is activated, the internal clock starts
and the sequence according to ISO7816 is performed:
The clock signal (CLK) can be applied to the card in two
different methods:
1. Generation by a crystal oscillator: the crystal, or the
ceramic resonator (4 to 16 MHz) is connected to the
XTAL pin.
• VCC rises from 0 to 5 V
• VPP rises from 0 to 5 V and I/O is enabled
2. Use of a signal frequency (up to 20 MHz), already
present in the system and connected to the XTAL pin
via a 10 nF capacitor (see Fig.14). In both cases the
frequency is first divided-by-two.
• CLK and RST are enabled.
The time interval between steps 1 and 2 is 16 µs, and
64 µs between steps 2 and 3 (see Fig.7).
If CMD7 (respectively CMD3.5) is LOW, the clock signal
(its frequency again divided by two) is enabled and
buffered before being fed to the CLK pin.
1996 Dec 12
7
Philips Semiconductors
Product specification
Smart card interface
TDA8001
The circuit returns to the IDLE mode on the next rising
edge of the clock.
READ MODE
When the activation sequence is completed and, after the
card has replied its Answer-to-Reset, the TDA8001 will be
in the READ mode. Data is exchanged between the card
and the microcontroller via the I/O line.
PROTECTIONS
Main fault conditions are monitored by the circuit:
• Short-circuit or overcurrent on VCC
WRITE MODE
• Short-circuit or overcurrent on VPP
Cards with EPROM memory need a programming voltage
(VPP). When it is required to write to the internal memory
of the card, the microcontroller sets one of the VPP12.5,
VPP15 and VPP21 lines LOW, according to the
programming value given in the Answer-to-Reset.
VPP rises from 5 V to the selected value with a typical slew
rate of 0.38 V/µs. In order to respect the ISO 7816 slopes,
the circuit generates VPP by charging and discharging an
internal capacitor. The voltage on this capacitor is then
amplified by a power stage gain of 5, powered via an
external supply pin VH (30 V max).
• Card extraction during transaction
• Overheating problem
• VSUP drop-out
• VDD drop-out.
When one of these fault conditions is detected, the circuit
pulls the interrupt line OFF to its active LOW state and
returns to the FAULT mode. The current on I/O is internally
limited to 5 mA.
FAULT MODE (see Fig.9)
DEACTIVATION SEQUENCE (see Fig.8)
When a fault condition is written to the microcontroller via
the OFF line, the circuit initiates a deactivation sequence.
After the deactivation sequence has been completed, the
OFF line is reset to its HIGH state after the microcontroller
has reset the CMDVCC line HIGH.
When the session is completed, the microcontroller sets
the CMDVCC line to its HIGH state. The circuit then
executes an automatic deactivation sequence by counting
the sequencer back:
• RST falls to LOW and CLK is stopped
• I/O(µC) becomes high impedance and VPP falls to 0 V
• VCC falls to 0 V.
Vth2 + Vhys2
handbook, full pagewidth
Vth2
VSUP
Vth3
VDELAY
td
ALARM
MGG818
Fig.4 Alarm and delay as a function of VSUP (CDEL fixes the pulse width).
1996 Dec 12
8
Philips Semiconductors
Product specification
Smart card interface
TDA8001
ENCLK
handbook, full pagewidth
CDMS
S
S
CDMTC
S
S
QH
QI
QD
D
Q
QE
QB
CK Q
QG
D
Q
CK Q
XTAL
D
Q
QA
QC
QF
CK Q
QAA
CLK
QCA
CMD7 or CDMS = Z Z 1 1 0 0
CMD3.5 or CDMTC = 1 0 1 0 1 0
CLK = 2 4 0 4 2 4
QBA
1/2 CLKOUT
QB
QC
QD
ENCLK
QF
CLK
MGG827
Fig.5 Clock circuitry.
1996 Dec 12
9
Philips Semiconductors
Product specification
Smart card interface
TDA8001
handbook, full pagewidth
ACTIVATION
IDLE
PDOWN
FAULT
WRITE
READ
DEACTIVATION
MGG820
Fig.6 State diagram.
handbook, full pagewidth
0
1
2
3
OFF
PRES
DETECT
CMDVCC
VEILLE
(INTERNAL)
INTERNAL
CLOCK
VCC
I/O
VPP
CMD3.5
CLK
ENRST
(INTERNAL)
RSTIN
RST
MGG828
t2
tact
Fig.7 Activation sequence.
1996 Dec 12
10
Philips Semiconductors
Product specification
Smart card interface
handbook, full pagewidth
TDA8001
3
2
1
0
CMDVCC
VEILLE
(INTERNAL)
INTERNAL
CLOCK
VCC
I/O
VPP
CMD3.5
CLK
ENRST
(INTERNAL)
RSTIN
RST
MGG829
tde
Fig.8 Deactivation sequence.
handbook, full pagewidth
3
2
1
0
PRES
DETECT
CMDVCC
VEILLE
(INTERNAL)
INTERNAL
CLOCK
VCC
I/O
VPP
CMD3.5
CLK
ENRST
(INTERNAL)
RSTIN
RST
MGG830
tde
Fig.9 Deactivation after a card extraction during write mode.
1996 Dec 12
11
Philips Semiconductors
Product specification
Smart card interface
TDA8001
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDD
supply voltage
−0.3
18
V
Vx1
voltage on pins VPP21, VPP15, VPP12.5, PRES,
PRES, CMDVCC, OFF, ALARM, DETECT and RSTIN
0
VDD
V
VH
voltage on pin VH
0
30
V
VPP
voltage on pin VPP
0
VH
V
VSUP
voltage on pin VSUP
0
12
V
Vx2
voltage on pins ALARM and DELAY
0
VSUP
V
Vx3
voltage on pins XTAL, I/O(µC), CLKOUT2, CMD7,
CMD3.5 and CVNC
0
6.0
V
Vx4
voltage on pins I/O, RST, CLK and VCC
duration < 1 ms
0
7.0
V
Ptot
continuous total power dissipation
TDA8001;
Tamb = +70 °C; note 1;
see Fig.10
−
2
W
TDA8001T;
Tamb = +70 °C; note 1;
see Fig.11
−
0.92
W
Tstg
storage temperature
−55
+150
°C
Ves
electrostatic voltage on pins I/O, VCC, VPP, RST, CLK,
PRES and PRES
−6
+6
kV
electrostatic voltage on other pins
−2
+2
kV
Note
1. Ptot = VDD × (IDD(unloaded) + ∑Isignals) + ICC × (VDD − VCC) + max.{(VH − VPP) × IPP(read) + (VH − VPP) × IPP(write)}
+ VH × IH(unloaded) + VSUP × ISUP + (VDD − CVNC) × ICVNC, where ‘signals’ means all signal pins, except supply pins.
1996 Dec 12
12
Philips Semiconductors
Product specification
Smart card interface
TDA8001
MBE256
4
MBE255
3
handbook, halfpage
handbook, halfpage
P tot
P tot
(W)
(W)
3
2
2
1
1
0
0
50
0
50
100
150
Tamb ( o C)
50
Fig.10 Power derating curve (DIP28).
0
50
100
150
Tamb ( o C)
Fig.11 Power derating curve (SO28).
HANDLING
Every pin withstands the ESD test according to MIL-STD-883C class 3 for card contacts, class 2 for the remaining.
Method 3015 (HBM 1500 Ω, 100 pF) 3 pulses positive and 3 pulse negative on each pin referenced to ground.
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
1996 Dec 12
PARAMETER
VALUE
UNIT
SOT117-1
30
K/W
SOT136-1
70
K/W
thermal resistance from junction to ambient in free air
13
Philips Semiconductors
Product specification
Smart card interface
TDA8001
CHARACTERISTICS
VDD = 12 V; VH = 25 V; VSUP = 5 V; Tamb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
VDD
supply voltage
IDD
supply current
6.7
−
18
V
idle mode; VDD = 8 V
20
30
38
mA
idle mode; VDD = 18 V
22
34
42
mA
active mode; unloaded
35
45
55
mA
Vth1
threshold voltage for power-on
reset
−
3.0
4.0
V
Vth4
threshold voltage on VDD (falling)
6.0
−
6.5
V
Vhys4
hysteresis on Vth4
50
−
200
mV
Voltage supervisor
VSUP
voltage supply for the supervisor
−
5.0
−
V
ISUP
input current at VSUP
−
1.8
2.4
mA
Vth2
threshold voltage on VSUP (falling)
4.5
−
4.72
V
Vhys2
hysteresis on Vth2
10
−
80
mV
Vth3
threshold voltage on DELAY
IDEL
output current at DELAY
VDEL
2.35
−
2.65
V
pin grounded (charge)
−5
−
−2
µA
VDEL = 4 V (discharge)
6
−
−
mA
−
−
3.5
V
voltage on pin DELAY
ALARM, ALARM (open-collector outputs)
IOH
HIGH level output current on
pin ALARM
VOH = 5 V
−
−
25
µA
VOL
LOW level output voltage on
pin ALARM
IOL = 2 mA
−
−
0.4
V
IOL
LOW level output current on
pin ALARM
VOL = 0 V
−
−
−25
µA
VOH
HIGH level output voltage on
pin ALARM
IOH = −2 mA
VSUP − 1
−
−
V
td
delay between VSUP and ALARM
CDEL = 47 nF; see Fig.4
−
−
10
µs
tpulse
ALARM pulse width
CDEL = 47 nF
15
−
50
ms
Interrupt lines OFF and DETECT (open-collector)
IOH
HIGH level output current
VOH = 5 V
−
−
25
µA
VOL
LOW level output voltage
IOL = 1 mA
−
−
0.4
V
Logic inputs (CMDVCC, VPP21, VPP15, VPP12.5, CMD7, CMD3.5, PRES, PRES and RSTIN); note 1
VIL
LOW level input voltage
−
−
0.8
V
VIH
HIGH level input voltage
1.5
−
−
V
IIL
LOW level input current
−
−
−10
µA
1996 Dec 12
VIL = 0 V
14
Philips Semiconductors
Product specification
Smart card interface
SYMBOL
IIH
PARAMETER
HIGH level input current
TDA8001
CONDITIONS
VIH = 5 V
MIN.
TYP.
MAX.
UNIT
−
−
10
µA
−
−
0.4
V
Reset output to the card (RST)
VIDLE
output voltage in IDLE
VOL
LOW level output voltage
IOL = 200 µA
−
−
0.45
V
VOH
HIGH level output voltage
IOH = −200 µA
4.3
−
VCC
V
IOH = −10 µA
VCC − 0.7
−
VCC
V
RST enabled; see Fig.7
−
−
2
µs
−
−
0.4
V
tRST
delay between RSTIN and RST
Clock output to the card (CLK)
VIDLE
output voltage in IDLE
VOL
LOW level output voltage
IOL = 200 µA
−
−
0.4
V
VOH
HIGH level output voltage
IOH = −200 µA
2.4
−
VCC
V
IOH = −20 µA
0.7VCC
−
VCC
V
IOH = −10 µA
VCC − 0.7
−
VCC
V
CL = 30 pF; note 2
−
−
14
ns
tr
rise time
tf
fall time
CL = 30 pF; note 2
−
−
14
ns
δ
duty factor
CL = 30 pF; note 2
45
−
55
%
idle mode
−
−
0.4
V
read mode
VCC − 4%
−
VCC + 4%
V
write mode; IPP < 50 mA
P − 2.5%(3) −
P + 2.5%(3) V
∆IPP/∆t < 40 mA/100 ns;
note 4
P − 2.5%(3) −
P + 2.5%(3) V
active; from 0 to P (3)
−
−
−50
mA
VPP shorted to GND
−
−
−100
mA
up or down
0.3
0.4
0.5
V/µs
−
−
30
V
4
−
6
mA
P=5V
5
−
9
mA
P = 12.5 V
6.5
−
10.5
mA
P = 15 V
7
−
11
mA
8
−
12
mA
−
−
2.2
V
Card programming voltage (VPP)
VPP
IPP
SR
output voltage
output current
slew rate
High voltage input (VH)
VH
input voltage
IH
input current at VH
idle mode; active mode;
unloaded
P = 21 V
VH−VPP
1996 Dec 12
voltage drop
15
Philips Semiconductors
Product specification
Smart card interface
SYMBOL
PARAMETER
TDA8001
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Card supply voltage (VCC)
VCC
output voltage
ICC
output current
SR
slew rate
idle mode; active mode
−
−
0.4
V
ICC < 100 mA
4.75
−
5.25
V
∆IPP/∆t < 100 mA/100 ns;
note 4
4.75
−
5.25
V
VCC from 0 to 5 V
−
−
−100
mA
VCC shorted to GND
−
−
−200
mA
up or down
0.3
0.4
0.5
V/µs
5 V reference output voltage (CVNC)
VCVNC
output voltage at pin CVNC
4.5
5.0
5.5
V
ICVNC
output current at pin CVNC
−
−
−50
mA
−
−
300
Ω
Crystal connection (XTAL)
Rxtal(neg)
negative resistance at pin XTAL
2 MHz < fi < 16 MHz;
note 5
Vxtal
DC voltage at pin XTAL
3.0
−
4.0
V
fxtal
resonant frequency
4
−
16
MHz
external frequency
0
−
20
MHz
1
−
8
MHz
Clock output (CLKOUT2)
fCLKOUT2
frequency on CLKOUT2
VOL
LOW level output voltage
IOL = 2 mA
−
−
0.4
V
VOH
HIGH level output voltage
IOH = −200 µA
3.0
−
−
V
IOH = −10 µA
4.0
−
−
V
tr, tf
rise and fall times
CL = 15 pF; note 2
−
−
25
ns
δ
duty factor
CL = 15 pF; note 2
40
−
60
%
4.5 V < VSUP < 5.5 V;
4.5 V < VI/O(µC) < 5.5 V;
IOH = −20 µA
4.0
−
VCC + 0.1
V
4.5 V < VSUP < 5.5 V;
4.5 V < V I/O(µC) < 5.5 V;
IOH = −200 µA
2.4
−
−
V
Data line [I/O, I/O(µC)]
VOH
HIGH level output voltage on
pin I/O
VOL
LOW level output voltage on
pin I/O
II/O = 1 mA;
I/O(µC) grounded
−
−
100
mV
IIL
LOW level input current on
pin I/O(µC)
I/O(µC) grounded
−
−
−500
µA
VOH
HIGH level output voltage on
pin I/O(µC)
4.5 V < VI/O < 5.5 V
4.0
−
VSUP + 0.2
V
VOL
LOW level output voltage on
pin I/O(µC)
II/O(µC) = 1 mA;
I/O grounded
−
−
70
mV
IIL
LOW level input current on pin I/O I/O grounded
−
−
−500
µA
1996 Dec 12
16
Philips Semiconductors
Product specification
Smart card interface
SYMBOL
TDA8001
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VIDLE
voltage on pin I/O outside a
session
−
−
0.4
V
ZIDLE
impedance on pin I/O(µC)
outside a session
10
−
−
MΩ
Rpu
internal pull-up resistance
between pin I/O and VCC
8
10
12
kΩ
tr, tf
rise and fall times
−
−
0.5
µs
Ci = Co = 30 pF
Protections
Tsd
shut-down local temperature
−
135
−
°C
ICC(sd)
shut-down current at VCC
−
−150
−
mA
IPP(sd)
shut-down current at VPP
−
−75
−
mA
II/O(lim)
current limitation on pin I/O
from I/O to I/O(µC)
3
−
5
mA
tact
activation sequence duration
see Fig.7
−
110
−
µs
tde
deactivation sequence duration
see Fig.8
−
100
−
µs
t3
start of the window for sending
CLK to the card
−
−
70
µs
t5
end of the window for sending
CLK to the card
80
−
−
µs
tst
maximum pulse width on
CMDVCC before VCC starts rising
−
−
30
µs
Timing
Notes
1. Pins CMDVCC, VPP21, VPP15, VPP12.5, CMD7, CMD3.5 and PRES are active LOW; pins RSTIN and PRES are
active HIGH.
t1
2. The transition time and duty cycle definitions are shown in Fig.12; δ = --------------.
t1 + t2
3. P is the card programming voltage set by pin VPP12.5, VPP15 or VPP21.
4. The tests for dynamic response of both VPP and VCC are performed at 1 Hz, 10 kHz, 100 kHz and 1 MHz, with a
capacitive load of 100 nF.
5. This condition ensures proper starting of the oscillator with crystals having a series resistance up to 100 Ω.
handbook, full pagewidth
tr
tf
VOH
90%
90%
1.5 V
10%
10%
VOL
t2
t1
Fig.12 Definition of transition times.
1996 Dec 12
17
MBH856
Philips Semiconductors
Product specification
Smart card interface
TDA8001
INTERNAL PIN CONFIGURATION
handbook, full pagewidth
VSUP
XTAL
100
µA
100
µA
VCC
DETECT
VCC
100
µA
100
µA
I/O(µC)
5V
I/O
RST
100
µA
VCC
VCC
5 kΩ
100 Ω
as VPP12.5
CMD7
as VPP12.5
RSTIN
GND2
CLKOUT2
VCC
VCC
CLK
TDA8001
VDD
10 k Ω
50 Ω
as VPP12.5
CMD3.5
CVNC
1350
Ω
as VPP12.5
VPP21
as VPP12.5
CMDVCC
650
Ω
20
µA
OFF
1.25 V
VPP12.5
ALARM
VSUP
VSUP
VPP15
as VPP12.5
PRES
as VPP12.5
PRES
as VPP12.5
ALARM
100
µA
2.5 V
2.5
µA
VH
DELAY
2.5 V
VPP
20
µA
VH
100
µA
20
µA
GND1
VSUP
VDD
4690
Ω
1.25 V
VCC
5310
Ω
as VPP12.5
MBE257
Fig.13 Internal pin configuration.
1996 Dec 12
18
Philips Semiconductors
Product specification
Smart card interface
TDA8001
APPLICATION INFORMATION
+5 V
handbook, full pagewidth
to 8805
microcontroller
(1)
100 nF
12 V 25 V (2)
VDD
RST
ALARM ALARM VSUP CVNC VDD
OFF
INT0
VH
PRES
DETECT
PRES
I/O(µC)
100 nF
CMDVCC
VCC
C1
RST
C2
CLK
C3
VPP15
PORT
1
VPP12.5
VPP21
TDA8001
RSTIN
C4
12 V
10
µF
PORT
2
C5
CMD7
CMD3.5
25 V
10
µF
XTAL1
XTAL2
GND
80C52
MICROCONTROLLER
GND
VPP
CLKOUT2
I/O
C7
GND2
C8
DELAY
GND1
XTAL
47 nF
1 kΩ
14 MHz
47 nF
(1) The capacitor should be placed as close as possible to the IC.
(2) If pin VH is not connected to 25 V, it should be connected to VDD.
Fig.14 Application in a pay TV decoder.
1996 Dec 12
C6
100 nF
19
CARD
SOCKET
MGG831
Philips Semiconductors
Product specification
Smart card interface
TDA8001
PACKAGE OUTLINES
seating plane
handbook, full
pagewidthdual in-line package; 28 leads (600 mil)
DIP28:
plastic
SOT117-1
ME
D
A2
L
A
A1
c
e
Z
w M
b1
(e 1)
b
MH
15
28
pin 1 index
E
1
14
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
c
D (1)
E (1)
e
e1
L
ME
MH
w
Z (1)
max.
mm
5.1
0.51
4.0
1.7
1.3
0.53
0.38
0.32
0.23
36.0
35.0
14.1
13.7
2.54
15.24
3.9
3.4
15.80
15.24
17.15
15.90
0.25
1.7
inches
0.20
0.020
0.16
0.066
0.051
0.020
0.014
0.013
0.009
1.41
1.34
0.56
0.54
0.10
0.60
0.15
0.13
0.62
0.60
0.68
0.63
0.01
0.067
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT117-1
051G05
MO-015AH
1996 Dec 12
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
92-11-17
95-01-14
20
Philips Semiconductors
Product specification
Smart card interface
TDA8001
SO28: plastic small outline package; 28 leads; body width 7.5 mm
SOT136-1
D
E
A
X
c
y
HE
v M A
Z
15
28
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
1
14
e
w M
bp
0
detail X
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
mm
2.65
0.30
0.10
2.45
2.25
0.25
0.49
0.36
0.32
0.23
18.1
17.7
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
0.25
0.25
0.1
0.9
0.4
inches
0.10
0.012 0.096
0.004 0.089
0.01
0.019 0.013
0.014 0.009
0.71
0.69
0.30
0.29
0.050
0.42
0.39
0.055
0.043
0.016
0.043
0.039
0.01
0.01
0.004
0.035
0.016
Z
(1)
θ
8o
0o
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT136-1
075E06
MS-013AE
1996 Dec 12
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
91-08-13
95-01-24
21
Philips Semiconductors
Product specification
Smart card interface
TDA8001
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
WAVE SOLDERING
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
DIP
SOLDERING BY DIPPING OR BY WAVE
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
REPAIRING SOLDERED JOINTS
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
REPAIRING SOLDERED JOINTS
Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
SO
REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
1996 Dec 12
22
Philips Semiconductors
Product specification
Smart card interface
TDA8001
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1996 Dec 12
23
Philips Semiconductors – a worldwide company
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220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773
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Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,
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Middle East: see Italy
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. +31 40 27 82785, Fax. +31 40 27 88399
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Tel. +64 9 849 4160, Fax. +64 9 849 7811
Norway: Box 1, Manglerud 0612, OSLO,
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Philippines: Philips Semiconductors Philippines Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
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Portugal: see Spain
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Slovenia: see Italy
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United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
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Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
Internet: http://www.semiconductors.philips.com
© Philips Electronics N.V. 1996
SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
537021/1200/02/pp24
Date of release: 1996 Dec 12
Document order number:
9397 750 01384