INTEGRATED CIRCUITS DATA SHEET TDA1519C 22 W BTL or 2 × 11 W stereo power amplifier Product specification Supersedes data of 1998 Oct 16 File under Integrated Circuits, IC01 2000 Mar 08 Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier TDA1519C FEATURES GENERAL DESCRIPTION • Requires very few external components for Bridge-Tied Load (BTL) The TDA1519C is an integrated class-B dual output amplifier in a 9-lead plastic single in-line (SIL) power or 20-lead heatsink small outline package. • Stereo or BTL application • High output power For the TDA1519CTH (SOT418-2) the heatsink is positioned on top of the package, thereby allowing an external heatsink to be mounted on top. The heatsink of the TDA1519CTD (SOT397-1) is facing the PCB thereby allowing the heatsink to be soldered on the copper area of the PCB. • Low offset voltage at output (important for BTL) • Fixed gain • Good ripple rejection • Mute/standby switch • Load dump protection • AC and DC short-circuit-safe to ground and VP • Thermally protected • Reverse polarity safe • Capability to handle high energy on outputs (VP = 0 V) • No switch-on/switch-off plop • Protected against electrostatic discharge • Low thermal resistance • Identical inputs (inverting and non-inverting) • Pin compatible with TDA1519B (TDA1519C and TDA1519CSP). ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA1519C SIL9P DESCRIPTION VERSION plastic single in-line power package; 9 leads SOT131-2 TDA1519CSP SMS9P plastic surface mounted single in-line power package; 9 leads SOT354-1 TDA1519CTH HSOP20 heatsink small outline package; 20 leads; low stand-off SOT418-2 TDA1519CTD HSOP20 heatsink small outline package; 20 leads SOT397-1 2000 Mar 08 2 Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier TDA1519C QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supplies VP supply voltage operating 6.0 14.4 17.5 V non-operating − − 30 V load dump protected − − 45 V IORM repetitive peak output current − − 4 A Iq(tot) total quiescent current − 40 80 mA Istb standby current − 0.1 100 µA Isw(on) switch-on current − − 40 µA BTL 25 − − kΩ stereo 50 − − kΩ RL = 4 Ω − 6 − W RL = 2 Ω Inputs Zi input impedance Stereo application Po output power THD = 10% − 11 − W αcs channel separation 40 − − dB Vn(o)(rms) noise output voltage (RMS value) − 150 − µV 22 − W BTL application Po output power THD = 10%; RL = 4 Ω − SVRR supply voltage ripple rejection RS = 0 Ω f = 100 Hz 34 − − dB f = 1 to 10 kHz 48 − − dB ∆VOO DC output offset voltage − − 250 mV Tj junction temperature − − 150 °C 2000 Mar 08 3 Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier TDA1519C BLOCK DIAGRAM handbook, full pagewidth NINV mute switch 1 Cm 60 kΩ VA 4 OUT1 183 Ω power stage 18.1 kΩ VP 8 + standby switch − M/SS standby reference voltage VA 15 kΩ + + − ×1 RR 3 15 kΩ mute switch mute reference voltage TDA1519C 18.1 kΩ power stage 183 Ω 6 VA INV 9 Cm 60 kΩ input reference voltage mute switch power ground (substrate) signal ground 2 7 GND1 VP 5 MGL491 The pin numbers refer to the TDA1519C and TDA1519CSP. Fig.1 Block diagram. 2000 Mar 08 4 GND2 OUT2 Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier TDA1519C PINNING PIN SYMBOL DESCRIPTION TDA1519C; TDA1519CSP TDA1519CTD TDA1519CTH NINV 1 19 2 non-inverting input GND1 2 20 1 ground 1 (signal) RR 3 1 20 supply voltage ripple rejection OUT1 4 3 18 output 1 GND2 5 5 16 ground 2 (substrate) OUT2 6 8 13 output 2 VP 7 10 11 positive supply voltage M/SS 8 11 10 mute/standby switch input INV 9 12 9 inverting input n.c. − 2, 4, 6, 7, 9 and 13 to 18 3 to 8, 12, 14, 15, 17 and 19 not connected fpage halfpage fpage NINV 1 RR 1 20 GND1 GND1 1 20 RR GND1 2 n.c. 2 19 NINV NINV 2 19 n.c. RR 3 OUT1 3 18 n.c. n.c. 3 18 OUT1 OUT1 4 n.c. 4 17 n.c. n.c. 4 17 n.c. 16 n.c. n.c. 5 TDA1519C GND2 5 TDA1519CSP GND2 5 TDA1519CTD 16 GND2 TDA1519CTH OUT2 6 n.c. 6 15 n.c. n.c. 6 15 n.c. VP 7 n.c. 7 14 n.c. n.c. 7 14 n.c. M/SS 8 OUT2 8 13 n.c. n.c. 8 13 OUT2 INV 9 n.c. 9 12 INV INV 9 12 n.c. VP 10 11 M/SS M/SS 10 11 VP MGR561 MGL937 Fig.2 Pin configuration (SOT131-2 and 354-1). 2000 Mar 08 Fig.3 Pin configuration (SOT397-1). 5 MGL936 Fig.4 Pin configuration (SOT418-2). Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier TDA1519C FUNCTIONAL DESCRIPTION The TDA1519C contains two identical amplifiers with differential input stages. The gain of each amplifier is fixed at 40 dB. A special feature of this device is the mute/standby switch which has the following features: • Low standby current (<100 µA) • Low mute/standby switching current (low cost supply switch) • Mute condition. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VP PARAMETER CONDITIONS supply voltage MIN. MAX. UNIT operating − 17.5 V non-operating − 30 V load dump protected; during 50 ms; tr ≥ 2.5 ms − 45 V Vsc AC and DC short-circuit-safe voltage − 17.5 V Vrp reverse polarity voltage − 6 V − 200 mJ energy handling capability at outputs VP = 0 V IOSM non-repetitive peak output current − 6 A IORM repetitive peak output current − 4 A Ptot total power dissipation − 25 W Tj junction temperature − 150 °C Tstg storage temperature −55 +150 °C see Fig.5 MGL492 30 handbook, halfpage Ptot (W) (1) 20 (2) 10 (3) 0 −25 0 50 100 150 Tamb (°C) (1) Infinite heatsink. (2) Rth(c-a) = 5 K/W. (3) Rth(c-a) = 13 K/W. Fig.5 Power derating curve for SIL9P. 2000 Mar 08 6 Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier TDA1519C THERMAL CHARACTERISTICS SYMBOL Rth(j-a) Rth(j-c) PARAMETER CONDITIONS VALUE UNIT TDA1519C 40 K/W TDA1519CTH and TDA1519CTD 40 K/W TDA1519C 3 K/W TDA1519CTH and TDA1519CTD 3 K/W thermal resistance from junction to ambient in free air thermal resistance from junction to case DC CHARACTERISTICS VP = 14.4 V; Tamb = 25 °C; measurements taken using Fig.6; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supplies VP supply voltage Iq(tot) total quiescent current VO DC output voltage ∆VOO DC output offset voltage note 1 6.0 14.4 − 40 80 mA − 6.95 − V − − 250 mV 8.5 − − V 3.3 − 6.4 V VI = 1 V (max.); f = 20 Hz to 15 kHz − − 20 mV − − 250 mV note 2 17.5 V Mute/standby switch Vsw(on) switch-on voltage level Mute condition Vmute mute voltage VO output signal in mute position ∆VOO DC output offset voltage Standby condition Vstb standby voltage standby mode 0 − 2 V Istb standby current standby mode − − 100 µA Isw(on) switch-on current − 12 40 µA Notes 1. The circuit is DC adjusted at VP = 6 to 17.5 V and AC operating at VP = 8.5 to 17.5 V. 2. At VP = 17.5 to 30 V, the DC output voltage ≤0.5VP. 2000 Mar 08 7 Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier TDA1519C AC CHARACTERISTICS VP = 14.4 V; RL = 4 Ω; f = 1 kHz; Tamb = 25 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Stereo application (see Fig.6) Po output power note 1 THD = 0.5% 4 5 − W THD = 10% 5.5 6.0 − W 7.5 8.5 − W RL = 2 Ω; note 1 THD = 0.5% 10 11 − W THD total harmonic distortion Po = 1 W − 0.1 − % fro(l) low frequency roll-off −3 dB; note 2 − 45 − Hz fro(h) high frequency roll-off −1 dB 20 − − kHz Gv(cl) closed-loop voltage gain 39 40 41 dB SVRR supply voltage ripple rejection 40 − − dB on; notes 3 and 5 45 − − dB mute; notes 3 and 6 45 − − dB standby; notes 3 and 6 80 − − dB 50 60 75 kΩ on; RS = 0 Ω − 150 − µV on; RS = 10 kΩ − 250 500 µV mute; note 8 − 120 − µV 40 − − dB − 0.1 1 dB THD = 0.5% 15 17 − W THD = 10% 20 22 − W THD = 0.5% − 13 − W THD = 10% − 17.5 - W THD = 10% Zi input impedance Vn(o)(rms) noise output voltage (RMS value) αcs channel separation ∆Gv(ub) channel unbalance on; notes 3 and 4 note 7 RS = 10 kΩ BTL application (see Fig.7) Po output power output power at VP = 13.2 V note 1 note 1 THD total harmonic distortion Po = 1 W − 0.1 − % Bp power bandwidth THD = 0.5%; Po = −1 dB; with respect to 15 W − 35 to 15000 − Hz fro(l) low frequency roll-off −1 dB; note 2 − 45 − Hz fro(h) high frequency roll-off −1 dB 20 − − kHz Gv(cl) closed-loop voltage gain 45 46 47 dB 2000 Mar 08 8 Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier SYMBOL SVRR TDA1519C PARAMETER supply voltage ripple rejection Zi input impedance Vn(o)(rms) noise output voltage (RMS value) CONDITIONS MIN. TYP. MAX. UNIT 34 − − dB on; notes 3 and 5 48 − − dB mute; notes 3 and 6 48 − − dB standby; notes 3 and 6 80 − − dB 25 30 38 kΩ on; RS = 0 Ω − 200 − µV on; RS = 10 kΩ − 350 700 µV mute; note 8 − 180 − µV on; notes 3 and 4 note 7 Notes 1. Output power is measured directly at the output pins of the IC. 2. Frequency response externally fixed. 3. Ripple rejection measured at the output with a source impedance of 0 Ω (maximum ripple amplitude of 2 V). 4. Frequency f = 100 Hz. 5. Frequency between 1 and 10 kHz. 6. Frequency between 100 Hz and 10 kHz. 7. Noise voltage measured in a bandwidth of 20 Hz to 20 kHz. 8. Noise output voltage independent of RS (Vi = 0 V). 2000 Mar 08 9 Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier TDA1519C APPLICATION INFORMATION handbook, full pagewidth standby switch 100 µF VP 3 input reference voltage 220 nF non-inverting input + 40 dB 2 5 60 kΩ 40 dB + 1 7 2200 µF internal 1/2 VP TDA1519C − 60 kΩ 8 100 nF − 4 220 nF 9 inverting input 6 MGL493 signal ground power ground 1000 µF Fig.6 Stereo application diagram (SOT131-2 and SOT354-1). standby switch handbook, full pagewidth VP 3 input reference voltage − 60 kΩ 220 nF non-inverting input to pin 9 TDA1519C + 40 dB + 5 7 internal 1/2 VP 40 dB 1 2 8 100 nF − 4 60 kΩ 9 to pin 1 6 MGL494 signal ground power ground RL = 4 Ω Fig.7 BTL application diagram (SOT131-2 and SOT354-1). 2000 Mar 08 10 2200 µF Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier TDA1519C MGR539 60 handbook, halfpage Iq(tot) (mA) 50 40 30 0 4 8 12 16 20 VP (V) Fig.8 Total quiescent current (Iq(tot)) as a function of supply voltage (VP). MGR540 30 handbook, halfpage Po (W) 20 THD = 10% 10 0.5% 0 0 4 8 12 16 20 VP (V) Fig.9 Output power (Po) as a function of supply voltage (VP) for BTL application at RL = 4 Ω; f = 1 kHz. 2000 Mar 08 11 Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier TDA1519C MGR541 12 handbook, halfpage THD (%) 8 4 0 10−1 1 10 Po (W) 102 Fig.10 Total harmonic distortion (THD) as a function of output power (Po) for BTL application at RL = 4 Ω; f = 1 kHz. MGR542 0.6 handbook, halfpage THD (%) 0.4 0.2 0 10 102 103 f (Hz) 104 Fig.11 Total harmonic distortion (THD) as a function of operating frequency (f) for BTL application at RL = 4 Ω; Po = 1 W. 2000 Mar 08 12 Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier TDA1519C PACKAGE OUTLINES SIL9P: plastic single in-line power package; 9 leads SOT131-2 non-concave Dh x D Eh view B: mounting base side d A2 seating plane B E j A1 b L c 1 9 e Z Q w M bp 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A1 max. A2 b max. bp c D (1) d Dh E (1) e Eh j L Q w x Z (1) mm 2.0 4.6 4.4 1.1 0.75 0.60 0.48 0.38 24.0 23.6 20.0 19.6 10 12.2 11.8 2.54 6 3.4 3.1 17.2 16.5 2.1 1.8 0.25 0.03 2.00 1.45 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 95-03-11 99-12-17 SOT131-2 2000 Mar 08 EUROPEAN PROJECTION 13 Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier TDA1519C SMS9P: plastic surface mounted single in-line power package; 9 leads SOT354-1 D y d non-concave heatsink A2 Dh x heatsink Eh j E Q A1 L Lp c 9 1 e Z θ w M bp (A3) A 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 A2 A3 bp c mm 4.9 4.2 0.35 0.05 4.6 4.4 0.25 0.75 0.60 0.48 0.38 D(1) d 24.0 20.0 23.6 19.6 Dh E(1) 10 12.2 2.54 11.8 e Eh j L Lp Q 6 3.4 3.1 7.4 6.6 3.4 2.8 2.1 1.9 w x 0.25 0.03 y Z(1) θ 0.15 2.00 1.45 3° 0° Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 98-10-08 99-12-17 SOT354-1 2000 Mar 08 EUROPEAN PROJECTION 14 Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier TDA1519C HSOP20: plastic, heatsink small outline package; 20 leads; low stand-off height SOT418-2 E D A x X c E2 y HE v M A D1 D2 10 1 pin 1 index Q A A2 E1 (A3) A4 θ Lp detail X 20 11 Z w M bp e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A A2 max. 3.5 3.5 3.2 A3 0.35 A4(1) D1 D2 E(2) E1 E2 e HE Lp Q +0.12 0.53 0.32 16.0 13.0 −0.02 0.40 0.23 15.8 12.6 1.1 0.9 11.1 10.9 6.2 5.8 2.9 2.5 1.27 14.5 13.9 1.1 0.8 1.7 1.5 bp c D(2) v w x y 0.25 0.25 0.03 0.07 Z θ 2.5 2.0 8° 0° Notes 1. Limits per individual lead. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 98-02-25 99-11-12 SOT418-2 2000 Mar 08 EUROPEAN PROJECTION 15 Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier TDA1519C HSOP20: plastic, heatsink small outline package; 20 leads SOT397-1 E D A E2 X HE v M A c y D1 D2 11 20 Q A2 E1 A (A3) A1 A4 pin 1 index θ Lp detail X 1 10 Z w M bp e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A A1 max. A2 A3 A4 0.3 0.1 3.3 3.0 0.35 0.1 0 3.6 D1 D2 E(1) E1 E2 e HE Lp Q 0.53 0.32 16.0 13.0 0.40 0.23 15.8 12.6 1.1 0.9 11.1 10.9 6.2 5.8 2.9 2.5 1.27 14.5 13.9 1.1 0.8 1.5 1.4 bp c D(1) v w 0.25 0.25 y Z θ 0.1 2.5 2.0 8° 0° Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 97-11-03 99-11-12 SOT397-1 2000 Mar 08 EUROPEAN PROJECTION 16 Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier TDA1519C Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. SOLDERING Introduction This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). WAVE SOLDERING Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. Through-hole mount packages SOLDERING BY DIPPING OR BY SOLDER WAVE • For packages with leads on two sides and a pitch (e): The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. MANUAL SOLDERING Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Surface mount packages REFLOW SOLDERING MANUAL SOLDERING Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. 2000 Mar 08 When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. 17 Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier TDA1519C Suitability of IC packages for wave, reflow and dipping soldering methods SOLDERING METHOD MOUNTING PACKAGE WAVE suitable(2) Through-hole mount DBS, DIP, HDIP, SDIP, SIL Surface mount REFLOW(1) DIPPING − suitable BGA, LFBGA, SQFP, TFBGA not suitable suitable − HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable(3) suitable − PLCC(4), SO, SOJ suitable suitable − suitable − suitable − recommended(4)(5) LQFP, QFP, TQFP not SSOP, TSSOP, VSO not recommended(6) Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. 3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 2000 Mar 08 18 Philips Semiconductors Product specification 22 W BTL or 2 × 11 W stereo power amplifier TDA1519C NOTES 2000 Mar 08 19 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 753503/02/pp20 Date of release: 2000 Mar 08 Document order number: 9397 750 06633