INTEGRATED CIRCUITS DATA SHEET TDA9873H Multistandard dual carrier stereo sound decoder Product specification Supersedes data of 1999 Dec 03 File under Integrated Circuits, IC02 2000 Apr 04 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder TDA9873H FEATURES • Low power consumption • Alignment-free multistandard FM sound demodulation • No external intercarrier sound band-pass filters required • Auto mute switchable via I2C-bus • Multistandard A2 stereo sound decoder GENERAL DESCRIPTION • No adjustment for reduced channel separation requirement The TDA9873H is an economic multistandard dual FM demodulator and analog carrier stereo decoder with I2C-bus control. • De-emphasis time constant related to standard • Very reliable digital identification of sound transmission mode via I2C-bus, alignment-free • No external filter for pilot input required • I2C-bus transceiver with MAD (Module ADdress) • I2C-bus control for all functions • Stabilizer circuit for ripple rejection and constant output level • Additional mono output • Pin aligned with TDA9874AH • ESD protection on all pins. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME DESCRIPTION VERSION TDA9873H QFP44 plastic quad flat package; 44 leads (lead length 2.35 mm); body 14 × 14 × 2.2 mm SOT205-1 TDA9873HS QFP44 plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 × 10 × 1.75 mm SOT307-2 2000 Apr 04 2 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder TDA9873H QUICK REFERENCE DATA VCC = 5 V; Tamb = 25 °C; B/G standard (fSC1 = 5.5 MHz, fSC2 = 5.742 MHz, SC1/SC2 = 7 dB, ∆fAF = 27 kHz, fmod = 1 kHz, L = R, stereo mode); input level for first sound carrier Vi(FM)(rms) = 50 mV; fref = 4.000 MHz; measured in application circuits of Figs 7 and 8; unless otherwise specified. SYMBOL VCC ICC Vo(rms) Vo(cl)(rms) fi(FM) S/NW tident(on) Vi(FM)(rms) αcs(AF)(stereo) αct(AF)(dual) PARAMETER supply voltage supply current AF output level (RMS value) AF output clipping level (RMS value) FM-PLL operating frequencies (switchable) CONDITIONS 54% modulation; note 1 THD < 1.5% first sound carrier M standard B/G standard I standard D/K standard second sound carrier M standard B/G standard D/K (1) standard D/K (2) standard D/K (3) standard weighted signal-to-noise ratio CCIR 468-4 weighted; quasi (complete signal path) peak; dual mode; B/G standard; note 1 total identification time on for normal mode; note 2 identification mode change fast mode; note 2 FM-PLL input voltage (RMS value) sensitivity for pull-in first sound carrier second sound carrier AF channel separation (stereo B/G standard; note 3 mode; complete signal path) without alignment I2C-bus alignment AF crosstalk attenuation (dual mode; complete signal path) MIN. TYP. MAX. UNIT 4.5 40 400 1400 5 60 500 − 6.6 75 600 − V mA mV mV − − − − 4.5 5.5 6.0 6.5 − − − − MHz MHz MHz MHz − − − − − 52 4.72 5.74 6.26 6.74 5.74 56 − − − − − − MHz MHz MHz MHz MHz dB 0.35 0.1 − − 2 0.5 s s − − − − 6 1 mV mV 25 40 65 30 45 70 − − − dB dB dB Notes 1. Condition for B/G, I and D/K standard: VCC = 5 V and ∆f = 27 kHz (m = 54%). Condition for M standard: VCC = 5 V and ∆f = 13.5 kHz; 6 dB gain added internally to compensate smaller deviation. 2. The maximum total system identification time ‘on’ for a channel change is equal to maximum value of tident(on) plus tI2C(read-out). The maximum total system identification time ‘off’ for a channel change is equal to maximum value of tident(off) plus tI2C(read-out). The fast mode is proposed mainly during search tuning, program or channel select. If the channel is selected, the identification response should be switched to normal mode for improved reliability. However due to the transition from fast to normal mode, the identification bits are not valid for one integrator period. Therefore the transmitter mode detected during the fast mode has to be stored before changing to normal mode. The storage has to be kept for two seconds (maximum value of tident(on) in the normal mode) from the moment of transition. The identification can now operate in the normal mode until the next tuning action. 3. R modulated and L monitored. 2000 Apr 04 3 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... stereo M LF1 AF1O AF2O 14 10 32 R L AF2I AF1I CDE1 CDE2 EXTM EXTR EXTL 33 8 3 6 38 39 40 1 OUTL FM DEMODULATOR NARROW-BAND PLL SC1 AF AMPLIFIER 1 STEREO DECODER STEREO ADJUST 2 OUTR AF SWITCH 43 OUTM B/G, D/K, I, M (Korea) STANDARD 41 Vref IF intercarrier input IFINT 25 4 4.5, 5.5, 6.0, 6.5 4.72, 5.74, 6.26, 6.74 MHz n.c. 4, 5, 9, 11, 12, 16, 17, 19, 20, 22, 23, 36, 44 POWER SUPPLY TDA9873H FM DEMODULATOR NARROW-BAND PLL SC2 AF AMPLIFIER 2 DIGITAL ACQUISITION DIGITAL IDENTIFICATION OSCILLATOR CLOCK PILOT NARROW-BAND PLL 21 MAD 13 26 24 15 31 35 34 30 29 37 42 LF2 AFR CAF2 CAF1 XTAL LPF CID CTRIG SDA SCL P1 P2 pilot loop 28 VCC 27 DGND I2C-BUS TRANSCEIVER 18 4 MHz 7 AGND Philips Semiconductors external AF mono Multistandard dual carrier stereo sound decoder BLOCK DIAGRAM ndbook, full pagewidth 2000 Apr 04 loop filter MHB429 loop filter Product specification TDA9873H Fig.1 Block diagram. Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder PINNING SYMBOL PIN DESCRIPTION TDA9873H SYMBOL PIN n.c. 22 DESCRIPTION not connected OUTL 1 left audio output n.c. 23 not connected OUTR 2 right audio output CAF1 24 audio 1 (AF1) capacitor CDE1 3 de-emphasis 1 capacitor IFINT 25 IF intercarrier input n.c. 4 not connected CAF2 26 audio 2 (AF2) capacitor n.c. 5 not connected DGND 27 digital ground CDE2 6 de-emphasis 2 capacitor VCC 28 supply voltage (+5 V) AGND 7 analog ground SCL 29 serial clock input (I2C-bus) AF1I 8 audio 1 input SDA 30 serial data input/output (I2C-bus) n.c. 9 not connected LPF 31 pilot loop filter AF1O 10 audio 1 output AF2O 32 audio 2 output n.c. 11 not connected AF2I 33 audio 2 input n.c. 12 not connected CTRIG 34 trigger capacitor AFR 13 AF1 and AF2 signal return CID 35 identification capacitor LF1 14 loop filter 1 n.c. 36 not connected XTAL 15 4 MHz reference input P1 37 output port 1 n.c. 16 not connected EXTM 38 external audio input mono n.c. 17 not connected EXTR 39 external audio input right LF2 18 loop filter 2 EXTL 40 external audio input left n.c. 19 not connected Vref 41 reference voltage (1⁄2VCC) n.c. 20 not connected P2 42 output port 2 MAD 21 programmable address bit (module address) OUTM 43 mono output n.c. 44 not connected 2000 Apr 04 5 Philips Semiconductors Product specification TDA9873H 34 CTRIG 35 CID 36 n.c. 37 P1 38 EXTM 39 EXTR 40 EXTL 41 Vref 42 P2 44 n.c. handbook, full pagewidth 43 OUTM Multistandard dual carrier stereo sound decoder OUTL 1 33 AF2I OUTR 2 32 AF2O CDE1 3 31 LPF n.c. 4 30 SDA n.c. 5 29 SCL CDE2 6 28 VCC TDA9873H AGND 7 27 DGND AF1I 8 26 CAF2 n.c. 9 25 IFINT AF1O 10 24 CAF1 23 n.c. 2000 Apr 04 6 n.c. 22 n.c. 20 Fig.2 Pin configuration. MAD 21 n.c. 19 n.c. 17 LF2 18 n.c. 16 XTALI 15 LF1 14 n.c. 12 AFR 13 n.c. 11 MHB430 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder FUNCTIONAL DESCRIPTION In an endless circle the VCO of the next PLL will be connected to the down-counter and the described procedure starts again. FM demodulators The FM demodulators are Narrow-Band Phase-Locked Loops (NBPLLs) with external loop filters, to provide the required selectivity. To achieve good selectivity, linear Phase Detectors (PDs) and constant input levels are required. The intercarrier signal from the input terminal is fed via high-pass filters and gain controlled amplifiers to the phase detectors. A carrier cancellation circuit placed before the amplifier for the second PLL is used to reduce the first sound carrier. The PD output signals control the integrated relaxation oscillators via the loop filters. The frequency range is approximately 4 to 7 MHz. As a result of locking, the oscillator frequency tracks with the modulation of the input signal and the oscillator control voltages are superimposed by the AF voltages. Using this method, the FM-PLLs operate as FM demodulators. The AF voltages are present at the loop filters and fed via buffers with 0 dB gain to the audio amplifiers. The supported standards and their characteristics are given in Table 1. The whole tracing as well as the counting time itself is derived from the external frequency reference. The cycle time is 256 µs. Auto mute If a sound carrier is missed, acquisition pulses are generated when the NBPLL frequency leaves the window edges. To avoid noise at the audio output, an I2C-bus switchable mute-enable stage is built in. If auto mute is enabled via the I2C-bus, the circuit mutes immediately after the first acquisition pulse. If a sound carrier occurs (no further acquisition pulses), the mute stage automatically returns to active mode after 40 ms. If the first sound carrier is not present, the second audio channel will also be muted. Audio preamplifier The AF preamplifiers are operational amplifiers with internal feedback, high gain and high common mode rejection. The AF voltages from the PLL demodulators (small output signals) are amplified by approximately 34 dB. Using a DC operating point control circuit, the AF amplifiers are decoupled from the PLL DC voltage. The amplified AF signals are available at the output terminals and fed via external decoupling capacitors to the stereo decoder input terminals. Digital acquisition help A narrow-band PLL requires a measure to lock to the wanted input signal. Each relaxation oscillator of the three integrated PLLs (first and second sound carriers and pilot carrier) has a wide frequency range. To guarantee correct locking of the PLL with respect to the catching range, the digital acquisition help provides individual control until the VCO frequency is within the standard and PLL dependent lock-in window, related to the standard dependent carriers. It ensures that the oscillator frequency of the FM-PLL is within ±225 kHz of the sound carrier to be demodulated. The pilot carrier frequency window is ±150 Hz. Stereo decoder The input circuit incorporates a soft-mute stage which is controlled by the FM-PLL acquisition circuit. The auto mute function can be disabled via the I2C-bus. The working principal of the digital acquisition help is as follows. The VCOs are connected, one at a time, to a down-counter. The counter start value is standard dependent and predefined for each of the three PLLs. After a given counting time the stop value of the down-counter is probed. The AF output voltage is 500 mV (RMS) for 54% modulation, clipping therefore may occur at high over-modulation. If more headroom is required the input signal can be attenuated by 6 dB via the I2C-bus. A stereo adjustment (see Fig.6) is incorporated to correct the FM demodulator output voltage spread (see Table 19). If no I2C-bus adjustment is required (potentiometer adjustment or no adjustment) the default value should be 0 dB for B/G, M and D/K (2) standard. For the standards D/K (1) and D/K (3) the second sound carrier frequency is below the first sound carrier which results in a lower AF output level for the second sound carrier. In this state, a gain of +0.1 dB for D/K (1) and +0.2 dB for D/K (3) is preferred. If the stop value is lower (higher) than the expected value range, the VCO frequency is higher (lower) than the lock-in window. A negative (positive) control current is injected into the loop filter for a short time, thereby decreasing (increasing) the VCO frequency by a proportional value. If the stop value meets the expected value range, the VCO frequency is within the defined lock-in window and no control current is injected into the loop filter. 2000 Apr 04 TDA9873H 7 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder The identification stages consist of two digital PLL circuits and digital integrators to generate the stereo or dual sound identification bits, which can be read out via the I2C-bus. In the following dematrix, the modes stereo, mono and dual are processed for the different standards. The 6 dB level difference between B/G and M standard is automatically compensated in the dematrix, therefore no further level adaption is needed. A 4 MHz crystal oscillator provides the reference clock frequency. The corresponding detection bandwidth is larger than ±50 Hz for the pilot carrier signal, so that fpilot variations from the transmitter can be tracked in the event of missing synchronization with the horizontal frequency fH. However, the detection bandwidth for the identification signal is limited to approximately ±1 Hz for high identification reliability. De-emphasis is performed by two RC low-pass filter networks with internal resistors and external capacitors. The time constant is automatically switched to 50 µs or 75 µs according to the chosen standard. Due to some frequency response peaking of the FM demodulation, compensation is necessary. This is done by having a slightly larger time constant for the de-emphasis. I2C-bus transceiver The TDA9873H is microcontroller controlled via a 2-wire I2C-bus. All other settings such as AF switch, stereo channel adjustment values or default corrections have to be controlled via the I2C-bus depending on the identification or user definition. Two wires, serial data (SDA) and serial clock (SCL) carry information between the devices connected to the bus. The TDA9873H has an I2C-bus slave transceiver with auto-increment. AF switch The circuit incorporates a single stereo and mono AF output. Using rail-to-rail operational amplifiers, the clipping level is set to 1.4 V (RMS) for VCC = 5 V. To avoid conflicts in applications with other ICs providing similar or complementary functions, two slave addresses are available, selected on the pin MAD. A slave address is sent from the master to the slave receiver. As well as the internal stereo decoder output signal, one external stereo and one mono input can be switched to the AF outputs. Both the mono and stereo outputs can be switched independent of the internal or external sources (see Tables 13 and 25). Fig.6 shows the switch configurations. In the TV sound processor family several devices are available. To identify the TDA9873H device, the master sends a slave address with R/W bit = 0. The slave then generates an acknowledge and the master sends the data subaddress 254 to the slave, followed by an acknowledge from the slave to the master. The master then sends the slave address with R/W bit = 1. The slave then transmits the device identification code 80H to the master, followed by an acknowledge NOT and a STOP condition generated by the master. A nominal gain of 0 dB for the signals from the external inputs to the outputs is built-in. Stereo/dual sound identification The pilot signal is fed to the input of a NBPLL. The PLL circuit generates the synchronized pilot carrier. This carrier is used for the synchronous AM demodulation to get the low-pass filtered identification signal. Control ports Two digital open-collector output ports P1 and P2 provide external switching functions in the receiver front-end or IF demodulators. The ports are controlled by the I2C-bus (see Tables 22 and 23) and are freely programmable. A Schmitt trigger circuit performs pulse shaping of the identification signal when the signal level is higher than the Schmitt trigger threshold. For smaller signal levels there is no AC output signal, thus protecting against mis-identification caused by spurious signal components. 2000 Apr 04 TDA9873H 8 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder Power supply TDA9873H Analog ground (AGND, pin 7) and digital ground (DGND, pin 27) should be connected directly to the IC. The different supply voltages and currents required for the analog and digital circuits are derived from two internal band gap reference circuits. One of the band gap circuits internally generates a voltage of approximately 2.4 V, independent of the supply voltage and temperature. A voltage regulator circuit, connected to this voltage, produces a constant voltage of 3.55 V which is used as an internal reference voltage. The AF reference voltage Vref is 1⁄ V . Good ripple rejection is achieved with the external 2 CC capacitor Cref = 47 µF (16 V) in combination with an internal resistor at pin 6. No additional DC load for 1⁄2VCC is allowed. Pin 13 is internal analog ground. Power-on reset When a Power-on reset is activated by switching on the supply voltage or because of a supply voltage breakdown, the 117/274 Hz DPLL, 117/274 Hz integrator and the registers will be reset. Both AF channels (main and mono) are muted. The ports are in position HIGH. Gain stereo adjustment is 0 dB. Auto mute is active. For detailed information see Table 12. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER VCC supply voltage (pin 28) Vi input voltage at: CONDITIONS maximum chip temperature of 125 °C; note 1 MIN. MAX. UNIT 0 6.8 V pins 1 to 6, 8 to 12, 14 to 26 and 31 to 44 0 VCC V pins 29 to 30 −0.3 VCC V Tstg storage temperature −25 +150 °C Tamb ambient temperature −20 +70 °C Ves electrostatic handling voltage note 2 −150 +150 V note 3 −2500 +2500 V Notes 1. ICC = 60 mA; Tamb = 70 °C. 2. Machine model class B: C = 200 pF; L = 0.75 µH; R = 0 Ω. 3. Human body model class B: C = 100 pF; R = 1.5 kΩ. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) 2000 Apr 04 PARAMETER CONDITIONS VALUE UNIT TDA9873H 70 K/W TDA9873HS 65 K/W thermal resistance from junction to ambient in free air 9 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder TDA9873H CHARACTERISTICS VCC = 5 V; Tamb = 25 °C; B/G standard (fSC1 = 5.5 MHz, fSC2 = 5.742 MHz, SC1/SC2 = 7 dB, ∆fAF = 27 kHz, fmod = 1 kHz, L = R, stereo mode); input level for first sound carrier Vi(FM)(rms) = 50 mV; fref = 4.000 MHz; measured in application circuits of Figs 7 and 8; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply (pin 28) VCC supply voltage 4.5 5 6.6 V ICC supply current 40 60 75 mA first sound carrier − − 6 mV second sound carrier − − 1 mV first sound carrier 6 − 150 mV second sound carrier 1 − 100 mV Vi(FM1)(rms) = 6 mV − − 160 mV Vi(FM1)(rms) = 150 mV − − 2 V 4 5 6 kΩ FM-PLL demodulator (pin 25); note 1 Vi(FM)(rms) FM-PLL input voltage (RMS value) sensitivity for pull-in level for gain controlled operation; note 2 Vi(vid)(p-p) allowable interference video level (peak-to-peak value) see Fig.3 Ri input resistance fi(FM) FM-PLL operating frequencies first sound carrier (switchable) M standard − 4.5 − MHz B/G standard − 5.5 − MHz I standard − 6.0 − MHz D/K standard − 6.5 − MHz M standard − 4.72 − MHz B/G standard − 5.74 − MHz D/K (1) standard − 6.26 − MHz D/K (2) standard − 6.74 − MHz second sound carrier − 5.74 − MHz frequency windows of digital acquisition help narrow; note 3 − ±225 − kHz wide; note 3 − ±450 − kHz ∆fAF frequency deviation THD < 1.5%; normal gain − − ±62 kHz THD < 1.5%; reduced gain − − ±124 kHz ∆fAF(ident) frequency deviation for safe identification VCC = 5 V; stereo: 1 kHz L, 400 Hz R − − ±125 kHz αAM AM suppression AM: fmod = 1 kHz; m = 0.3 referenced to 27 kHz FM deviation 40 46 − dB KO(FM) VCO steepness ∆fFM/∆VLF1,2 note 4 − 3.3 − MHz/V KD(FM) phase detector steepness ∆ILF1,2/∆ϕ(VFM) note 4 − 4 − µA/rad D/K (3) standard ∆fFM 2000 Apr 04 10 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder SYMBOL PARAMETER TDA9873H CONDITIONS MIN. UNIT − 2.6 V 65 80 − kHz − 20 Hz − 250 − mV normal gain 400 500 600 mV reduced gain 200 250 300 mV DC voltage at CAF1 and CAF2 dependent on intercarrier frequency fFM BAF(−3dB) −3 dB audio frequency bandwidth measured at AF1O and AF2O; see Figs 7 and 8 upper limit dependent on loop filter; note 4 lower limit dependent on − CAF; CAF = 470 nF; note 5 output level (RMS value) MAX. 0.6 VCAF Vo(FM)(rms) TYP. measured at AF1O and AF2O Audio processing (pins 1, 2, 8 and 33) Vo(rms) AF output level (RMS value) fmod = 300 Hz; 54% modulation; switchable by I2C-bus; note 6 Vo(cl)(rms) AF output clipping level (RMS value) VCC = 5 V; THD = 1.5% 1400 − − mV RL allowable load resistance AC coupled 10 − − kΩ CL allowable load capacitance − − 1.5 nF RL(DC) allowable DC load resistance 100 − − kΩ Ro output resistance 70 150 300 Ω THD total harmonic distortion − 0.2 0.5 % 25 30 − dB 23 27 − dB 35 40 − dB B/G and D/K standard 40 45 − dB M standard 35 40 − dB 65 70 − dB Vo(rms) = 0.5 V; fAF = 1 kHz αcs(AF)(stereo) AF channel separation (stereo without alignment; note 7 mode; complete signal path) B/G or M (Korea) standard D/K standard potentiometer alignment; B/G, M and D/K standard; notes 7 and 8 I2C-bus alignment; notes 7 and 9 αct(AF)(dual) AF crosstalk attenuation (dual fi = 1 kHz for signal A; mode) fi = 400 Hz for signal B; ∆f = ±50 kHz complete signal path stereo decoder only αmute(AF) 2000 Apr 04 mute attenuation of AF signal 11 70 75 − dB 75 80 − dB Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder SYMBOL S/NW PARAMETER weighted signal-to-noise ratio (complete signal path) TDA9873H CONDITIONS MIN. TYP. MAX. UNIT CCIR 468-4 weighted; quasi peak; dual mode; note 6 50 µs de-emphasis; B/G, I and D/K standard 52 56 − dB 75 µs de-emphasis; M standard 48 52 − dB CCIR 468-4 weighted; quasi peak; Vo(rms) = 500 mV 70 75 − dB S/NW(d) signal-to-noise ratio at external AF with stereo decoder only tDEP(B/G) de-emphasis time constant for note 10; see Fig.4 B/G, D/K and I standard − 50 − µs tDEP(M) de-emphasis time constant for note 10; see Fig.4 M standard − 75 − µs fro roll-off frequency low frequency (−3 dB) − − 20 Hz high frequency (−0.5 dB) 20 − − kHz 20 26 − dB 470 nF at AF1I and AF2I; without de-emphasis PSRR power supply ripple rejection at OUTL and OUTR (overall performance) fripple = 70 Hz; Vripple(p-p) = 100 mV; dual mode; see Fig.5 Ri(AF1) AF1I input resistance 32 40 48 kΩ Ri(AF2) AF2I input resistance 32 40 48 kΩ − 0.5 − V External additional inputs (pins 38 to 40) Vi(nom)(rms) nominal input signal voltage (RMS value) Vi(cl)(rms) clipping voltage level (RMS value) THD ≤ 1.5%; VCC = 5 V 1.4 − − V Gv AF signal voltage gain G = Vo/Vi −1 0 +1 dB Ri input resistance 40 50 60 kΩ fro roll-off frequency − − 20 Hz αct(ext) AF crosstalk attenuation (external input) low frequency (−3 dB) high frequency (−0.5 dB) 20 − − kHz fi(EXTL) = 1 kHz; fi(EXTR) = 400 Hz 70 75 − dB Mono output OUTM (pin 43) 70 200 350 Ω 10 − − kΩ 100 − − kΩ load capacitance − − 1.5 nF mute attenuation 60 − − dB Ro output resistance RL load resistance RL(DC) allowable DC load resistance CL αmute 2000 Apr 04 AC coupled 12 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder SYMBOL PARAMETER TDA9873H CONDITIONS MIN. TYP. MAX. UNIT Pilot processing (pin 31) pilot operating frequency (3.5fH) fH1 = 15625 Hz − 54688 − Hz fH2 = 15734 Hz − 55070 − Hz KO(pilot) VCO steepness ∆fpilot/∆VLPF note 11 − 26 − kHz/V KD(pilot) phase detector steepness ∆ILPF/∆ϕ(pilot) ∆fpilot window ±150 Hz; note 11 − 2 − µA/rad ∆fSC2(pilot) second sound carrier pilot frequency deviation unmodulated pilot 1.5 2.5 3.5 kHz mAM(pilot) pilot AM modulation depth 25 50 75 % 750 Hz fpilot Identification (pins 34 and 35) fLP(CID) low-pass frequency response at pin CID −3 dB point 450 600 fstereo identification operating stereo frequency B/G and D/K standard; 1⁄ 133fH1 − 117.48 − Hz fstereo(h) identification operating stereo (h) frequency M standard; 1⁄105fH2 − 149.85 − Hz fdual identification operating dual frequency B/G and D/K standard; 1⁄ f 57 H1 − 274.12 − Hz fdual(h) identification operating dual (h) frequency M standard; 1⁄57fH2 − 276.04 − Hz tident(on) total identification time on for identification mode change normal mode; note 12 0.35 − 2 s fast mode; note 12 0.1 − 0.5 s total identification time off for identification mode change normal mode; note 12 0.6 − 1.6 s fast mode; note 12 0.15 − 0.4 s ∆fident identification window width normal mode; note 13 − 2 − Hz C/Npilot pilot sideband carrier-to-noise ratio for start of identification fdet pull-in frequency range of identification PLL (referred to fstereo = 117.48 Hz and fdual = 274.12 Hz) tident(off) − 8 − Hz − 33 − dBc/Hz −0.63 − −0.63 Hz normal mode upper side 0.63 − 0.63 Hz fast mode lower side −2.05 − −2.05 Hz fast mode upper side 2.05 − 2.05 Hz MHz fast mode; note 13 normal mode lower side Reference input (operation as crystal oscillator; pin 15) fsr(xtal) series resonant frequency of crystal fundamental mode; CL = 20 to 30 pF during crystal production − 4.0 − ∆fw(max) allowed maximum spread of oscillator working frequency over operating temperature range including ageing and influence of drive circuit; note 3 − − ±300 × 10−6 ∆fR cutting frequency tolerance − − ±50 × 10−6 ∆fd frequency drift − − ±50 × 10−6 2000 Apr 04 13 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder SYMBOL PARAMETER TDA9873H CONDITIONS MIN. Rs(eq) equivalent crystal series resistance − Rs(um) crystal series resistance of unwanted mode TYP. MAX. UNIT 200 Ω 2 × Rs(eq) − − Ω 60 Reference input (operation as input terminal; pin 15) fω working frequency − 4 − MHz VI DC input voltage 2.3 2.6 2.9 V Ri input resistance 2.5 3.0 3.5 kΩ 10−6 ∆fref tolerance of reference frequency notes 3 and 14 − − ±300 × Vref(rms) amplitude of reference source (RMS value) operation as input terminal 80 − 400 mV Vo(ref) output resistance of reference source − − 4.7 kΩ CK decoupling capacitance to external reference source 22 100 − pF operation as input terminal I2C-bus transceiver (pins 29 and 30); note 15 fclk clock frequency 0 − 100 kHz VIH HIGH-level input voltage 3 − VCC V VIL LOW-level input voltage −0.3 − +1.5 V IIH HIGH-level input current −10 − +10 µA IIL LOW-level input current −10 − +10 µA VOL LOW-level output voltage IOL = 3 mA − − 0.4 V Io(sink) output sink current VCC = 0 V − − 10 µA Io(source) output source current VCC = 0 V − − 10 µA Port outputs P1 and P2 (open-collector outputs; pins 37 and 42) VOL LOW-level output voltage Io = 1 mA (sink) − − 0.3 V Io(sink)(port) port output sink current port at LOW level − − 1 mA decreasing supply voltage 2.5 3 3.5 V − − 4.5 V Power-on reset VCC(sr) supply voltage for start of reset VCC(er) supply voltage for end of reset increasing supply voltage; I2C-bus transmission enabled Notes 1. Input level for IF intercarrier from an external generator with 50 Ω source impedance, fmod = 400 Hz, 27 kHz deviation of audio references: level for SC1 is 50 mV (RMS), SC1/SC2 = 7 dB. S/N and THD measurements are taken at 50 µs de-emphasis. 2. For higher input voltages a series resistor connected to pin 25 is recommended. 3. The tolerance of the reference frequency determines the accuracy of the FM demodulator centre frequencies, maximum FM deviation, pilot window width and pilot window mid-frequency error. 2000 Apr 04 14 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder TDA9873H 4. Approximate calculation of the FM-PLL loop filter can be done using the following formula: 1 KO × KD 1 B L ( –3dB ) = ------- --------------------- 1.55 – --------------------------------------------------- CP 2π 4R 2 × K O × K D × C P rad Hz with KO = VCO steepness --------- or 2π ------- V V µA KD = phase detector steepness --------- rad R = loop resistor. CS = series capacitor. CP = parallel capacitor. BL(−3dB) = loop bandwidth for −3 dB. Example for BL(−3dB) = 80 kHz: CS = 3.3 nF; CP = 680 pF; R = 5.6 kΩ. 5. The lower limit of audio bandwidth depends on the value of the capacitors at pins 24 and 26. A value of CAF = 470 nF leads to BAF(−3dB) < 20 Hz and a value of CAF = 220 nF leads to BAF(−3dB) < 40 Hz. 6. S/N decreases by 4 dB if no second sound carrier is present; auto mute enabled. Condition for B/G, I and D/K standard: VCC = 5 V and ∆f = 27 kHz (m = 54%). Condition for M standard: VCC = 5 V and ∆f = 13.5 kHz; 6 dB gain added internally to compensate for smaller deviation. 7. R modulated and L monitored. The I2C-bus stereo adjustment has to be set to a default value. For B/G, D/K (2) and M standard the default value is 0 dB, for D/K (1) standard the default value is 0.1 dB and for D/K (3) standard the default value is 0.2 dB. 8. Using potentiometer adjustment, the AF output voltage is reduced by 1.3 dB because of the series resistor (see Fig.8). 9. Separate alignment for each standard necessary. Minimum value for D/K (3) standard is 37 dB. 10. Because the loop transfer function is not flat, the de-emphasis is superimposed by an amplitude response correction that compensates for an influence from the FM demodulators. 11. Approximate calculation of the pilot PLL loop filter can be done using the following formulae: BL(−3dB) ≈ 1.89fn 1 KO × KD f n = ------- --------------------C 2π R ϑ = ---- C × K O × K D 2 with fn = natural frequency of PLL. rad Hz KO = VCO steepness --------- or 2π ------- V V µA KD = phase detector steepness --------- rad R = loop resistor. C = loop capacitor. BL(−3dB) = loop bandwidth for −3 dB. ϑ = damping factor. The formulae are only valid under the condition: 0.5 ≤ ϑ ≤ 0.8 Example for BL(−3dB) = 544 Hz: C = 100 nF; R = 7.5 kΩ; ϑ = 0.67; fn = 288 Hz. 2000 Apr 04 15 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder TDA9873H 12. The maximum total system identification time ‘on’ for a channel change is equal to the maximum value of tident(on) plus tI2C(read-out). The maximum total system identification time ‘off’ for a channel change is equal to the maximum value of tident(off) plus tI2C(read-out). The fast mode is mainly for use during search tuning, program or channel select. If the channel is selected, the identification response should be switched to normal mode for improved reliability. However due to the transition from fast to normal mode, the identification bits are not valid for one integrator period. Therefore the transmitter mode detected during the fast mode must be stored before changing to the normal mode. The storage must be kept for two seconds (maximum value of tident(on) in the normal mode) from the moment of transition. The identification can now operate in the normal mode until the next tuning action. 13. Identification window is defined as total pull-in frequency range (lower plus upper side) of identification PLL (steady detection) plus window increase due to integrator (fluctuating detection). 14. Window width dependent on fω. 15. The AC characteristics are in accordance with the I2C-bus specification. The maximum clock frequency is 100 kHz. Information about the I2C-bus can be found in the brochure “The I2C-bus and how to use it” (order number 9398 393 40011). Table 1 TV standard settings STEREO DUAL IDENTIFICATION IDENTIFICATION FREQUENCY FREQUENCY fstereo (Hz) fdual (Hz) fSC1 (MHz) fSC2 (MHz) PILOT FREQUENCY fpilot (kHz) M 4.5 4.724 55.0699 149.85 276.04 B/G 5.5 5.742 54.6875 117.48 274.12 50 6 − − − − 50 D/K (1) 6.5 6.268 54.6875 117.48 274.12 50 D/K (2) 6.5 6.742 54.6875 117.48 274.12 50 D/K (3) 6.5 5.742 54.6875 117.48 274.12 50 STANDARD I handbook, full pagewidth MHB433 2 Vi(vid)(p-p) (V) 1 0.5 0.16 0 6 12 25 50 Vi(FM)(rms) (mV) SC1 SC1 ----------- = 7 dB SC2 video: colour-bar Fig.3 Allowable interference video level. 2000 Apr 04 16 150 DE-EMPHASIS tDEP (µs) 75 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder TDA9873H MHB431 +3 handbook, full pagewidth Vo(AF) (dB) +2 R: −15% C: −5% +1 0 −1 R: +15% C: +5% −2 102 10 103 104 fo(AF) (Hz) Fig.4 Tolerance scheme of AF frequency response; de-emphasis with CDE1 = CDE2 = 10 nF ±5%. handbook, full pagewidth VCC = 5 V VCC = 5 V 100 mV (fripple = 70 Hz) TDA9873H MHB432 t V ripple at OUTR PSRR = 20 log ----------------------------------------V ripple at V CC Fig.5 Ripple rejection condition. 2000 Apr 04 17 105 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... CDE1 LEVEL + STEREO ADJUST AF1I L+R , M, A 2 DE-MATRIX DE-EMPHASIS B4 = 0 0/−6 dB + MUTE 1 18 stereo separation adjust −0.6 to +0.7 dB AF2I L−R R, ,B 2 0/−6 dB + MUTE (L) (R) B4 = 0 S is open for standard M 6 dB for standard M B4 = 1 2 3 3 4 4 5 5 6 + (mute) S STANDARD DEPENDENT DE-MATRIXING 1 2 6 B4 = 1 0/6 dB B5, B7 + acquisition 1 S 2 6 6 5 5 4 4 3 3 2 2 1 1 OUTM (E3, E4, E5) d 0/6 dB d d CDE2 6 dB EXTM EXTL EXTR Philips Semiconductors SWITCH 6 dB Multistandard dual carrier stereo sound decoder full pagewidth 2000 Apr 04 OUTL d = 6 dB attenuation MHB434 OUTR Product specification Fig.6 Audio part. TDA9873H Example: For stereo mode (B4 = 1), OUTL is switched to position 4 and OUTR switched to position 5. For mono mode (B4 = 0), OUTL and OUTR are both switched to position 4. This means: For mono/stereo switching, not only B4 but also the switch (stereo and mono output) must be set (see Tables 13 and 25). Stereo output: internal/external source: B0 and B1; output switching: B2 and B3. Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder TDA9873H I2C-BUS PROTOCOL I2C-bus format to read (device identification code) S SLAVE ADDRESS Table 2 R/W = 0 A SUBADDRESS A S SLAVE ADDRESS R/W = 1 A DATA AN P Explanation of I2C-bus format to read (device identification code) NAME DESCRIPTION S START condition; generated by the master SLAVE ADDRESS 101 101 1; pin MAD not connected (standard) 101 101 0; pin MAD connected to ground (pin programmable) R/W logic 0 (write); generated by the master logic 1 (read); generated by the master A acknowledge; generated by the slave SUBADDRESS 111 111 10 (254) DATA slave transmits the device identification code 80H; note 1 AN acknowledge not; generated by the master P STOP condition; generated by the master Note 1. This data word H80 (device identification code) is read from the subaddress 254 which is set in the last write transfer. I2C-bus format to read (slave transmits data) S SLAVE ADDRESS Table 3 R/W = 1 A DATA AN P Explanation of I2C-bus format to read (slave transmits data) NAME DESCRIPTION S START condition; generated by the master SLAVE ADDRESS 101 101 1; pin MAD not connected (standard) 101 101 0; pin MAD connected to ground (pin programmable) R/W logic 1 (read); generated by the master A acknowledge; generated by the slave DATA slave transmits an 8-bit data word AN acknowledge not; generated by the master P STOP condition; generated by the master Table 4 Definition of the transmitted byte after read condition MSB LSB D7 D6 D5 D4 D3 D2 D1 D0 1 0 0 Y Y DS ST PONR 2000 Apr 04 19 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder Table 5 Bit functions of Table 4 BIT FUNCTION PONR Power-on reset; if PONR = 1, then Power-on reset is detected ST stereo sound; if ST = 1, then stereo sound is identified DS dual sound; if DS = 1, then dual sound is identified Y Table 6 Table 7 TDA9873H indefinite Interpretation of identification bits ST DS FUNCTION 0 0 mono 0 1 dual sound 1 0 stereo sound 1 1 incorrect identification Power-on reset PONR FUNCTION 0 after successful reading of the status register 1 after Power-on reset or after supply breakdown If the master generates an acknowledge not and a STOP condition when it has received the data word READ, the master terminates the bus transfer. On the other hand, if the master generates an acknowledge then the slave started a second transfer with the READ byte and so on until the master generates an acknowledge not and STOP condition. I2C-bus format to write (slave receives data) S Table 8 SLAVE ADDRESS R/W = 0 A SUBADDRESS A DATA A P Explanation of I2C-bus format to write (slave receives data) NAME S SLAVE ADDRESS DESCRIPTION START condition 101 101 1; pin MAD not connected (standard) 101 101 0; pin MAD connected to ground (pin programmable) R/W logic 0 (write) A acknowledge; generated by slave SUBADDRESS see Table 9 DATA note 1; see Table 10 P STOP condition Note 1. If more than 1 byte of DATA is transmitted, auto-increment is performed, starting from the transmitted subaddress and auto-increment of the subaddress is performed in accordance with the order of Table 9. 2000 Apr 04 20 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder Table 9 TDA9873H Subaddress definition (second byte after slave address) MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1(1) D0(1) Switching 0 0 0 0 0 0 0 0 Adjust/standard 0 0 0 0 0 0 0 1 Port 0 0 0 0 0 0 1 0 Note 1. Significant subaddress bits. Table 10 Data definition (third byte after slave address) MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 Switching data B7 B6 B5 B4 B3 B2 B1 B0 Adjust/standard data C7 C6 C5 C4 C3 C2 C1 C0 0 0 E5 E4 E3 E2 E1 E0 Port data Table 11 Bit functions of Table 10 BITS FUNCTION B0 and B1 signal source select; see Table 14 B2 and B3 output signal select; see Table 13 B4 stereo setting bit; see Table 13 B5 output level switching; see Table 16 B6 mute bit; see Table 17 B7 auto mute enable; see Table 18 C0 to C3 stereo adjust; see Table 19 C4 to C6 standard switching; see Table 20 C7 identification response time; see Table 21 E0 port 1; see Table 22 E1 port 2; see Table 23 E2 test mode; see Table 24 (not for customer) E3 to E5 mono output setting; see Table 25 Table 12 Data setting of third byte after Power-on reset; see note 1 MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 Switching data 1 1 X X X X X X Adjust/standard data 0 0 0 0 0 1 1 0 Port data 0 0 1 1 1 0 1 1 Note 1. X = don’t care. 2000 Apr 04 21 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder TDA9873H SWITCHING DATA BITS Table 13 Mode and output switching; data byte to select AF inputs and AF outputs TRANSMISSION MODE SELECTED MODE OUTL OUTR B4 B3 B2 Mono M M M 0 0 1 Stereo forced mono M M 0 0 1 ST L R 1 0 0 Dual R L 1 1 1 AB A B 0 0 0 AA A A 0 0 1 BB B B 0 1 0 B A 0 1 1 External mono BA EXTM EXTM EXTM 0 0 0 External stereo EXTL, EXTR EXTL EXTR 0 0 0 EXTL, EXTL EXTL EXTL 0 0 1 EXTR, EXTR EXTR EXTR 0 1 0 EXTR, EXTL EXTR EXTL 0 1 1 Table 17 Mute switching of AF outputs Table 14 Source switching SIGNAL SOURCE B1 B0 Internal 0 0 Not muted 0 External stereo 1 0 Muted 1 External mono 1 1 OUTL AND OUTR B6 Table 18 Auto mute activating Table 15 Stereo decoder outputs (CDE1 and CDE2) TRANSMISSION MODE OUTPUTS B4 Stereo stereo 1 Stereo mono 0 Mono mono 0 Dual dual 0 AUTO MUTE Table 16 Output level switching OUTPUT LEVEL B5 Normal gain 1 Reduced gain 0 2000 Apr 04 22 B7 Disabled 0 Active 1 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder ADJUST AND STANDARD DATA BITS PORT DATA BITS Table 19 Stereo adjustment, gain adjust in R channel Table 22 Port 1 output PORT 1 TDA9873H E0 GAIN STEREO ADJUSTMENT (dB) C3 C2 C1 C0 −0.6 0 0 0 0 −0.5 0 0 0 1 −0.4 0 0 1 0 −0.3 0 0 1 1 −0.2 0 1 0 0 −0.1 LOW level 0 0 1 0 1 HIGH level 1 0.0 0 1 1 0 +0.1 0 1 1 1 Table 24 Test mode; note 1 +0.2 1 0 0 0 TEST MODE +0.3 1 0 0 1 Off 0 +0.4 1 0 1 0 On 1 +0.5 1 0 1 1 +0.6 1 1 0 0 +0.7 1 1 0 1 C6 C5 C4 B/G 0 0 0 M 0 0 1 D/K (1) 0 1 0 D/K (2) 0 1 1 D/K (3) 1 0 0 I 1 0 1 0 Fast 1 2000 Apr 04 E1 E2 Note 1. Not for customer; for Philips Semiconductors only. C7 Normal 1 PORT 2 Table 21 Identification response time RESPONSE TIME 0 HIGH level Table 23 Port 2 output Table 20 Standard switching STANDARD LOW level 23 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder TDA9873H Table 25 Mono output TRANSMISSION MODE STEREO DECODER OUTM E5 E4 E3 B4 Mono mono mono 0 0 0 0 Stereo forced mono mono 0 0 0 0 Dual dual dual A 0 0 0 0 Dual dual dual B 0 0 1 0 Stereo stereo mono 0 1 0 1 − − EXTM 0 1 1 − − − EXTL 1 0 0 − − − EXTR 1 0 1 − − − EXTL/R; − − mute 2000 Apr 04 24 1⁄ (L 2 + R) 1 1 0 − 1 1 1 − Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder TDA9873H APPLICATION INFORMATION external inputs P2 handbook, full pagewidth P1 VCC VCC 4.7 kΩ 4.7 kΩ n.c. 2.2 µF 2.2 µF 44 OUTL OUTR 10 nF CDE1 n.c. n.c. 10 nF CDE2 AGND AF1I 470 nF n.c. 470 nF 47 µF 2.2 µF OUTM 43 Vref P2 42 41 470 nF EXTL EXTR 40 EXTM 38 39 4.7 nF 470 nF n.c. P1 36 37 CID 35 470 nF CTRIG 34 1 33 2 32 3 31 4 30 5 29 TDA9873H 6 28 7 27 8 26 9 25 AF1O n.c. 10 24 11 23 12 13 n.c. AFR 14 15 LF1 XTAL 16 n.c. 18 17 n.c. LF2 19 20 n.c. n.c. 21 MAD 470 nF AF2I AF2O LPF 100 nF 7.5 kΩ SDA SDA SCL 470 nF VCC VCC DGND CAF2 IFINT CAF1 470 nF 47 pF IF intercarrier 470 nF n.c. 22 n.c. MHB435 680 pF 5.6 kΩ 5.6 kΩ 3.3 nF 3.3 nF 680 pF Fig.7 Application circuit without potentiometer alignment. 2000 Apr 04 25 SCL Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder external inputs P2 handbook, full pagewidth P1 VCC VCC 4.7 kΩ 4.7 kΩ 2.2 µF 2.2 µF 44 OUTL OUTR 10 nF CDE1 n.c. n.c. 10 nF CDE2 AGND AF1I 470 nF n.c. 470 nF 47 µF 2.2 µF n.c. OUTM 43 TDA9873H Vref P2 42 41 470 nF EXTL EXTR 39 40 4.7 nF 470 nF EXTM 38 n.c. P1 36 37 CID 35 470 nF CTRIG 34 1 33 2 32 3 31 4 30 5 29 TDA9873H 6 28 7 27 8 26 9 25 10 24 11 23 AF1O n.c. 12 13 n.c. 14 AFR 15 LF1 XTAL 16 n.c. 17 18 n.c. LF2 19 20 n.c. n.c. 21 MAD 470 nF AF2I AF2O LPF 100 nF 7.5 kΩ SDA SDA SCL 470 nF VCC VCC DGND CAF2 IFINT CAF1 n.c. 470 nF 47 pF IF intercarrier 470 nF 4.7 kΩ 10 kΩ 22 n.c. MHB436 680 pF 5.6 kΩ 5.6 kΩ 3.3 nF 3.3 nF 680 pF Fig.8 Application circuit with potentiometer alignment. 2000 Apr 04 26 SCL Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder TDA9873H INTERNAL PIN CONFIGURATION handbook, halfpage 1, 2 + handbook, halfpage 3, 6 2.5 V + 2.5 V 10 kΩ 15 kΩ 7.5 kΩ 10 kΩ 8 kΩ MHB438 MHB437 Fig.9 Pin 1; OUTL and pin 2; OUTR. Fig.10 Pin 3; CDE1 and pin 6; CDE2. handbook, halfpage handbook, halfpage 8, 33 10, 32 + + 50 kΩ 240 µA 5 kΩ 2.5 V MHB439 34 kΩ MHB440 Fig.11 Pin 8; AF1I and pin 33; AF2I. 2000 Apr 04 Fig.12 Pin 10; AF1O and pin 32; AF2O. 27 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder handbook, halfpage FM DEMODULATOR NARROW-BAND PLL SC1 AF AMPLIFIER 1 FM DEMODULATOR NARROW-BAND PLL SC2 AF AMPLIFIER 2 TDA9873H handbook, halfpage 14, 18 + 1.5 V 2 kΩ + + + 23 kΩ 2 kΩ 13 AFR 24 CAF1 26 CAF2 7 AGND MHB442 470 nF 470 nF MGU118 Fig.13 Pin 13; AFR (internal analog ground). handbook, halfpage Fig.14 Pin 14; LF1 and pin 18; LF2. 15 handbook, halfpage 21 + + 1.5 kΩ 100 µA MHB444 MHB443 Fig.15 Pin 15; XTAL. 2000 Apr 04 Fig.16 Pin 21; MAD. 28 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder handbook, halfpage TDA9873H handbook, halfpage 25 24, 26 3V 2.5 V + + 80 µA 5 kΩ + 30 kΩ 3.3 kΩ 5 kΩ 500 µA 4.8 pF 4.8 pF 3.05 kΩ 2 kΩ MHB445 MHB446 Fig.17 Pin 24; CAF1 and pin 26; CAF2. handbook, halfpage Fig.18 Pin 25; IFINT. 28 + handbook, halfpage 1.8 kΩ 5V 2.5 V MHB448 MHB447 Fig.19 Pin 28; VCC. 2000 Apr 04 29 Fig.20 Pin 29; SCL. 29 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder handbook, halfpage TDA9873H 31, 35 2.5 V handbook, halfpage + + 30 4 kΩ 1.8 kΩ 2.5 V 80 µA 4 kΩ 56 kΩ MHB449 2 kΩ MHB450 Fig.21 Pin 30; SDA. handbook, halfpage Fig.22 Pin 31; LPF and pin 35; CID. 34 2.5 V handbook, halfpage 37, 42 + 56 kΩ + MHB452 3.33 kΩ MHB451 Fig.23 Pin 34; CTRIG. 2000 Apr 04 Fig.24 Pin 37; P1 and pin 42; P2. 30 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder handbook, halfpage TDA9873H handbook, halfpage 38, 39, 40 41 1 + + 25 kΩ 2 25 kΩ 100 Ω 3 6.8 kΩ 5.9 kΩ 4 MHB454 MHB453 Fig.25 Pin 38; EXTM; pin 39; EXTR and pin 40; EXTL. handbook, halfpage Fig.26 Pin 41; Vref. 43 + 2.5 V 10 kΩ 8 kΩ 10 kΩ MHB455 Fig.27 Pin 43; OUTM. 2000 Apr 04 31 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder TDA9873H PACKAGE OUTLINES QFP44: plastic quad flat package; 44 leads (lead length 2.35 mm); body 14 x 14 x 2.2 mm SOT205-1 c y X 33 A 23 34 22 ZE e E HE A A2 (A 3) A1 wM θ bp Lp pin 1 index 44 L 12 detail X 1 11 ZD e v M A wM bp D B HD v M B 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HD HE L Lp v w y mm 2.60 0.25 0.05 2.3 2.1 0.25 0.50 0.35 0.25 0.14 14.1 13.9 14.1 13.9 1 19.2 18.2 19.2 18.2 2.35 2.0 1.2 0.3 0.15 0.1 Z D (1) Z E (1) 2.4 1.8 2.4 1.8 θ o 7 0o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC SOT205-1 133E01 2000 Apr 04 JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 97-08-01 99-12-27 32 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder TDA9873H QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm SOT307-2 c y X A 33 23 34 22 ZE e E HE A A2 wM (A 3) A1 θ bp Lp pin 1 index L 12 44 1 detail X 11 wM bp e ZD v M A D B HD v M B 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HD HE L Lp v w y mm 2.10 0.25 0.05 1.85 1.65 0.25 0.40 0.20 0.25 0.14 10.1 9.9 10.1 9.9 0.8 12.9 12.3 12.9 12.3 1.3 0.95 0.55 0.15 0.15 0.1 Z D (1) Z E (1) 1.2 0.8 1.2 0.8 θ o 10 0o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 95-02-04 97-08-01 SOT307-2 2000 Apr 04 EUROPEAN PROJECTION 33 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: 2000 Apr 04 TDA9873H 34 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder TDA9873H Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE REFLOW(1) WAVE BGA, SQFP not suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS not PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO suitable suitable(2) suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2000 Apr 04 35 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder TDA9873H DATA SHEET STATUS DATA SHEET STATUS PRODUCT STATUS DEFINITIONS (1) Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Note 1. Please consult the most recently issued data sheet before initiating or completing a design. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. 2000 Apr 04 36 Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder NOTES 2000 Apr 04 37 TDA9873H Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder NOTES 2000 Apr 04 38 TDA9873H Philips Semiconductors Product specification Multistandard dual carrier stereo sound decoder NOTES 2000 Apr 04 39 TDA9873H Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 753504/03/pp40 Date of release: 2000 Apr 04 Document order number: 9397 750 06932