IRF IRF6633

PD - 96989
IRF6633
DirectFET™ Power MOSFET ‚
l
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l
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RoHs Compliant Containing No Lead and Bromide 
Low Profile (<0.7 mm)
Dual Sided Cooling Compatible 
Ultra Low Package Inductance
Optimized for High Frequency Switching 
Ideal for CPU Core DC-DC Converters
Optimized for both Sync.FET and some Control FET
application
Low Conduction and Switching Losses
Compatible with existing Surface Mount Techniques 
Typical values (unless otherwise specified)
VDSS
VGS
RDS(on)
RDS(on)
20V max ±20V max 4.1mΩ@ 10V 7.0mΩ@ 4.5V
Qg
Qgd
Qgs2
Qrr
Qoss
Vgs(th)
4.0nC
1.2nC
32nC
8.8nC
1.8V
tot
11nC
DirectFET™ ISOMETRIC
MP
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
MQ
MX
MT
MP
Description
The IRF6633 combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the
lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is compatible
with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering
techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows
dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6633 balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and switching
losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors
operating at higher frequencies. The IRF6633 has been optimized for parameters that are critical in synchronous buck operating from 12 volt
buss converters including Rds(on) and gate charge to minimize losses in the control FET socket.
Absolute Maximum Ratings
Max.
Units
VDS
Drain-to-Source Voltage
20
V
VGS
Gate-to-Source Voltage
±20
ID @ TA = 25°C
Continuous Drain Current, VGS @ 10V
16
ID @ TA = 70°C
Continuous Drain Current, VGS
13
ID @ TC = 25°C
Continuous Drain Current, VGS
IDM
Pulsed Drain Current
EAS
Single Pulse Avalanche Energy
IAR
Avalanche Current
Parameter
e
@ 10V e
@ 10V f
g
Typical R DS (on) (mΩ)
20
ID = 16A
15
10
TJ = 125°C
5
TJ = 25°C
0
2.0
4.0
6.0
8.0
VGS, Gate-to-Source Voltage (V)
Fig 1. Typical On-Resistance Vs. Gate Voltage
10.0
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
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132
h
VGS, Gate-to-Source Voltage (V)
g
A
59
41
mJ
13
A
12
ID= 13A
10
VDS = 16V
VDS= 10V
8
6
4
2
0
0
4
8
12
16
20
24
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
„ TC measured with thermocouple mounted to top (Drain) of part.
… Repetitive rating; pulse width limited by max. junction temperature.
† Starting TJ = 25°C, L = 0.51mH, RG = 25Ω, IAS = 13A.
1
6/2/05
IRF6633
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
Drain-to-Source Breakdown Voltage
20
–––
–––
∆ΒVDSS/∆TJ
Breakdown Voltage Temp. Coefficient
–––
16
–––
RDS(on)
Static Drain-to-Source On-Resistance
–––
4.1
5.6
V
mΩ
–––
7.0
9.4
1.4
1.8
2.2
V
∆VGS(th)/∆TJ
Gate Threshold Voltage Coefficient
–––
-5.2
–––
mV/°C
IDSS
Drain-to-Source Leakage Current
µA
–––
–––
1.0
–––
150
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
VGS = 10V, ID = 16A c
VGS = 4.5V, ID = 13A c
Gate Threshold Voltage
–––
VGS = 0V, ID = 250µA
mV/°C Reference to 25°C, ID = 1mA
VGS(th)
IGSS
Conditions
Typ. Max. Units
BVDSS
VDS = VGS, ID = 250µA
VDS = 16V, VGS = 0V
VDS = 16V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
-100
VGS = -20V
S
VDS = 10V, ID = 13A
gfs
Forward Transconductance
35
–––
–––
Qg
Total Gate Charge
–––
11
17
Qgs1
Pre-Vth Gate-to-Source Charge
–––
3.3
–––
Qgs2
Post-Vth Gate-to-Source Charge
–––
1.2
–––
Qgd
Gate-to-Drain Charge
–––
4.0
–––
ID = 13A
Qgodr
Gate Charge Overdrive
–––
2.5
–––
See Fig. 15
Qsw
Switch Charge (Qgs2 + Qgd)
–––
5.2
–––
Qoss
Output Charge
–––
8.8
–––
nC
RG
Gate Resistance
–––
1.5
–––
Ω
td(on)
Turn-On Delay Time
–––
9.7
–––
tr
Rise Time
–––
31
–––
ID = 13A
ns
Clamped Inductive Load
pF
VDS = 10V
nC
VGS = 4.5V
VDS = 10V, VGS = 0V
VDD = 16V, VGS = 4.5Vc
td(off)
Turn-Off Delay Time
–––
12
–––
tf
Fall Time
–––
4.3
–––
Ciss
Input Capacitance
–––
1250
–––
VGS = 0V
VDS = 10V
Coss
Output Capacitance
–––
630
–––
Crss
Reverse Transfer Capacitance
–––
200
–––
ƒ = 1.0MHz
Diode Characteristics
Parameter
IS
Continuous Source Current
Min.
–––
Typ. Max. Units
–––
Pulsed Source Current
MOSFET symbol
52
@TC=25°C (Body Diode)
ISM
A
–––
–––
Conditions
showing the
integral reverse
132
p-n junction diode.
(Body Diode)d
TJ = 25°C, IS = 13A, VGS = 0V c
VSD
Diode Forward Voltage
–––
0.8
1.0
trr
Reverse Recovery Time
–––
18
27
ns
TJ = 25°C, IF = 13A
Qrr
Reverse Recovery Charge
–––
32
48
nC
di/dt = 500A/µs c
V
Notes:
 Pulse width ≤ 400µs; duty cycle ≤ 2%.
‚ Repetitive rating; pulse width limited by max. junction temperature.
2
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IRF6633
Absolute Maximum Ratings
Parameter
PD @TC = 25°C
c
Power Dissipation c
Power Dissipation f
TP
Peak Soldering Temperature
TJ
Operating Junction and
TSTG
Storage Temperature Range
Max.
Units
2.3
W
Power Dissipation
PD @TA = 25°C
PD @TA = 70°C
1.5
89
270
°C
-40 to + 150
Thermal Resistance
Parameter
cg
Junction-to-Ambient dg
Junction-to-Ambient eg
Junction-to-Case fg
RθJA
Junction-to-Ambient
RθJA
RθJA
RθJC
RθJ-PCB
Typ.
Max.
–––
55
12.5
–––
20
–––
–––
3.0
Junction-to-PCB Mounted
Linear Derating Factor
1.0
c
Units
°C/W
–––
0.018
W/°C
100
Thermal Response ( Z thJA )
D = 0.50
0.20
10
0.10
0.05
0.02
1
τJ
0.01
R1
R1
τJ
τ1
R2
R2
R3
R3
R4
R4
R5
R5
Ri (°C/W)
τC
τ2
τ1
τ2
τ3
τ3
τ4
τ4
τ5
τ5
Ci= τi/Ri
Ci= τi/Ri
0.1
τ
τi (sec)
0.6676
0.000066
1.0462
0.000896
1.5611
0.004386
29.282
0.68618
25.455
32
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.01
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 
Notes:
 Surface mounted on 1 in. square Cu board, steady state.
‚ Used double sided cooling , mounting pad.
ƒ Mounted on minimum footprint full size board with metalized
„ TC measured with thermocouple incontact with top (Drain) of part.
… Rθ is measured at TJ of approximately 90°C.
back and with small clip heatsink.
 Surface mounted on 1 in. square Cu
board (still air).
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ƒ Mounted to a PCB with
small clip heatsink (still air)
ƒ Mounted on minimum
footprint full size board with
metalized back and with small
clip heatsink (still air)
3
IRF6633
1000
1000
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
10
1
2.5V
100
BOTTOM
10
2.5V
≤60µs PULSE WIDTH
≤60µs PULSE WIDTH
Tj = 25°C
Tj = 150°C
0.1
1
0.1
1
10
100
0.1
VDS , Drain-to-Source Voltage (V)
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
Fig 5. Typical Output Characteristics
1000
2.0
Typical RDS(on) (Normalized)
ID = 16A
ID, Drain-to-Source Current (Α)
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
100
TJ = 150°C
TJ = 25°C
TJ = -40°C
10
1
VGS = 4.5V
VGS = 10V
1.5
1.0
VDS = 10V
≤60µs PULSE WIDTH
0.1
0.5
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
-60 -40 -20 0
VGS, Gate-to-Source Voltage (V)
Fig 7. Normalized On-Resistance vs. Temperature
Fig 6. Typical Transfer Characteristics
10000
20
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
TJ = 25°C
Typical RDS (on) (mΩ)
C, Capacitance(pF)
Coss = Cds + Cgd
Ciss
1000
20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
Coss
Vgs = 3.5V
Vgs = 4.0V
Vgs = 4.5V
Vgs = 5.0V
Vgs = 10V
16
12
8
Crss
4
100
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
0
20
40
60
80
100
ID, Drain Current (A)
Fig 9. Typical On-Resistance Vs.
Drain Current and Gate Voltage
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IRF6633
1000
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
1000.0
TJ = 150°C
TJ = 25°C
100.0
TJ = -40°C
10.0
1.0
VGS = 0V
0.4
0.6
0.8
1.0
100
100µsec
10
1msec
10msec
1
TA = 25°C
Tj = 150°C
Single Pulse
0.1
0.1
0.2
OPERATION IN THIS AREA
LIMITED BY R DS(on)
0.1
1.2
1.0
VSD , Source-to-Drain Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
100.0
Fig11. Maximum Safe Operating Area
Typical VGS(th) Gate threshold Voltage (V)
60
50
ID, Drain Current (A)
10.0
VDS , Drain-toSource Voltage (V)
40
30
20
10
2.5
2.0
ID = 250µA
1.5
1.0
0
25
50
75
100
125
-75
150
-50
-25
0
25
50
75
100
125
150
TJ , Junction Temperature ( °C )
TC , Case Temperature (°C)
Fig 13. Typical Threshold Voltage vs. Junction
Temperature
Fig 12. Maximum Drain Current vs. Case Temperature
EAS, Single Pulse Avalanche Energy (mJ)
200
ID
5.7A
8.7A
BOTTOM 13A
TOP
160
120
80
40
0
25
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy Vs. Drain Current
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5
IRF6633
Current Regulator
Same Type as D.U.T.
Id
Vds
50KΩ
Vgs
.2µF
12V
.3µF
+
V
- DS
D.U.T.
Vgs(th)
VGS
3mA
IG
ID
Qgs1 Qgs2
Current Sampling Resistors
Fig 15a. Gate Charge Test Circuit
Qgd
Qgodr
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
V
RGSG
+
V
- DD
IAS
20V
tp
A
I AS
0.01Ω
Fig 16c. Unclamped Inductive Waveforms
Fig 16b. Unclamped Inductive Test Circuit
LD
VDS
VDS
90%
+
VDD D.U.T
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
Fig 17a. Switching Time Test Circuit
6
10%
VGS
td(on)
tr
td(off)
tf
Fig 17b. Switching Time Waveforms
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IRF6633
D.U.T
Driver Gate Drive
+
ƒ
+
‚
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
di/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D=
Period
P.W.
Re-Applied
Voltage
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
-
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 18. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
DirectFET™ Substrate and PCB Layout, MP Outline
(Medium Size Can, P-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
D
D
G
D
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S
G- Gate
D- Drain
S- Source
S
D
7
IRF6633
DirectFET™ Outline Dimension, MP Outline
(Medium Size Can, P-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
DIMENSIONS
NOTE: CONTROLLING
DIMENSIONS ARE IN MM
METRIC
CODE MIN
MAX
A
6.25
6.35
B
5.05
4.80
3.95
C
3.85
D
0.45
0.35
E
0.62
0.58
F
0.58
0.62
G
0.79
0.75
0.57
H
0.53
J
0.63
0.67
K
1.72
1.59
L
2.87
3.04
M
0.70
0.59
N
0.08
0.03
P
0.08
0.17
IMPERIAL
MAX
0.246
1.889
0.152
0.014
0.023
0.023
0.030
0.021
0.025
0.063
0.113
0.023
0.001
0.003
MAX
0.250
0.199
0.156
0.018
0.032
0.032
0.031
0.022
0.026
0.068
0.119
0.028
0.003
0.007
DirectFET™ Part Marking
8
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IRF6633
DirectFET™ Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF6633). For 1000 parts on 7" reel,
order IRF6633TR1
REEL DIMENSIONS
TR1 OPTION (QTY 1000)
STANDARD OPTION (QTY 4800)
IMPERIAL
IMPERIAL
METRIC
METRIC
CODE
MIN
MAX
MIN
MAX
MAX
6.9
A
N.C
177.77 N.C
N.C
B
0.75
N.C
19.06
N.C
N.C
C
0.53
0.50
13.5
13.2
12.8
D
0.059
N.C
1.5
N.C
N.C
E
2.31
N.C
58.72
N.C
N.C
F
N.C
0.53
N.C
18.4
13.50
G
0.47
11.9
N.C
14.4
12.01
H
0.47
11.9
N.C
15.4
12.01
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.06/05
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