INTEGRATED CIRCUITS DATA SHEET SAA4963 Integrated NTSC comb filter Preliminary specification Supersedes data of 1996 Nov 22 File under Integrated Circuits, IC02 1997 Mar 03 Philips Semiconductors Preliminary specification Integrated NTSC comb filter SAA4963 FEATURES GENERAL DESCRIPTION • One chip NTSC comb filter The SAA4963 is an alignment-free one chip comb filter compatible with NTSC M systems. • Time discrete but continuous amplitude signal processing with analog interfaces • Internal delay lines, filters, clock processing and signal switches • Alignment-free • Few external components. QUICK REFERENCE DATA SYMBOL PARAMETER MIN. TYP. MAX. UNIT VCCA analog supply voltage 4.75 5 5.5 V VDDD digital supply voltage 4.75 5 5.5 V VCCO analog supply voltage output buffer 4.75 5 5.5 V VCCPLL analog supply voltage PLL 4.75 5 5.5 V ICCO analog supply current output buffer − 35 45 mA IDDD digital supply current − 3 6 mA ICCA analog supply current − 10 17 mA ICCPLL analog supply current PLL − 1.5 2.5 mA V13(p-p) CVBS input signal (peak-to-peak value) 0.7 1 1.4 V V14(p-p) luminance input signal (peak-to-peak value) 0.7 1 1.4 V V7(p-p) chrominance input signal (peak-to-peak value) − 0.7 1 V V1(p-p) subcarrier input signal (peak-to-peak value) 100 200 400 mV V11(p-p) luminance output signal (peak-to-peak value) 0.6 1 1.54 V V9(p-p) chrominance output signal (peak-to-peak value) − 0.7 1.1 V ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION SAA4963 DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1 SAA4963T SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 1997 Mar 03 2 1997 Mar 03 CSY 12 3 VDET HDET STOPS CL3 STOPS BIAS CLAMP SYNC SEPARATOR CLOCK CONTROL CONT2 LPFI A 5 AGND CL3 HSEL 8 OGND 100 nF 100 µF CL3 BPF CL3 BPF −1 D CL3 BPF −0.5 CL3 CONT2 CONT1 CHROMACOMB CL3 DELAY COMPENSATION CL3 6 VCCO +5 V LUMACOMB CL3 LPF CONTROL A Fig.1 Block diagram. i.c. 3 CL3 1H DELAY LINES HSEL 4 VCCA +5 V LPFO1 100 nF 100 µF 1H DELAY LINES 18 17 HSEL VCCPLL PLLGND +5 V 0.5 16 DGND 15 VDDD +5 V CONT1 LPFO2 CCOMB CONT1 YCOMB LPFO1 S2B STOPS S2A 100 nF 10 MHA558 19 9 i.c. CO 11 YO REFDL VOLTAGE REFERENCE 20 REFBP A SAA4963 47 Ω A 100 nF CURRENT REFERENCE 100 nF 100 µF Integrated NTSC comb filter Remark: all switches in LOW position. 100 nF Cext 7 330 nF CVBS 13 330 nF Yext 14 330 nF A SVHS 2 FSC 1 A 100 nF 100 µF handbook, full pagewidth HDET VDET D A Philips Semiconductors Preliminary specification SAA4963 BLOCK DIAGRAM Philips Semiconductors Preliminary specification Integrated NTSC comb filter SAA4963 PINNING SYMBOL PIN DESCRIPTION FSC 1 subcarrier frequency input SVHS 2 SVHS mode forcing i.c. 3 internally connected VCCA 4 analog supply voltage AGND 5 analog ground VCCO 6 analog supply voltage output buffer Cext 7 external chrominance input OGND 8 analog ground output buffer CO 9 chrominance output signal REFDL 10 decoupling capacitor for delay lines YO 11 luminance output signal CSY 12 storage capacitor CVBS 13 CVBS input signal Yext 14 external luminance input VDDD 15 digital supply voltage DGND 16 digital ground PLLGND 17 analog ground PLL VCCPLL 18 analog supply voltage PLL i.c. 19 internally connected REFBP 20 decoupling capacitor for band-pass filter reference 1997 Mar 03 handbook, halfpage FSC 1 20 REFBP 19 i.c. SVHS 2 i.c. 3 18 VCCPLL VCCA 4 17 PLLGND AGND 5 VCCO 6 16 DGND SAA4963 15 VDDD 14 Yext Cext 7 OGND 8 13 CVBS CO 9 12 CSY 11 YO REFDL 10 MHA559 Fig.2 Pin configuration. 4 Philips Semiconductors Preliminary specification Integrated NTSC comb filter SAA4963 The PLL and the clock processing are always stopped if the selected level for SVHS is applied to SVHS (independent of the vertical pulse). FUNCTIONAL DESCRIPTION Functional requirements The NTSC comb filter processes the video standard NTSC M. For SVHS signals the input signals are bypassed to the output without processing by selecting the SVHS mode. VCCA, VCCO, VDDD AND VCCPLL (PINS 4, 6, 15 AND 18) Supply voltages. A sync separation circuit is incorporated to generate control signals for the internal clock processing. With a sync compression of up to 12 dB (see Fig.5) the sync separator works properly. AGND, OGND, DGND AND PLLGND (PINS 5, 8, 16 AND 17) Ground connection. AGND is used as signal reference for all analog input and output signals. The IC is controlled via the pin SVHS (pin 2) which forces the IC into the SVHS mode (bypass) if the comb filter function is not desired. It is possible to select the following modes: Cext (PIN 7) Input for an external chrominance signal which is correlated with the external VBS signal in SVHS-mode. COMB-mode: Luminance and chrominance comb filter function active, if SVHS mode not active CO (PIN 9) SVHS-mode: No IC function active, all clocks inactive, Cext (pin 7) is bypassed to CO (pin 9) and Yext (pin 14) is bypassed to YO (pin 11). This mode is forced via SVHS (pin 2). Chrominance output signal. This output delivers the comb filtered chrominance from the CVBS signal in COMB-mode or the external chrominance signal from the input Cext if the IC is forced into the SVHS-mode. In COMB-mode the output is delayed by an additional processing delay. The mode changes from SVHS to COMB and vice versa are always performed asynchronously with respect to the vertical blanking interval. Table 2 Pin description CO output signal MODE FSC (PIN 1) Input for the reference frequency fsc (see note 3 of Chapter “Characteristics”). For SVHS signals the signal performance can be increased by switching the input signal at FSC off. CO OUTPUT SIGNAL COMB comb filtered chrominance signal SVHS external chrominance signal from Cext input REFDL (PIN 10) Decoupling capacitor for the delay line reference voltage. SVHS (PIN 2) Input signal that controls the operation mode. An internal low-pass filter suppresses the subcarrier frequencies. Thus applications are supported where the operation mode (COMB or SVHS) is controlled by the DC level of the FSC input signal at pin 1. For those applications the SVHS input can be externally connected to FSC (pin 1). YO (PIN 11) Table 1 Table 3 VBS output signal. This output delivers the comb filtered luminance signal (including synchronization pulses) in COMB-mode or the external (C)VBS signal from the input Yext if the IC is forced into SVHS-mode. In COMB-mode the output is delayed by an additional processing delay. SVHS function SVHS SELECTED MODE YO output signal MODE YO OUTPUT SIGNAL LOW COMB COMB comb filtered luminance signal HIGH SVHS (PLL and clock processing stopped) SVHS external (C)VBS signal from Yext input 1997 Mar 03 5 Philips Semiconductors Preliminary specification Integrated NTSC comb filter SAA4963 CSY (PIN 12) LOW-PASS FILTER INPUT (LPFI) Sync top capacitor for the sync separator. Analog input low-pass filter to reduce the outband frequencies of EMC. The input low-pass filter is included in the signal path. CVBS (PIN 13) Input for the CVBS signal in COMB-mode. LOW-PASS FILTER OUTPUTS (LPFO1 AND LPFO2) Internal functional description Two different types of output low-pass filters LPFO1 and LPFO2 are necessary to get equal signal delays within the luminance path and the chrominance path (important for good transient behaviour). The low-pass output filter type LPFO1 is used for the luminance output while LPFO2 is used for the chrominance output. The filters are analog 3rd order elliptic low-pass filters that convert the output signals from the time discrete to the time continuous domain (reconstruction filter). SWITCHED CAPACITOR DELAY LINE LPF CONTROL Delays the CVBS input signal by 1 line. Input signals for the delay lines are the CVBS signal, the clock CL3 (3 × fsc) and the control signal HSEL. Automatic tuning of the low-pass filters is achieved by adjusting the filter delays. The control information for all filters (CONT1 and CONT2) is derived from a built-in reference filter (LPFO1-type) that is part of a control loop. The control loop tunes the reference filter delay and thus all other filter delays to a time reference derived from the system clock CL3. YEXT (PIN 14) Input for an external luminance signal in SVHS-mode. REFBP (PIN 20) Decoupling capacitor for the band-pass filter reference voltage. Output signals are the non-delayed and the 1-line delayed CVBS signal. SWITCHED CAPACITOR BAND-PASS FILTERS (BPFS) The comb filter input BPFs attenuate the low frequencies to guarantee a correct signal processing within the comb filter. CONTROL AND CLOCK PROCESSING (CLOCK CONTROL) The comb filter output BPF reduces the alias components that are the result of the signal processing within the comb filter. The control and clock processing block consists of the sub-blocks PLL, clock processing and mode control. Only if the input level at SVHS (pin 2) selects the COMB mode the PLL and the clock processing are released for operation. CHROMINANCE COMB FILTER Main tasks of the control and clock processing are: • Clock generation of system clock CL3 Separates the chrominance from the band-pass filtered CVBS signal. • Delay line start control • Mode control. DELAY COMPENSATION The signal processing is based on a 3 × fsc system clock (CL3), that is generated by the clock processing from the fsc-signal at FSC (pin 1) via a PLL. A clock phase correction of 180° is necessary every line because the subcarrier frequency divided by the line frequency results not in an integer value. Additionally the clock processing is synchronized fieldwise by the H-signal (correction of line frequency instabilities). Compensates the internal processing time of the band-pass filters and the chrominance comb filter section. LUMINANCE COMB FILTER The comb filtered luminance output signal is obtained by adding the delayed CVBS signal and the inverted comb filtered chrominance signal. 1997 Mar 03 6 Philips Semiconductors Preliminary specification Integrated NTSC comb filter SAA4963 The PLL provides a master clock MCK of 6 × fsc, which is locked to the subcarrier frequency at FSC (pin 1). The system clock CL3 (3 × fsc) is obtained from MCK by a divide-by-two circuit. The 180° phase shift is generated by stopping the divide-by-two circuit for one MCK clock cycle. Table 4 INPUT The generated clock is a pseudo-line-locked clock that is referenced to fsc. The sync separator generates the necessary signals HDET and VDET indicating the line (H) and the field (V) sync periods. Function of pre clamp and main clamp COMB-MODE SVHS-MODE CVBS main clamp pre clamp Yext pre clamp main clamp SIGNAL SWITCHES S2A AND S2B Two switches are included to bypass the comb filter signal processing. The input video signal Cext for the switch S2B is internally biased. The input signals of the control and clock processing (CLOCK CONTROL) are: For the YO output two signals can be selected via S2A. HDET: analog horizontal pulse from sync separator Table 5 VDET: analog vertical pulse from sync separator FSC: subcarrier frequency SVHS SVHS: SVHS control signal. The output signals are: YO output signal YO OUTPUT SIGNAL MODE LOW YCOMB (combed luminance) COMB HIGH input Yext SVHS CL3: system clock (3 × fsc) HSEL: line start signal for the delay line For the CO output two signals can be selected via S2B. STOPS: forces the IC via the switches S2A and S2B into the SVHS-mode or into COMB-mode (always asynchronous). Table 6 SVHS HORIZONTAL AND VERTICAL SYNC SEPARATOR A built-in sync separator circuit generates the HDET and VDET signals from the CVBS input signal. This circuit is still working properly with a 12 dB attenuated sync in a normal 700 mV black-to-white video input signal (see Fig.5). CLAMP The black level clamping of the video input signals (CVBS and Yext) is performed by the sync separator stage. The clamping level is nearly adequate to the voltage at REFDL (pin 10). The clamp consists of a pre clamp and a main clamp. Always the signal which is switched to the output is clamped via the main clamp while the other signal is pre clamped. This reduces the distortion during switching from COMB-mode to SVHS-mode and vice versa. 1997 Mar 03 7 CO output signal CO OUTPUT SIGNAL MODE LOW CCOMB (combed chrominance) COMB HIGH input Cext SVHS Philips Semiconductors Preliminary specification Integrated NTSC comb filter SAA4963 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage − 6.5 V input voltage protection threshold (except pin 1) −0.3 VCC + 0.3 V ICCA analog supply current − 17 ICCO analog supply current output buffer − 45 mA IDDD digital supply current − 6 mA ICCPLL analog supply current PLL − 2.5 mA IO output current at pins 11 and 9 − ±15 mA Ptot total power dissipation − 400 mW Tstg storage temperature −25 +150 °C Tamb operating ambient temperature 0 70 °C Ves electrostatic handling (all pins) note 1 − ±300 V note 2 − ±2000 V V mA Notes 1. Machine model: equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor (0 Ω means: 2.5 µH + 25 Ω); ESD classification B in accordance with “UZW-B0/FQ-0601”. 2. Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor; ESD classification B in accordance with “UZW-B0/FQ-0601”. THERMAL CHARACTERISTICS SYMBOL Rth j-a 1997 Mar 03 PARAMETER VALUE UNIT SOT146-1 65 K/W SOT163-1 80 K/W thermal resistance from junction to ambient in free air 8 Philips Semiconductors Preliminary specification Integrated NTSC comb filter SAA4963 CHARACTERISTICS VDDD = VCCA = VCCO = VCCPLL = 5 V; Tamb = 25 °C; input signal Yext/CVBS = 1 V (p-p) (0 dB); input signal Cext = 0.7 V (p-p) (0 dB); input signal FSC = 200 mV (p-p), sine wave, DC level = 2 V; test signal: EBU colour bar 100/0/75/0 “CCIR471-1”; source impedance for Yext, CVBS, Cext = 75 Ω decoupled with 100 nF; source impedance for FSC = 75 Ω; load impedance for YO, CO = 1 kΩ and 20 pF in parallel; see Fig.9; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT 4.75 5 Supply voltage VCCA analog supply voltage (pin 4) note 1 5.5 V VCCO analog supply voltage output buffer (pin 6) note 1 4.75 5 5.5 V VDDD digital supply voltage (pin 15) note 1 4.75 5 5.5 V VCCPLL analog supply voltage PLL (pin 18) note 1 4.75 5 5.5 V V1(p-p) input AC voltage (peak-to-peak value) note 2 100 200 400 mV V1 input DC level 0 − 5.3 V FSC (pin 1) C1 input capacitance − − 10 pF Ileak input leakage current − − 10 µA Z1 source impedance − − 800 Ω VIH HIGH level input voltage 2.4 − VCC V VIL LOW level input voltage 0 0.85 1.5 V Ileak input leakage current − − 10 µA C2 input capacitance − − 10 pF analog supply current − 10 17 mA supply current − 35 45 mA V7 input voltage (AC coupled) − 0 3 dB R7 input resistance 100 250 400 kΩ C7 input capacitance − − 10 pF Z7 source impedance − − 1 kΩ −1 0 +1 dB SVHS (pin 2) VCCA (pin 4) ICCA VCCO (pin 6) ICCO Cext (pin 7) 1.25 V CO (pin 9) V9/V7 SVHS-mode: CO/Cext fsc ±0.3fsc; note 3 COMB-mode: transfer function C-path see Fig.6 V9 DC offset voltage related to input −400 0 +400 mV ∆V9 DC jump when forcing into SVHS-mode − 200 500 mV R9 output resistance − 10 100 Ω RL load resistance (to ground) 1.0 − − kΩ CL load capacitance (to ground) − − 25 pF 1997 Mar 03 9 Philips Semiconductors Preliminary specification Integrated NTSC comb filter SYMBOL V9 SAA4963 PARAMETER suppression (comb depth) related to the nearest ‘nominal’ chrominance frequency S/N signal-to-noise ratio (0.7 V/Veff noise) FPN(p-p) fixed pattern noise peak-to-peak referenced to 0.7 V (p-p) video CONDITIONS MIN. TYP. MAX. UNIT 227 × fH 26 30 − dB (227 − 35) × fH 18 22 − dB (227 + 28) × fH 18 22 − dB unweighted; fsc ±0.3fsc; note 3 52 − − dB 3fsc 30 − − dB 3⁄ 2fsc 36 − − dB fsc 3⁄ f 4 sc 50 − − dB 30 − − dB 0 to 5 MHz − −60 −40 dB dB see Fig.3 and note 4 αcr crosstalk between different inputs V9 FSC residue in SVHS mode related to 700 mV (p-p) − − −60 Gd differential gain 0.95 − − 1.1 1.25 1.4 V −1 0 +1 dB REFDL (pin 10) V10 DC voltage YO (pin 11) V11/V14 SVHS-mode: YO/Yext 0 to 5 MHz COMB-mode: transfer function Y-path see Fig.7 V11 DC offset voltage related to input −400 0 +400 mV ∆V11 DC jump when forcing into SVHS mode − 200 500 mV R11 output resistance − 10 100 Ω RL load resistance (to ground) 1.0 − − kΩ CL load capacitance (to ground) − − 25 pF V11 suppression (comb depth) related to the nearest ‘nominal’ luminance frequency 227.5 × fH 26 30 − dB (227.5 − 35) × fH 19 21 − dB (227.5 + 28) × fH 10 12 − dB see Fig.4 and note 4 S/N signal-to-noise ratio (0.7 V/Veff noise) unweighted; 200 kHz to 5 MHz 52 − − dB FPN(p-p) fixed pattern noise peak-to-peak referenced to 0.7 V (p-p) video 3fsc 30 − − dB 3⁄ 2fsc 30 − − dB fsc 3⁄ f 4 sc 30 − − dB 40 − − dB 0 to 5 MHz − −60 −40 dB dB αcr crosstalk between different inputs V11 FSC residue in SVHS mode related to 700 mV (p-p) − − −60 Gd differential gain 0.95 − − DC voltage 0 2.0 VCC CSY (pin 12) V12 1997 Mar 03 10 V Philips Semiconductors Preliminary specification Integrated NTSC comb filter SYMBOL SAA4963 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT CVBS (pin 13) V13 input voltage (AC coupled) 12 dB sync compression possible; see Fig.5 −3 0 +3 dB I13 input current during sync pulse; main clamp active −30 −16 − µA during active video; main clamp active − 2.2 4.5 µA V13 DC voltage during black level 1.1 1.25 1.4 V Z13 source impedance − − 1 kΩ Yext (pin 14) V14 input voltage (AC coupled) 12 dB sync compression possible; see Fig.5 −3 0 +3 dB I14 input current during sync pulse; pre clamp active −30 −20 − µA during active video; pre clamp active − 2.2 4.5 µA V14 DC voltage during black level 1.1 1.25 1.4 V Z14 source impedance − − 1 kΩ − 3 6 mA − 1.5 2.5 mA 1.1 1.25 1.4 V VDDD (pin 15) IDDD supply current VCCPLL (pin 18) I18 supply current REFBP (pin 20) V20 DC voltage Notes 1. ∆V = V CCA – V DDD ≤ 300 mV ∆V = V CCA – V CCPLL ≤ 300 mV ∆V = V CCA – V CCO ≤ 300 mV ∆V = V CCO – V CCPLL ≤ 300 mV ∆V = V CCO – V DDD ≤ 300 mV ∆V = V DDD – V CCPLL ≤ 300 mV 2. Input AC voltage and detection level are valid for sine wave signals and for square wave signals with a duty factor of 0.4 to 0.6. 3. Subcarrier frequency fsc = 3.579545 MHz. 4. Line frequency fH = 15.734264 kHz. 1997 Mar 03 11 Philips Semiconductors Preliminary specification Integrated NTSC comb filter SAA4963 handbook, full pagewidth fNTSC fsc C C Y (n − 2)fH Y (n − 1.5)fH Y (n − 1)fH (n − 0.5)fH MHA560 nfH Fig.3 Principle frequency response of a comb filtered NTSC chrominance signal. handbook, full pagewidth fNTSC fsc Y Y Y C (n − 2)fH (n − 1.5)fH C (n − 1)fH (n − 0.5)fH nfH Fig.4 Principle frequency response of a comb filtered NTSC luminance signal. 1997 Mar 03 12 MHA561 Philips Semiconductors Preliminary specification Integrated NTSC comb filter handbook, full pagewidth SAA4963 0.714 U (V) 0.537 0.165 0 −0.072 −0.165 −0.286 MHA562 Fig.5 FCC/EIA colour bar 100% saturation, 75% amplitude with 12 dB sync attenuation. gain handbook, full pagewidth MHA563 (dB) +1 0 −1 −4 −25 −30 0.13 0.66 0.85 1 1.12 1.35 2.0 frequency (fsc) Fig.6 Chrominance path: tolerance band with anti-alias filter. 1997 Mar 03 13 Philips Semiconductors Preliminary specification Integrated NTSC comb filter SAA4963 gain handbook, full pagewidth MGD848 (dB) +1 0 −1 −2 −3 −5 −32 0.7 1 1.12 1.4 2.7 frequency (fsc) Fig.7 Luminance path: tolerance band with anti-alias filter. TEST AND APPLICATION INFORMATION I2C-bus handbook, full pagewidth CONTROLLER I/O PORT IF input FSC SVHS 2 1 Cext 7 SVHS-C 9 SAA4963 Yext 14 SVHS-VBS 11 CO TDA837X YO COMB FILTER CVBS CVBSint TDA4665 B I2C-bus MHA565 Fig.8 Application diagram: SAA4963 with TDA837X. 1997 Mar 03 G BBDL 13 14 R MSD 1997 Mar 03 SVHS 15 1 kΩ 3 1 2 SVHS-C 4 Cext FSC 100 nF VCCO 75 Ω VCCA 75 Ω 100 nF REFDL CO OGND Cext VCCO AGND VCCA i.c. SVHS FSC 10 9 8 7 6 5 4 3 2 1 11 12 13 14 15 YO CSY CVBS Yext VDDD DGND VDDD 330 nF 330 nF 330 nF 1 kΩ 100 nF VCCPLL 47 Ω SVHS-Y PLLGND VCCPLL i.c. 75 Ω 75 Ω VCCPLL VCCA CVBS Yext 100 nF 100 nF 100 nF 100 nF 2 2 2 100 µF MHA564 2 VCCPLLS 33 µH 1 100 µF VCCAS 33 µH 1 100 µF VCCOS 33 µH 1 100 µF VDDDS 33 µH 1 Integrated NTSC comb filter Fig.9 Test circuit. SAA4963 16 17 18 19 20 REFBP handbook, full pagewidth VCCO VDDD Philips Semiconductors Preliminary specification SAA4963 Philips Semiconductors Preliminary specification Integrated NTSC comb filter SAA4963 PACKAGE OUTLINES DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1 ME seating plane D A2 A A1 L c e Z b1 w M (e 1) b MH 11 20 pin 1 index E 1 10 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c mm 4.2 0.51 3.2 1.73 1.30 0.53 0.38 0.36 0.23 26.92 26.54 inches 0.17 0.020 0.13 0.068 0.051 0.021 0.015 0.014 0.009 1.060 1.045 D (1) e e1 L ME MH w Z (1) max. 6.40 6.22 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 2.0 0.25 0.24 0.10 0.30 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.078 E (1) Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT146-1 1997 Mar 03 REFERENCES IEC JEDEC EIAJ SC603 16 EUROPEAN PROJECTION ISSUE DATE 92-11-17 95-05-24 Philips Semiconductors Preliminary specification Integrated NTSC comb filter SAA4963 SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c HE y v M A Z 11 20 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 10 e bp detail X w M 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.51 0.49 0.30 0.29 0.050 0.42 0.39 0.055 0.043 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 inches 0.10 Z (1) θ Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT163-1 075E04 MS-013AC 1997 Mar 03 EIAJ EUROPEAN PROJECTION ISSUE DATE 92-11-17 95-01-24 17 o 8 0o Philips Semiconductors Preliminary specification Integrated NTSC comb filter SAA4963 Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. WAVE SOLDERING This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). Wave soldering techniques can be used for all SO packages if the following conditions are observed: • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. DIP SOLDERING BY DIPPING OR BY WAVE • The longitudinal axis of the package footprint must be parallel to the solder flow. The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. • The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. REPAIRING SOLDERED JOINTS A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. 1997 Mar 03 18 Philips Semiconductors Preliminary specification Integrated NTSC comb filter SAA4963 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1997 Mar 03 19 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 1949 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580/xxx France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstraße 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd. Worli, MUMBAI 400 018, Tel. +91 22 4938 541, Fax. +91 22 4938 722 Indonesia: see Singapore Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Rua do Rocio 220, 5th floor, Suite 51, 04552-903 São Paulo, SÃO PAULO - SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 829 1849 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 3 301 6312, Fax. +34 3 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 632 2000, Fax. +46 8 632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2686, Fax. +41 1 481 7730 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2870, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com © Philips Electronics N.V. 1997 SCA53 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 547047/1200/02/pp20 Date of release: 1997 Mar 03 Document order number: 9397 750 01765