PHILIPS TEA1205AT

INTEGRATED CIRCUITS
DATA SHEET
TEA1205AT
High efficiency DC/DC converter
Preliminary specification
File under Integrated Circuits, IC03
1998 Mar 24
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
TEA1205AT
FEATURES
GENERAL DESCRIPTION
• Fully integrated DC/DC converter circuit
The TEA1205AT (see Fig.1) is a fully integrated DC/DC
converter circuit using the minimum amount of external
components. It is intended to be used to supply electronic
circuits with supply voltages of 3.3 or 5.5 V from
2, 3 or 4 NiCd cell batteries or one Li-ion battery at an
output power level up to 3.6 W (typ.) continuously, or 8 W
in GSM TDMA (1 : 8) burst mode. The switching frequency
of the converter can be synchronized to an external
high-frequency clock. Efficient, compact and dynamic
power conversion is achieved using a novel, digitally
controlled Pulse Width and Frequency Modulation
(PWFM) like control concept, integrated low RdsON CMOS
power switches with low parasitic capacitances and
synchronous rectification.
• Up conversion in 2 different modes
• High efficiency over wide load range
• Synchronizes to external high frequency clock
• Output power up to 3.6 W (typ.) continuous, 8 W in GSM
burst mode
• Low quiescent power consumption
• True current limit for Li-ion battery compatibility
• Shut-down function
• 8-pin SO package.
APPLICATIONS
• Cellular and cordless phones PDAs and others
• Supply voltage source for low-voltage chip sets
• Portable computers
• Battery backup supplies
• Cameras.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
TEA1205AT
1998 Mar 24
SO8
DESCRIPTION
plastic small outline package; 8 leads; body width 3.9 mm
2
VERSION
SOT96-1
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
TEA1205AT
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
VO
Vstart
output voltage
VSEL = LOW
5.23
5.55
5.85
V
VSEL = HIGH
3.13
3.34
3.54
V
1.6
2.0
2.2
V
start-up voltage
Efficiency; see Figs 6 and 7
η
efficiency
up from 2.4 to 3.3 V
1 mA < IL < 1.0 A
80
90
95
%
up from 3.6 to 5.5 V
1 mA < IL < 1.0 A
83
90
94
%
Current levels
Iq
quiescent current at pin 3
50
60
70
µA
ISHDWN
shut-down current
−
2
10
µA
IlimN
NFET current limit
0.9 Ilim
Ilim
1.1 Ilim
A
Ilx
max. continuous current at pin 5
−
−
1.0
A
note 1
Power MOSFETS
RdsON(N)
pin-to-pin resistance NFET
0.08
0.12
0.20
Ω
RdsON(P)
pin-to-pin resistance PFET
0.10
0.16
0.25
Ω
fsw
switching frequency
150
200
240
kHz
tres
response time from standby to Pmax
−
25
−
µs
fsync
synchronisation input frequency
−
13
−
MHz
Timing
Note
1. The NFET current limit is set by an external 1% accurate resistor Rlim connected between pin 7 and pin 6 (ground).
The typical maximum instantaneous current is defined as: Ilim = 890 V/ Rlim so the use of Rlim = 315 Ω will lead to a
typical maximum current value of 2.83 A. The average inductor current during current limit also depends on
inductance value and resistive losses in all components in the power path. In normal application and when using
Rlim = 315 Ω, the average inductor current will be limited to 2.3 A typical.
1998 Mar 24
3
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3
OUT
TEA1205AT
4
START-UP
CIRCUIT
I/V
CONVERTER
CONTROL LOGIC
AND
MODE GEARBOX
IIimN
SENSE
Philips Semiconductors
P-type POWER FET
5
High efficiency DC/DC converter
BLOCK DIAGRAM
handbook, full pagewidth
1998 Mar 24
LX
4
TEMPERATURE
PROTECTION
ROM
20 MHz
OSCILLATOR
N-type
POWER
FET
TIME
COUNTER
BANDGAP
REFERENCE
DIGITAL CONTROLLER
sense
FET
6
7
1
2
8
MGM696
ILIM
VSEL
SYNC
SHDWN
TEA1205AT
Fig.1 Block diagram.
Preliminary specification
GND
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
TEA1205AT
PINNING
SYMBOL
PIN
DESCRIPTION
VSEL
1
output voltage selection input
SYNC
2
synchronisation clock input
OUT
3
output voltage output
SENSE
4
output voltage sense input
LX
5
inductor connection
GND
6
ground
ILIM
7
current limit resistor connection
SHDWN
8
shut-down input
handbook, halfpage
VSEL 1
SHDWN
7
ILIM
OUT 3
6
GND
SENSE 4
5
LX
SYNC 2
TEA1205AT
MGM697
Fig.2 Pin configuration.
The ripple on top of the DC level is a result of the current
in the output capacitor, which changes in sign twice per
cycle, times the capacitor’s internal Equivalent Series
Resistance (ESR). After each ramp-down of the inductor
current, i.e. when the ESR effect increases the output
voltage, the converter determines what to do in the next
cycle. As soon as more load current is taken from the
output the output voltage starts to decay. When the output
voltage becomes lower than the low limit of the window,
a corrective action is taken by a ramp-up of the inductor
current during a much longer time. As a result, the DC
current level is increased and normal continuous
conduction mode can continue. The output voltage
(including ESR effect) is again within the predefined
window.
FUNCTIONAL DESCRIPTION
Control mechanism
The TEA1205AT DC/DC converter is able to operate in
discontinuous or continuous conduction operation.
All switching actions are completely determined by a
digital control circuit which uses the output voltage level as
its control input. This novel digital approach enables the
use of a new pulse width and frequency modulation
scheme, which ensures optimum power efficiency over the
complete range of operation of the converter. The scheme
works as follows. At low output power, a very small current
pulse is generated in the inductor, and the pulse rate
varies with a varying load. When the output voltage drops
below a specific limit, which indicates that the converter’s
current capability is not sufficient, the digital controller
switches to the next state of operation. The peak current in
the inductor is made higher, and the pulse rate can again
vary with a varying load. A third operation state is available
for again higher currents.
Figure 5 depicts the spread of the output voltage window.
The absolute value is most dependent on spread, while the
actual window size is not affected. For one specific device,
the output voltage will not vary more than 4%.
Start-up
When high output power is requested, the device starts
operating in continuous conduction mode. This results in
minimum AC currents in the circuit components and hence
optimum efficiency, cost, and EMC. In this mode, the
output voltage is allowed to vary between two predefined
voltage levels. As long as the output voltage stays within
this so-called window, switching continues in a fixed
pattern. When the output voltage reaches one of the
window borders, the digital controller immediately reacts
by adjusting the pulse width and inserting a current step in
such a way that the output voltage stays within the window
with higher or lower current capability. This approach
enables very fast reaction to load variations. Figure 3
shows the various coil current waveforms for low and high
current capability in each power conversion mode.
A possible deadlock situation in boost configuration can
occur after a sequence of disconnecting and reconnecting
the input voltage source. If, after disconnection of the input
source, the output voltage falls below 2.0 V, the device
may not restart properly after reconnection of the input
source, and may take continuous current from the input.
An external circuit to prevent the deadlock situation is
shown in Chapter “Application information”.
Shut-down
When the shut-down pin is made HIGH, the converter
disables both switches and power consumption is reduced
to a few µA.
Figure 4 shows the converter’s response to a sudden load
increase. The upper trace shows the output voltage.
1998 Mar 24
8
5
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
TEA1205AT
Synchronisation function
Behaviour at input voltage exceeding the specified
range
In continuous conduction mode, the converter
switching frequency is synchronized to the signal at the
SYNC input, provided that this signal is present and its
frequency is 13 MHz. The switching frequency will than
be 26 times smaller than the applied input frequency at
the sync pin. If no sync signal is applied (Sync pin H
or L), the converter’s switching frequency will be
around 203 kHz, equally to behaviour at 13 MHz sync
input frequency, but with a larger tolerance. When this
function is not used, the SYNC pin must be tied to pin 3
or pin 6.
In general, an input voltage exceeding the specified range
is not recommended since instability may occur. However,
at an input voltage equal to or higher than the target output
voltage plus the diode voltage drop, but lower than 6 V, the
converter will stop switching and the external schottky
diode will take over, resulting in Vo equalling Vi minus the
diode voltage drop (see Fig.8).
handbook, halfpage
Power switches
low power
mode
The power switches in the IC are one N-type and one
P-type MOSFET, having a typical pin-to-pin resistance of
0.12 Ω and 0.16 Ω respectively. The maximum average
current in the switches is 1.0 A.
medium power
mode 1
Temperature protection
At too high device temperature (typical 165 °C), the
converter stops operating. It resumes operation when the
device temperature falls below 165 °C again. As a result,
low-frequent cycling between on and off state will occur.
It should be noted that in the event of device temperatures
around the cut-off limit, the application differs strongly from
maximum specifications.
increasing
load
medium power
mode 2
low DC current
Current limit
high DC current
If the current in the N-type power switch exceeds the limit
which is set by the value of the external resistor, current
ramping is stopped immediately, and the next switching
phase is entered. Current limitation is required to enable
optimal use of energy in Li-ion batteries, and to keep
power conversion efficient during temporary high loads.
Furthermore, current limitation protects the IC against
overload conditions, inductor saturation, etc.
1998 Mar 24
time
Fig.3
6
MGK924
Coil current waveforms in the various power
modes.
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
load increase
handbook, full pagewidth
TEA1205AT
start corrective action
Vo
high window limit
low window limit
time
IL
time
MGK925
Fig.4 Response to load increase.
handbook, full pagewidth
maximum positive spread
upper specification limit
5.85
Vh
Vo
(V)
+3%
4%
Vh
5.66
Vl
4%
−3%
+3%
Vh
5.44
Vl
−3%
4%
Vl
lower specification limit
5.23
typical situation
maximum negative spread
MGM698
Fig.5 Output voltage window position at typical, maximum and minimum specification.
1998 Mar 24
7
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
TEA1205AT
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
Vn
PARAMETER
CONDITIONS
voltage on any pin
MIN.
MAX.
UNIT
shut-down mode
−0.2
+6.5
V
operational mode
−0.2
+5.9
V
Tj
junction temperature
−25
+150
°C
Tamb
operating ambient temperature
−40
+80
°C
Tstg
storage temperature
−65
+125
°C
Ves
electrostatic handling
−3000
+3000
V
note 1
Note
1. Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor.
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
PARAMETER
CONDITIONS
thermal resistance from junction to ambient
VALUE
UNIT
150
K/W
in free air
QUALITY SPECIFICATION
In accordance with “SNW-FQ-611 part E”. The numbers of the quality specification can be found in the “Quality
Reference Handbook”. The handbook can be ordered using the code 9397 750 00192.
CHARACTERISTICS
Tj = −20 to +80 °C; all voltages with respect to ground; positive currents flow into the IC; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
VO
output voltage
Vstart
start-up voltage
VSEL = LOW
5.23
5.55
5.85
V
VSEL = HIGH
3.13
3.34
3.54
V
1.6
2.0
2.2
V
Efficiency
η
efficiency
up from 2.4 to 3.3 V
1 mA < IL < 1.0 A
80
90
95
%
up from 3.6 to 5.5 V
1 mA < IL < 1.0 A
83
90
94
%
Current levels
Iq
quiescent current at pin 3
50
60
70
µA
ISHDWN
shut-down current
−
2
10
µA
IlimN
NFET current limit
Ilx
max. continuous current at pin 5
note 1
0.9 Ilim
Ilim
1.1 Ilim
A
−
−
1.0
A
Power MOSFETS
RdsON(N)
pin-to-pin resistance NFET
0.08
0.12
0.20
Ω
RdsON(P)
pin-to-pin resistance PFET
0.10
0.16
0.25
Ω
1998 Mar 24
8
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
SYMBOL
PARAMETER
TEA1205AT
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Timing
fsw
switching frequency
150
200
240
kHz
tres
response time from standby to
Pmax
−
25
−
µs
fsync
synchronisation input frequency
−
13
−
MHz
Temperature
Tamb
operating ambient temperature
−20
+25
+80
°C
Tmax
internal cut-off temperature
150
165
180
°C
0
−
0.4
V
Digital levels
VlL
LOW-level input voltage pins
1, 2, 7 and 8
VIH
HIGH-level input voltage pin 1
note 2
V3 − 0.4 −
V3 + 0.3 V
VIH
HIGH-level input voltage pin 2
notes 2 and 3
2.0
−
V3 + 0.3 V
VIH
HIGH-level input voltage pin 8
notes 2 and 3
2.9
−
V3 + 0.3 V
Sense pin resistance
RSENSE
SENSE pin resistance to GND
up to 3.3 V mode
437.2
546.5
655.8
kΩ
up to 5.0 V mode
662.2
827.8
993.4
kΩ
Notes
1. The NFET current limit is set by an external 1% accurate resistor Rlim connected between pin 7 and pin 6 (ground).
The typical maximum instantaneous current is defined as: Ilim = 890 V/ Rlim so the use of Rlim = 315 Ω will lead to a
typical maximum current value of 2.83 A. The average inductor current during current limit also depends on
inductance value and resistive losses in all components in the power path. In normal application and when using
Rlim = 315 Ω, the average inductor current will be limited to 2.3 A typical.
2. V3 is the voltage at pin 3 (OUT).
3. If the applied high level is less than V3 − 1 V, the quiescent current level of the device will increase. The maximum
increase is 300 µA in the event that pin 2 is at 2.0 V.
1998 Mar 24
9
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
TEA1205AT
MGM699
100
handbook, full pagewidth
efficiency
(%)
PFM
PWM
90
80
70
60
50
40
10−1
1
10
102
IL (mA)
103
Using a Coilcraft DO3308P 10 µH inductor and a Sprague 595D 330 µF capacitor.
The dotted line represents the Pulse Frequency Modulation (PFM) and the solid line the Pulse Width Modulation (PWM).
Fig.6 Efficiency as a function of load current IL (2.4 to 3.3 V).
MGM700
100
handbook, full pagewidth
efficiency
(%)
PWM
90
PFM
80
70
60
50
40
10−1
1
10
102
Using a Coilcraft DO3308P 10 µH inductor and a Sprague 595D 330 µF capacitor.
The dotted line represents the Pulse Frequency Modulation (PFM) and the solid line the Pulse Width Modulation (PWM).
Fig.7 Efficiency as a function of load current IL (3.6 to 5.5 V).
1998 Mar 24
10
IL (mA)
103
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
TEA1205AT
APPLICATION INFORMATION
handbook, full pagewidth
D1
VO
OUT
L1
VI
LX
C1
TEA1205AT
GND ILIM
SENSE
VSEL SYNC SHDWN
C2
Rlim
MGM701
Fig.8 Complete application for upconversion.
A typical component choice for an upconverter from
3 NiCd cells or one Li-ion cell to 5.0 V in a GSM handset
(peak power 7.5 W, peak current 2.7 A) is (see Fig.8):
SHDWN pin. TR1, R1 and R2 should be omitted in that
case.
More application information can be found in the
associated application note.
• L1 = 10 µH; Isat > 2.3 A; low DC resistance, e.g.
Coilcraft DO3308-103
• C1 = 100 µF; low ESR capacitor; necessity depends on
type of input voltage source
• C2 = 330 µF; ESR = 0.1 Ω; e.g. Sprague 595D series
• D1; medium power Schottky diode; e.g. Philips
PRLL5819.
For lower power applications, the Isat and RDC values of
the inductor can be scaled back by the scaling factor of the
output current from the values above. The same holds for
the ESR value of the output capacitor. A further
improvement is increase of inductance and decrease of
output capacitance.
R1
1 MΩ
SHDWN
R2
VI
TR1
2.7 MΩ
An additional circuit to prevent start-up deadlock in
upconversion is shown in Fig.9. The function of TR1, R1
and R2 is to put the converter into shut-down mode when
the input source is suddenly disconnected. The circuit
operates as follows. When VI is present, TR1 conducts
and the SHDWN pin is kept LOW. As soon as VI falls below
1 V, TR1 no longer conducts and the device is put into
shut-down before VO falls below 2 V. In the event that a
signal is available which indicates the presence of the
input voltage source, this signal should be applied to the
1998 Mar 24
VO
handbook, halfpage
MGK930
Fig.9 External deadlock prevention circuit.
11
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
TEA1205AT
PACKAGE OUTLINE
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
D
E
A
X
c
y
HE
v M A
Z
5
8
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
4
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
5.0
4.8
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
0.01
0.019 0.0100
0.014 0.0075
0.20
0.19
0.16
0.15
0.244
0.039 0.028
0.050
0.041
0.228
0.016 0.024
inches
0.010 0.057
0.069
0.004 0.049
0.01
0.01
0.028
0.004
0.012
θ
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT96-1
076E03S
MS-012AA
1998 Mar 24
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
95-02-04
97-05-22
12
o
8
0o
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
TEA1205AT
SOLDERING
Wave soldering
Introduction
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream end.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(order code 9398 652 90011).
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Reflow soldering
Reflow soldering techniques are suitable for all SO
packages.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Repairing soldered joints
Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
1998 Mar 24
13
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
TEA1205AT
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1998 Mar 24
14
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
TEA1205AT
NOTES
1998 Mar 24
15
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Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,
Tel. +81 3 3740 5130, Fax. +81 3 3740 5077
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381
Middle East: see Italy
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. +31 40 27 82785, Fax. +31 40 27 88399
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
Tel. +64 9 849 4160, Fax. +64 9 849 7811
Norway: Box 1, Manglerud 0612, OSLO,
Tel. +47 22 74 8000, Fax. +47 22 74 8341
Philippines: Philips Semiconductors Philippines Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. +48 22 612 2831, Fax. +48 22 612 2327
Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 755 6918, Fax. +7 095 755 6919
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,
Tel. +65 350 2538, Fax. +65 251 6500
Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. +27 11 470 5911, Fax. +27 11 470 5494
South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 821 2382
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 3 301 6312, Fax. +34 3 301 4107
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 632 2000, Fax. +46 8 632 2745
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2686, Fax. +41 1 488 3263
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. +90 212 279 2770, Fax. +90 212 282 6707
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
Internet: http://www.semiconductors.philips.com
© Philips Electronics N.V. 1998
SCA57
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
415102/1200/01/pp16
Date of release: 1998 Mar 24
Document order number:
9397 750 03344