INTEGRATED CIRCUITS DATA SHEET TDA8922 2 × 25 W class-D power amplifier Objective specification 2003 Mar 20 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 CONTENTS 1 FEATURES 2 APPLICATIONS 3 GENERAL DESCRIPTION 4 QUICK REFERENCE DATA 5 ORDERING INFORMATION 6 BLOCK DIAGRAM 7 PINNING 8 FUNCTIONAL DESCRIPTION 8.1 8.2 8.3 8.3.1 8.3.2 8.3.3 8.3.4 8.4 General Pulse width modulation frequency Protections Overtemperature Short-circuit across loudspeaker terminals and to supply lines Start-up safety test Supply voltage alarm Differential audio inputs 9 LIMITING VALUES 10 THERMAL CHARACTERISTICS 11 QUALITY SPECIFICATION 12 STATIC CHARACTERISTICS 13 SWITCHING CHARACTERISTICS 14 DYNAMIC AC CHARACTERISTICS (STEREO AND DUAL SE APPLICATION) 15 DYNAMIC AC CHARACTERISTICS (MONO BTL APPLICATION) 16 APPLICATION INFORMATION 16.1 16.2 16.3 16.4 16.5 16.6 16.7 16.8 16.9 16.10 16.11 16.12 16.13 BTL application Pin MODE Output power estimation External clock Heatsink requirements Output current limiting Pumping effects Reference design PCB information for HSOP24 package Classification Bill of materials for reference design Curves measured in reference design Application schematics 2003 Mar 20 2 17 PACKAGE OUTLINE 18 SOLDERING 18.1 18.2 18.2.1 18.2.2 18.3 18.3.1 18.3.2 18.3.3 18.4 Introduction Through-hole mount packages Soldering by dipping or by solder wave Manual soldering Surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of IC packages for wave, reflow and dipping soldering methods 19 DATA SHEET STATUS 20 DEFINITIONS 21 DISCLAIMERS Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier 1 TDA8922 FEATURES 2 APPLICATIONS • High efficiency (∼90%) • Television sets • Operating supply voltage from ±12.5 to ±30 V • Home-sound sets • Very low quiescent current • Multimedia systems • Low distortion • All mains fed audio systems • Usable as a stereo Single-Ended (SE) amplifier or as a mono amplifier in Bridge-Tied Load (BTL) • Car audio (boosters). • Fixed gain of 30 dB in Single-Ended (SE) and 36 dB in Bridge-Tied Load (BTL) 3 The TDA8922 is a high efficiency class-D audio power amplifier with very low dissipation. The typical output power is 2 × 25 W. • High output power • Good ripple rejection • Internal switching frequency can be overruled by an external clock The device is available in the HSOP24 power package with a small internal heatsink and in the DBS23P through-hole power package. Depending on the supply voltage and load conditions, a very small or even no external heatsink is required. The amplifier operates over a wide supply voltage range from ±12.5 to ±30 V and consumes a very low quiescent current. • No switch-on or switch-off plop noise • Short-circuit proof across load and to supply lines • Electrostatic discharge protection • Thermally protected. 4 GENERAL DESCRIPTION QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT General; VP = ±20 V VP supply voltage ±12.5 ±20 ±30 V Iq(tot) total quiescent supply no load connected current − 55 75 mA η efficiency Po = 25 W; SE: RL = 2 × 8 Ω; fi = 1 kHz − 90 − % RL = 8 Ω; THD = 10%; VP = ±20 V; note 1 22 25 − W RL = 4 Ω; THD = 10%; VP = ±15 V; note 1 22 25 − W RL = 8 Ω; THD = 10%; VP = ±15 V; note 1 46 50 − W Stereo single-ended configuration output power Po Mono bridge-tied load configuration Po output power Note 1. See Section 16.5. 5 ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION TDA8922TH HSOP24 plastic, heatsink small outline package; 24 leads; low stand-off height SOT566-3 TDA8922J DBS23P plastic DIL-bent-SIL power package; 23 leads (straight lead length 3.2 mm) SOT411-1 2003 Mar 20 3 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier 6 TDA8922 BLOCK DIAGRAM handbook, full pagewidth VDDA2 VDDA1 3 (20) IN1− IN1+ SGND1 OSC MODE VDDP2 STABI PROT 10 (4) 18 (12) 13 (7) 23 (16) VDDP1 14 (8) 15 (9) PWM MODULATOR INPUT STAGE 8 (2) 11 (5) SWITCH1 CONTROL AND ENABLE1 HANDSHAKE mute DRIVER HIGH 16 (10) STABI VSSP1 7 (1) 6 (23) MANAGER OSCILLATOR MODE TEMPERATURE SENSOR CURRENT PROTECTION TDA8922TH (TDA8922J) VDDP2 IN2− ENABLE2 CONTROL SWITCH2 AND HANDSHAKE RELEASE2 5 (22) 4 (21) INPUT STAGE 1 (18) VSSA2 PWM MODULATOR 12 (6) VSSA1 24 (17) VSSD 19 (-) HW (1) (1) Pin HW (TDA8922TH only) should be connected to pin VSSD in the application. Pin numbers in parenthesis refer to the TDA8922J. Fig.1 Block diagram. 2003 Mar 20 BOOT2 2 (19) mute IN2+ OUT1 DRIVER LOW 22 (15) SGND2 BOOT1 RELEASE1 9 (3) 4 DRIVER HIGH 21 (14) OUT2 DRIVER LOW 17 (11) VSSP1 20 (13) VSSP2 MGU994 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier 7 TDA8922 PINNING PIN SYMBOL VSSA2 DESCRIPTION TDA8922TH TDA8922J 1 18 negative analog supply voltage for channel 2 SGND2 2 19 signal ground for channel 2 VDDA2 3 20 positive analog supply voltage for channel 2 IN2− 4 21 negative audio input for channel 2 IN2+ 5 22 positive audio input for channel 2 MODE 6 23 mode selection input: standby, mute or operating OSC 7 1 oscillator frequency adjustment or tracking input IN1+ 8 2 positive audio input for channel 1 IN1− 9 3 negative audio input for channel 1 VDDA1 10 4 positive analog supply voltage for channel 1 SGND1 11 5 signal ground for channel 1 VSSA1 12 6 negative analog supply voltage for channel 1 PROT 13 7 time constant capacitor for protection delay VDDP1 14 8 positive power supply voltage for channel 1 BOOT1 15 9 bootstrap capacitor for channel 1 OUT1 16 10 PWM output from channel 1 VSSP1 17 11 negative power supply voltage for channel 1 STABI 18 12 decoupling of internal stabilizer for logic supply HW 19 − handle wafer; must be connected to pin VSSD VSSP2 20 13 negative power supply voltage for channel 2 OUT2 21 14 PWM output from channel 2 BOOT2 22 15 bootstrap capacitor for channel 2 VDDP2 23 16 positive power supply voltage for channel 2 VSSD 24 17 negative digital supply voltage 2003 Mar 20 5 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 handbook, halfpage handbook, halfpage OSC 1 IN1+ 2 IN1− 3 VDDA1 4 SGND1 5 VSSA1 6 VSSD 24 1 VSSA2 PROT 7 VDDP2 23 2 SGND2 VDDP1 8 BOOT2 22 3 VDDA2 BOOT1 9 OUT2 21 4 IN2− OUT1 10 VSSP2 20 5 IN2+ VSSP1 11 6 MODE HW 19 STABI 12 TDA8922TH STABI 18 7 OSC VSSP2 13 VSSP1 17 8 IN1+ OUT2 14 OUT1 16 9 IN1− BOOT2 15 BOOT1 15 10 VDDA1 VDDP2 16 VDDP1 14 11 SGND1 VSSD 17 PROT 13 12 VSSA1 VSSA2 18 TDA8922J SGND2 19 MGU995 VDDA2 20 IN2− 21 IN2+ 22 MODE 23 MGU996 Fig.2 Pin configuration TDA8922TH. 2003 Mar 20 Fig.3 Pin configuration TDA8922J. 6 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier 8 8.1 TDA8922 The amplifier system can be switched in three operating modes with pin MODE: FUNCTIONAL DESCRIPTION General • Standby mode; with a very low supply current The TDA8922 is a two channel audio power amplifier using class-D technology. A detailed application reference design is shown in Fig.10. Typical application schematics are shown in Figs 37 and 38. • Mute mode; the amplifiers are operational, but the audio signal at the output is suppressed • Operating mode; the amplifiers fully are operational with output signal. The audio input signal is converted into a digital Pulse Width Modulated (PWM) signal via an analog input stage and PWM modulator. To enable the output power transistors to be driven, this digital PWM signal is applied to a control and handshake block and driver circuits for both the high side and low side. In this way a level shift is performed from the low power digital PWM signal (at logic levels) to a high power PWM signal which switches between the main supply lines. An example of a switching circuit for driving pin MODE is illustrated in Fig.4. For suppressing plop noise, the amplifier will remain automatically in the mute mode for approximately 150 ms before switching to the operating mode (see Fig.5). During this time, the coupling capacitors at the input are fully charged. A 2nd-order low-pass filter converts the PWM signal to an analog audio signal across the loudspeakers. The TDA8922 one-chip class-D amplifier contains high power D-MOS switches, drivers, timing and handshaking between the power switches and some control logic. For protection a temperature sensor and a maximum current detector are built-in. handbook, halfpage +5 V standby/ mute The two audio channels of the TDA8922 contain two PWMs, two analog feedback loops and two differential input stages. It also contains circuits common to both channels such as the oscillator, all reference sources, the mode functionality and a digital timing manager. mute/on R MODE pin R SGND The TDA8922 contains two independent amplifier channels with high output power, high efficiency (90%), low distortion and a low quiescent current. The amplifier channels can be connected in the following configurations: MBL463 • Mono Bridge-Tied Load (BTL) amplifier • Stereo Single-Ended (SE) amplifiers. 2003 Mar 20 Fig.4 Example of mode selection circuit. 7 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 audio handbook, full pagewidth switching Vmode operating 4V mute 2V 0 V (SGND) standby 100 ms time >50 ms audio switching Vmode operating 4V 0 V (SGND) standby 100 ms 50 ms time MBL465 When switching from standby to mute, there is a delay of 100 ms before the output starts switching. The audio signal is available after Vmode has been set to operating, but not earlier than 150 ms after switching to mute. When switching from standby to operating, there is a first delay of 100 ms before the outputs starts switching. The audio signal is available after a second delay of 50 ms. Fig.5 Timing on mode selection input. 2003 Mar 20 8 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier 8.2 TDA8922 8.3.2 Pulse width modulation frequency AND TO SUPPLY LINES The output signal of the amplifier is a PWM signal with a carrier frequency of approximately 350 kHz. Using a 2nd-order LC demodulation filter in the application results in an analog audio signal across the loudspeaker. This switching frequency is fixed by an external resistor ROSC connected between pin OSC and VSSA. With the resistor value given in the schematic diagram of the reference design, the carrier frequency is typical 350 kHz. The carrier frequency can be calculated using the When the loudspeaker terminals are short-circuited or if one of the demodulated outputs of the amplifier is short-circuited to one of the supply lines, this will be detected by the current protection. If the output current exceeds the maximum output current of 4 A, then the power stage will shut down within less than 1 µs and the high current will be switched off. In this state the dissipation is very low. Every 100 ms the system tries to restart again. If there is still a short-circuit across the loudspeaker load or to one of the supply lines, the system is switched off again as soon as the maximum current is exceeded. The average dissipation will be low because of this low duty cycle. 9 9 × 10 following equation: f osc = ------------------- Hz R OSC If two or more class-D amplifiers are used in the same audio application, it is advisable to have all devices operating at the same switching frequency. 8.3.3 This can be realized by connecting all OSC pins together and feed them from a external central oscillator. Using an external oscillator it is necessary to force pin OSC to a DC-level above SGND for switching from the internal to an external oscillator. In this case the internal oscillator is disabled and the PWM will be switched on the external frequency. The frequency range of the external oscillator must be in the range as specified in the switching characteristics; see Chapter 13. • Internal oscillator: ROSC connected between pin OSC and VSSA • External oscillator: connect the oscillator signal between pins OSC and SGND; delete ROSC and COSC. Protections Remark: This test is only operational prior to or during the start-up sequence, and not during normal operation. Temperature, supply voltage and short-circuit protections sensors are included on the chip. In the event that the maximum current or maximum temperature is exceeded the system will shut down. 8.3.1 During normal operation the maximum current protection is used to detect short-circuits across the load and with respect to the supply lines. OVERTEMPERATURE If the junction temperature Tj > 150 °C, then the power stage will shut down immediately. The power stage will start switching again if the temperature drops to approximately 130 °C, thus there is a hysteresis of approximately 20 °C. 2003 Mar 20 START-UP SAFETY TEST During the start-up sequence, when pin MODE is switched from standby to mute, the conditions at the output terminals of the power stage are checked. In the event of a short-circuit at one of the output terminals to VDD or VSS the start-up procedure is interrupted and the systems waits for open-circuit outputs. Because the test is done before enabling the power stages, no large currents will flow in the event of a short-circuit. This system protects for short-circuits at both sides of the output filter to both supply lines. When there is a short-circuit from the power PWM output of the power stage to one of the supply lines (before the demodulation filter) it will also be detected by the start-up safety test. Practical use of this test feature can be found in detection of short-circuits on the printed-circuit board. In an application circuit: 8.3 SHORT-CIRCUIT ACROSS LOUDSPEAKER TERMINALS 9 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier 8.3.4 TDA8922 8.4 SUPPLY VOLTAGE ALARM If the supply voltage drops below ±12.5 V, the undervoltage protection circuit is activated and the system will shut down correctly. If the internal clock is used, this switch-off will be silent and without plop noise. When the supply voltage rises above the threshold level, the system is restarted again after 100 ms. If the supply voltage exceeds ±32 V the overvoltage protection circuit is activated and the power stages will shut down. They are re-enabled as soon as the supply voltage drops below the threshold level. Differential audio inputs For a high common mode rejection ratio and a maximum of flexibility in the application, the audio inputs are fully differential. By connecting the inputs anti-parallel the phase of one of the channels can be inverted, so that a load can be connected between the two output filters. In this case the system operates as a mono BTL amplifier and with the same loudspeaker impedance an approximately four times higher output power can be obtained. The input configuration for a mono BTL application is illustrated in Fig.6; for more information see Chapter 16. An additional balance protection circuit compares the positive (VDD) and the negative (VSS) supply voltages and is triggered if the voltage difference between them exceeds a certain level. This level depends on the sum of both supply voltages. An expression for the unbalanced threshold level is as follows: Vth(unb) ≈ 0.15 × (VDD + VSS). In the stereo single-ended configuration it is also recommended to connect the two differential inputs in anti-phase. This has advantages for the current handling of the power supply at low signal frequencies. Example: With a symmetrical supply of ±30 V, the protection circuit will be triggered if the unbalance exceeds approximately 9 V; see Section 16.7. handbook, full pagewidth OUT1 IN1+ IN1− Vin SGND IN2+ IN2− OUT2 power stage MBL466 Fig.6 Input configuration for mono BTL application. 2003 Mar 20 10 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 9 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT − ±30 V − 5.5 V − ±30 V − 4 A storage temperature −55 +150 °C Tamb ambient temperature −40 +85 °C Tvj virtual junction temperature − 150 °C VP supply voltage VMODE input voltage on pin MODE Vsc short-circuit voltage on output pins IORM repetitive peak current in output pin Tstg with respect to SGND note 1 Notes 1. See Section 16.6. 10 THERMAL CHARACTERISTICS SYMBOL Rth(j-a) Rth(j-c) PARAMETER CONDITIONS VALUE UNIT TDA8922TH 35 K/W TDA8922J 35 K/W TDA8922TH 1.3 K/W TDA8922J 1.3 K/W thermal resistance from junction to ambient in free air; note 1 thermal resistance from junction to case note 1 Note 1. See Section 16.5. 11 QUALITY SPECIFICATION In accordance with “General Quality Specification for Integrated Circuits: SNW-FQ-611D” if this device is used as an audio amplifier. 2003 Mar 20 11 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 12 STATIC CHARACTERISTICS VP = ±25 V; Tamb = 25 °C; measured in Fig.10; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VP supply voltage note 1 ±12.5 ±20 ±30 Iq(tot) total quiescent supply current no load connected − 55 75 mA Istb standby supply current − 100 500 µA V Mode select input; pin MODE VMODE input voltage note 2 0 − 5.5 V IMODE input current VMODE = 5.5 V − − 1000 µA Vstb input voltage for standby mode notes 2 and 3 0 − 0.8 V Vmute input voltage for mute mode notes 2 and 3 2.2 − 3.0 V Von input voltage for operating mode notes 2 and 3 4.2 − 5.5 V note 2 − 0 − V Audio inputs; pins IN1−, IN1+, IN2+ and IN2− VI DC input voltage Amplifier outputs; pins OUT1 and OUT2 VOO(SE) output offset voltage SE; operating and mute − − 150 mV ∆VOO(SE) variation of output offset voltage SE; operating ↔ mute − − 80 mV VOO(BTL) output offset voltage BTL; operating and mute − − 215 mV ∆VOO(BTL) variation of output offset voltage BTL; operating ↔ mute − − 115 mV mute and operating; note 4 11 13 15 V Stabilizer output; pin STABI Vo(stab) stabilizer output voltage Temperature protection Tprot temperature protection activation 150 − − °C Thys hysteresis on temperature protection − 20 − °C Notes 1. The circuit is DC adjusted at VP = ±12.5 to ±30 V. 2. With respect to SGND (0 V). 3. The transition regions between standby, mute and operating mode contain hysteresis (see Fig.7). 4. With respect to VSSP1. 2003 Mar 20 12 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 MBL467 handbook, full pagewidth STBY 0 MUTE 0.8 2.2 ON 3.0 4.2 5.5 VMODE (V) Fig.7 Behaviour of mode selection pin MODE. 13 SWITCHING CHARACTERISTICS VDD = ±25 V; Tamb = 25 °C; measured in Fig.10; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Internal oscillator fosc typical internal oscillator frequency ROSC = 30.0 kΩ 290 317 344 kHz fosc(int) internal oscillator frequency range note 1 210 − 600 kHz External oscillator or frequency tracking VOSC voltage on pin OSC SGND + 4.5 SGND + 5 SGND + 6 V VOSC(trip) trip level for tracking on pin OSC − SGND + 2.5 − V ftrack frequency range for tracking 210 − 600 kHz VP(OSC)(ext) minimum symmetrical supply voltage for external oscillator application 15 − − V Note 1. Frequency set with ROSC according to the formula in Section 8.2. 2003 Mar 20 13 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 14 DYNAMIC AC CHARACTERISTICS (STEREO AND DUAL SE APPLICATION) VP = ±20 V; RL = 8 Ω; fi = 1 kHz; fosc = 310 kHz; RsL < 0.1 Ω (note 1); Tamb = 25 °C; measured in Fig.10; unless otherwise specified. SYMBOL Po PARAMETER output power CONDITIONS MIN. TYP. MAX. UNIT RL = 8 Ω; VP = ±20 V; note 2 THD = 0.5% 18 20 − W THD = 10% 22 25 − W THD = 0.5% 29 33 − W THD = 10% 36 40 − W THD = 0.5% 18 20 − W THD = 10% 22 25 − W fi = 1 kHz − 0.02 0.05 % fi = 10 kHz − 0.15 − % 29 30 31 dB 85 90 − % fi = 100 Hz − 55 − dB fi = 1 kHz RL = 8 Ω; VP = ±25 V; note 2 RL = 4 Ω; VP = ±15 V; note 2 THD total harmonic distortion Po = 1 W; note 3 Gv(cl) closed loop voltage gain η efficiency Po = 25 W; fi = 1 kHz; note 4 SVRR supply voltage ripple rejection operating; note 5 Zi input impedance Vn(o) noise output voltage αcs channel separation 40 50 − dB mute; fi = 100 Hz; note 5 − 55 − dB standby; fi = 100 Hz; note 5 − 80 − dB 45 68 − kΩ Rs = 0 Ω; note 6 − 200 400 µV Rs = 10 kΩ; note 7 operating − 230 − µV mute; note 8 − 220 − µV note 9 − 70 − dB ∆Gv channel unbalance − − 1 dB Vo(mute) output signal in mute note 10 − − 400 µV CMRR common mode rejection ratio Vi(CM) = 1 V (RMS) − 75 − dB Notes 1. RsL is the series resistance of inductor of low-pass LC filter in the application. 2. Output power is measured indirectly; based on RDSon measurement. 3. Total harmonic distortion is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using a lower order low-pass filter a significantly higher value is found, due to the switching frequency outside the audio band. Maximum limit is guaranteed but may not be 100% tested. 4. Output power measured across the loudspeaker load. 5. Vripple = Vripple(max) = 2 V (p-p); Rs = 0 Ω. 6. B = 22 Hz to 22 kHz; Rs = 0 Ω; maximum limit is guaranteed, but may not be 100% tested. 7. B = 22 Hz to 22 kHz; Rs = 10 kΩ. 2003 Mar 20 14 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 8. B = 22 Hz to 22 kHz; independent of Rs. 9. Po = 1 W; Rs = 0 Ω; fi = 1 kHz. 10. Vi = Vi(max) = 1 V (RMS); maximum limit is guaranteed, but may not be 100% tested. 15 DYNAMIC AC CHARACTERISTICS (MONO BTL APPLICATION) VP = ±15 V; RL = 8 Ω; fi = 1 kHz; fosc = 310 kHz; RsL < 0.1 Ω (note 1); Tamb = 25 °C; measured in Fig.10; unless otherwise specified. SYMBOL Po THD PARAMETER output power total harmonic distortion CONDITIONS 40 − W THD = 10% 46 50 − W fi = 1 kHz − 0.015 0.05 % fi = 10 kHz − 0.02 − % Po = 1 W; note 3 efficiency Po = 50 W; fi = 1 kHz; note 4 SVRR supply voltage ripple rejection operating; note 5 input impedance UNIT 37 closed loop voltage gain noise output voltage MAX. THD = 0.5% η Vn(o) TYP. RL = 8 Ω; VP = ±15 V; note 2 Gv(cl) Zi MIN. 35 36 37 dB 85 90 − % fi = 100 Hz − 49 − dB fi = 1 kHz 36 44 − dB mute; fi = 100 Hz; note 5 − 49 − dB standby; fi = 100 Hz; note 5 − 80 − dB 22 34 − kΩ Rs = 0 Ω; note 6 − 280 560 µV Rs = 10 kΩ; note 7 operating − 300 − µV mute; note 8 − 280 − µV Vo(mute) output signal in mute note 9 − − 500 µV CMRR common mode rejection ratio Vi(CM) = 1 V (RMS) − 75 − dB Notes 1. RsL is the series resistance of inductor of low-pass LC filter in the application. 2. Output power is measured indirectly; based on RDSon measurement. 3. Total harmonic distortion is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using a low order low-pass filter a significant higher value will be found, due to the switching frequency outside the audio band. Maximum limit is guaranteed but may not be 100% tested. 4. Output power measured across the loudspeaker load. 5. Vripple = Vripple(max) = 2 V (p-p); Rs = 0 Ω. 6. B = 22 Hz to 22 kHz; Rs = 0 Ω; maximum limit is guaranteed, but may not be 100% tested. 7. B = 22 Hz to 22 kHz; Rs = 10 kΩ. 8. B = 22 Hz to 22 kHz; independent of Rs. 9. Vi = Vi(max) = 1 V (RMS); fi = 1 kHz; maximum limit is guaranteed, but may not be 100% tested. 2003 Mar 20 15 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 16 APPLICATION INFORMATION 16.1 BTL application BTL: P o(1%) When using the power amplifier in a mono BTL application (for more output power), the inputs of both channels must be connected in parallel and the phase of one of the inputs must be inverted (see Fig.6). In principle the loudspeaker can be connected between the outputs of the two single-ended demodulation filters. 2 RL --------------------- × 2V P × ( 1 – t min × f osc ) R L + 1.2 = --------------------------------------------------------------------------------------------2 × RL Maximum current: 2V P × ( 1 – t min × f osc ) I o(peak) = -------------------------------------------------------- should not exceed 4 A. R L + 1.2 Legend: 16.2 Pin MODE RL = load impedance For correct operation the switching voltage at pin MODE should be debounced. If pin MODE is driven by a mechanical switch an appropriate debouncing low-pass filter should be used. If pin MODE is driven by an electronic circuit or microcontroller then it should remain at the mute voltage level for at least 100 ms before switching back to the standby voltage level. 16.3 fosc = oscillator frequency tmin = minimum pulse width (typical 190 ns) VP = single-sided supply voltage (so, if supply is ±30 V symmetrical, then VP = 30 V) Po(1%) = output power just at clipping Po(10%) = output power at THD = 10% Po(10%) = 1.25 × Po(1%). Output power estimation The output power in several applications (SE and BTL) can be estimated using the following expressions: SE: P o(1%) 16.4 External clock The minimum required symmetrical supply voltage for external clock application is ±15 V (equally, the minimum asymmetrical supply voltage for applications with an external clock is 30 V). 2 RL --------------------- × V P × ( 1 – t min × f osc ) R L + 0.6 = ----------------------------------------------------------------------------------------2 × RL When using an external clock the following accuracy of the duty cycle of the external clock has to be taken into account: 47.5% < δ < 52.5%. Maximum current: V P × ( 1 – t min × f osc ) I o(peak) = ---------------------------------------------------- should not exceed 4 A. R L + 0.6 A possible solution for an external clock oscillator circuit is illustrated in Fig.8. VDDA handbook, full pagewidth 2 kΩ 0− 0+ 11 10 CTC ASTAB− 4 −TRIGGER ASTAB+ 5 6 1 14 120 pF RTC HEF4047BT 2 9.1 kΩ 7 RCTC 3 360 kHz 320 kHz VDD VSS HOP 220 nF 5.6 V 4.3 V 13 8 +TRIGGER 9 12 MR RETRIGGER GND CLOCK MBL468 Fig.8 External oscillator circuit. 2003 Mar 20 16 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier 16.5 TDA8922 Heatsink requirements In some applications it may be necessary to connect an external heatsink to the TDA8922. The determining factor is the 150 °C maximum junction temperature Tj(max) which cannot be exceeded. The expression below shows the relationship between the maximum allowable power dissipation and the total thermal resistance from junction to ambient: MBL469 30 handbook, halfpage Pdiss (W) (1) 20 T j(max) – T amb R th(j-a) = ---------------------------------P diss (2) 10 (3) Pdiss is determined by the efficiency (η) of the TDA8922. The efficiency measured in the TDA8922 as a function of output power is given in Fig.19. The power dissipation can be derived as function of output power (see Fig.18). (4) (5) 0 0 The derating curves (given for several values of the Rth(j-a)) are illustrated in Fig.9. A maximum junction temperature Tj = 150 °C is taken into account. From Fig.9 the maximum allowable power dissipation for a given heatsink size can be derived or the required heatsink size can be determined at a required dissipation level. (1) (2) (3) (4) (5) Example 1: Po = 2 × 25 W into 8 Ω 40 60 100 80 Tamb (°C) Rth(j-a) = 5 K/W. Rth(j-a) = 10 K/W. Rth(j-a) = 15 K/W. Rth(j-a) = 20 K/W. Rth(j-a) = 35 K/W. Fig.9 Tj(max) = 150 °C 20 Derating curves for power dissipation as a function of maximum ambient temperature. Tamb = 60 °C Pdiss(tot) = 4.2 W (from Fig.18) The required Rth(j-a) = 21.4 K/W can be calculated. 16.6 The Rth(j-a) of the TDA8922 in free air is 35 K/W; the Rth(j-c) of the TDA8922 is 1.3 K/W, thus a heatsink of 20.1 K/W is required for this example. To guarantee the robustness of the class-D amplifier the maximum output current which can be delivered by the output stage is limited. An overcurrent protection is included for each output power switch. When the current flowing through any of the power switches exceeds a defined internal threshold (e.g. in case of a short-circuit to the supply lines or a short-circuit across the load), the amplifier will shut down immediately and an internal timer will be started. After a fixed time (e.g. 100 ms) the amplifier is switched on again. If the requested output current is still too high the amplifier will switch-off again. Thus the amplifier will try to switch to the operating mode every 100 ms. The average dissipation will be low in this situation because of this low duty cycle. If the overcurrent condition is removed the amplifier will remain operating. In actual applications, other factors such as the average power dissipation with music source (as opposed to a continuous sine wave) will determine the size of the heatsink required. Example 2: Po = 2 × 25 W into 4 Ω Tj(max) = 150 °C Tamb = 60 °C Pdiss(tot) = 5.5 W (from Fig.18) The required Rth(j-a) = 16.4 K/W. Because the duty cycle is low the amplifier will be switched off for a relatively long period of time which will be noticed as a so-called audio-hole; an audible interruption in the output signal. The Rth(j-a) of the TDA8922 in free air is 35 K/W; the Rth(j-c) of the TDA8922 is 1.3 K/W, thus a heatsink of 15.1 K/W is required for this example. 2003 Mar 20 Output current limiting 17 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 16.7 To trigger the maximum current protection in the TDA8922, the required output current must exceed 4 A. This situation occurs in case of: The TDA8922 class-D amplifier is supplied by a symmetrical voltage (e.g VDD = +25 V and VSS = −25 V). When the amplifier is used in a SE configuration, a so-called ‘pumping effect’ can occur. During one switching interval, energy is taken from one supply (e.g. VDD), while a part of that energy is delivered back to the other supply line (e.g. VSS) and visa versa. When the voltage supply source cannot sink energy, the voltage across the output capacitors of that voltage supply source will increase: the supply voltage is pumped to higher levels. The voltage increase caused by the pumping effect depends on: • Short-circuits from any output terminal to the supply lines (VDD or VSS) • Short-circuit across the load or speaker impedances or a load impedance below the specified values of 4 and 8 Ω. Even if load impedances are connected to the amplifier outputs which have an impedance rating of 4 Ω, this impedance can be lower due to the frequency characteristic of the loudspeaker; practical loudspeaker impedances can be modelled as an RLC network which will have a specific frequency characteristic: the impedance at the output of the amplifier will vary with the input frequency. A high supply voltage in combination with a low impedance will result in large current requirements. • Speaker impedance • Supply voltage • Audio signal frequency • Capacitor value present on supply lines • Source and sink currents of other channels. Another factor which must be taken into account is the ripple current which will also flow through the output power switches. This ripple current depends on the inductor values which are used, supply voltage, oscillator frequency, duty factor and minimum pulse width. The maximum available output current to drive the load impedance can be calculated by subtracting the ripple current from the maximum repetitive peak current in the output pin, which is 4 A for the TDA8922. The pumping effect should not cause a malfunction of either the audio amplifier and/or the voltage supply source. For instance, this malfunction can be caused by triggering of the undervoltage or overvoltage protection or unbalance protection of the amplifier. See the application notes (tbf) for a more detailed description of the implications of output current limiting. 16.8 As a rule of thumb the following expressions can be used to determine the minimum allowed load impedance without generating audio holes: Reference design The reference design for a single-chip class-D audio amplifier using the TDA8922TH is illustrated in Fig.10. The Printed-Circuit Board (PCB) layout is shown in Fig.11. The Bill Of Materials (BOM) is given in Table 1. V P × ( 1 – t min × f osc ) Z L ≥ ---------------------------------------------------- – 0.6 for SE application. I ORM – I ripple 16.9 2V P × ( 1 – t min × f osc ) Z L ≥ -------------------------------------------------------- – 1.2 for BTL application. I ORM – I ripple PCB information for HSOP24 package The size of the PCB is 74.3 × 59.10 mm, dual sided 35 µm copper with 121 metallized through holes. Where: The standard configuration has a symmetrical supply (typical ±20 V) with stereo SE outputs (typical 2 × 8 Ω). The PCB is also suitable for a mono BTL configuration (1 × 8 Ω) with symmetrical and asymmetrical supply. ZL = load impedance fosc = oscillator frequency tmin = minimum pulse width (typical 190 ns) It is possible to use several different output filter inductors such as 16RHBP or EP13 types to evaluate the performance against the price or size. VP = single-sided supply voltage (so, if the supply is ±30 V symmetrical, then VP = 30 V) IORM = maximum repetitive peak current in output pin; see also Chapter 9 16.10 Classification Iripple = ripple current. The application shows optimized signal and EMI performance. See the application notes (tbf) for a more detailed description of the implications of output current limiting. 2003 Mar 20 Pumping effects 18 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... C6 100 nF R1(3) 10 kΩ C7 100 nF R2(3) 9.1 kΩ VDDP C1 470 µF C3 47 µF GND VSS −25 V L2 BEAD C2 470 µF L3 BEAD VDDA mute C8 220 nF C5 47 µF C20 330 pF R7 5.6 kΩ 19 C17 470 nF IN1− SGND C18 470 nF in 2 VSSA1 C13 100 nF OSC 12 MODE 7 6 VSSP C14 220 nF C15 100 nF VDDP1 14 VSSP1 C24 560 pF 17 BOOT1 C22 15 nF 9 16 R10 4.7 Ω C26 470 nF C28 220 nF SGND OUT1− R12 22 Ω OUT1 C30 15 nF L5 27 µH 11 21 IN2+ C21 330 pF OUT2 C23 15 nF 5 22 BOOT2 IN2− 1 3 VSSA2 24 VDDA2 18 VSSD C32 220 nF C34 C35 C36 100 nF 220 nF 100 nF VSSA VDDA OUT1+ PROT 19 23 HW VDDP2 20 L6 27 µH BTL 8 Ω R11 4.7 Ω C27 470 nF C25 560 pF OUT2− R13 22 Ω C29 220 nF C31 15 nF SE 4 Ω OUT2+ SGND VSSP2 MGU997 C33 47 pF C37 C38 C39 100 nF 220 nF 100 nF VDDP VSSP VSSP BTL: remove In2, R8, R9, C18, C19, C21 and close J3 and J4. BTL: connect loudspeaker between OUT1+ and OUT2−. BTL: R1 and R2 are only required when an asymmetrical supply is used (VSS = 0 V). In case of hum, close J1 and J2. Fig.10 Single-chip class-D audio amplifier application diagram (reference design for SE and BTL). Objective specification (1) (2) (3) (4) TDA8922 Every decoupling to ground (plane) must be made as close as possible to the pin. To handle 20 Hz under all conditions in stereo SE mode, the external power supply needs to have a capacitance of at least 4700 µF per supply line; VP = ±27 V (max). 13 STABI SE 4 Ω (2) 2 4 R9 C19 5.6 kΩ 470 nF VDDP R5 30 kΩ TDA8922TH (4) R8 5.6 kΩ 10 8 C9 220 nF J4(1) SGND2 J2 C12 100 nF 15 SGND1 J1 J3 VSSA C11 220 nF VDDA1 in 1 Z1 5.6 V off VSSA VSSA VDDA IN1+ on S1 C10 100 nF R6 C16 5.6 kΩ 470 nF R3 39 kΩ R4 39 kΩ C4 47 µF L4 BEAD VDDA VSSP Philips Semiconductors L1 BEAD +25 V 2 × 25 W class-D power amplifier agewidth 2003 Mar 20 VDD Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier handbook, full pagewidth PCB version 4 1-2002 C1 C35 C38 L6 C3 C21 U1 C8 C20 C2 C14 L5 C11 C33 C5 C27 C26 L3 TDA8922 L1 L2 J4 C4 C17 C16 C18 L4 J3 Z1 C19 On − Out2 + − Out1+ S1 VDD GND VSS TDA8920/21/22/23/24TH state of D art In1 In2 Off Top silk screen C34 C25 R11 C37 C9 C36 C39 C32 C10 C15 R5 C13 C12 Top copper C23 C22 C24 R10 R3 R8 R4 R9 J2 R7 R6 J1 C7 C30 C6 R2 R1 PHILIPS SEMICONDUCTORS R12 C28 C31 R13 C29 Bottom silk screen Bottom copper Fig.11 Printed-circuit board layout for the TDA8922TH. 2003 Mar 20 20 MBL496 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 16.11 Bill of materials for reference design Table 1 Single-chip class-D audio amplifier printed-circuit board (PCB version 4; 1-2002) for TDA8922TH (see Figs 10 and 11). BOM ITEM QUANTITY REFERENCE PART DESCRIPTION 1 1 U1 TDA8922TH Philips Semiconductors B.V. 2 2 in1 and in2 cinch inputs Farnell 152-396 3 2 out1 and out2 output connector Augat 5KEV-02 4 1 VDD, GND and VSS supply connector Augat 5KEV-03 5 2 L6 and L5 27 µH EP13 or 16RHBP 6 4 L1, L2, L3 and L4 BEAD Murata BL01RN1-A62 7 1 S1 PCB switch Knitter ATE1E M-O-M 8 1 Z1 5V6 BZX 79C5V6 DO-35 9 2 C1 and C2 470 µF; 35 V Panasonic M series ECA1VM471 10 3 C3, C4 and C5 47 µF; 63 V Panasonic NHG series ECA1JHG470 11 6 C16, C17, C18, C19, C26 and 470 nF; 63 V C27 MKT EPCOS B32529-C474-K 12 9 C8, C9, C11, C14, C28, C29, C32, C35 and C38 220 nF; 63 V SMD 1206 13 10 C6, C7, C10, C12, C13, C15, C34, C36, C37 and C39 100 nF; 50 V SMD 0805 14 2 C20 and C21 330 pF; 50 V SMD 0805 15 4 C22, C23, C30 and C31 15 nF; 50 V SMD 0805 16 2 C24, C25 560 pF; 100 V SMD 0805 17 1 C33 47 pF; 25V SMD 0805 18 2 R4 and R3 39 kΩ; 0.1 W SMD 0805 19 1 R5 30 kΩ; 0.1 W SMD 1206 20 1 R1 10 kΩ; 0.1 W; optional SMD 0805 21 1 R2 9.1 kΩ; 0.1 W; optional SMD 0805 22 4 R6, R7, R8 and R9 5.6 kΩ; 0.1 W SMD 0805 23 2 R13 and R12 22 Ω; 1 W SMD 2512 24 2 R10 and R11 4.7 Ω; 0.25 W SMD 1206 25 2 J1 and J2 solder dot jumpers for ground reference in case of hum (60 Hz noise) 26 2 J3 and J4 wire jumpers for BTL application 27 1 heatsink 30 mm SK400; OK for maximum music dissipation; 1/8 Prated (2 × 75 W/8) in 2 × 4 Ω at Tamb = 70 °C 28 1 printed-circuit board material 1.6 mm thick epoxy FR4 material, double sided 35 µm copper; clearances 300 µm; minimum copper track 400 µm 2003 Mar 20 21 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 16.12 Curves measured in reference design The curves illustrated in Figs 30 and 31 show the effects of supply pumping when only one single-ended channel is driven with a low frequency signal; see Section 16.7. The curves illustrated in Figs 20 and 21 are measured with a specified load impedance. Spread in ZL (e.g. due to the frequency characteristics of the loudspeaker) can trigger the maximum current protection circuit; see Section 16.6. MGX324 102 handbook, halfpage MGX327 102 handbook, halfpage THD + N (%) 10 THD + N (%) 10 1 1 (1) 10 −1 10 −1 (1) (2) 10 −2 (2) 10 −2 (3) 10 −3 10 −2 10 −1 1 10 Po (W) 10 −3 10 102 2 × 8 Ω SE; VP = ±20 V. (1) 10 kHz. (2) 1 kHz. (3) 100 Hz. 103 104 f i (Hz) 105 2 × 8 Ω SE; VP = ±20 V. (1) Po = 10 W. (2) Po = 1 W. Fig.12 THD + N as a function of output power. 2003 Mar 20 102 Fig.13 THD + N as a function of input frequency. 22 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 MGX325 102 handbook, halfpage MGX328 102 handbook, halfpage THD + N (%) 10 THD + N (%) 10 1 1 (1) 10 −1 10 −1 (1) 10 −2 (2) (2) 10 −2 10 −3 10 −2 (3) 10 −1 1 10 Po (W) 10 −3 10 102 2 × 4 Ω SE; VP = ±15 V. (1) 10 kHz. (2) 1 kHz. (3) 100 Hz. 102 103 104 f i (Hz) 105 2 × 4 Ω SE; VP = ±15 V. (1) Po = 10 W. (2) Po = 1 W. Fig.14 THD + N as a function of output power. Fig.15 THD + N as a function of input frequency. MGX326 102 handbook, halfpage MGX329 102 handbook, halfpage THD + N (%) 10 THD + N (%) 10 1 1 10 −1 10 −1 (1) (1) (2) (2) 10 −2 10 −2 (3) 10 −3 10 −2 10 −1 1 10 Po (W) 10 −3 10 102 1 × 8 Ω BTL; VP = ±15 V. (1) 10 kHz. 103 104 f i (Hz) 105 1 × 8 Ω BTL; VP = ±15 V. (1) Po = 10 W. (2) Po = 1 W. (2) 1 kHz. (3) 100 Hz. Fig.16 THD + N as a function of output power. 2003 Mar 20 102 Fig.17 THD + N as a function of input frequency. 23 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 MGX332 10 MGX333 100 handbook, halfpage handbook, halfpage η Pdiss (1) (2) (3) (%) (W) 8 80 6 60 (1) (2) 4 40 (3) 2 0 10 −2 20 10 −1 1 10 Po (W) 0 102 0 fi = 1 kHz. (1) 2 × 4 Ω SE, VP = ±15 V. (2) 2 × 8 Ω SE, VP = ±20 V. (3) 1 × 8 Ω BTL, VP = ±15 V. 20 40 60 80 100 Po (W) fi = 1 kHz. (1) 2 × 8 Ω SE, VP = ±20 V. (2) 2 × 4 Ω SE, VP = ±15 V. (3) 1 × 8 Ω BTL, VP = ±15 V. Fig.18 Power dissipation as a function of output power. Fig.19 Efficiency as a function of output power. MGX336 100 MGX337 100 handbook, halfpage handbook, halfpage Po (W) 80 Po (W) 80 (1) (1) 60 60 (3) (2) (3) 40 40 (2) 20 0 10 20 15 20 25 0 10 30 35 VDD (V) 15 20 25 30 35 VDD (V) THD + N = 0.5%; fi = 1 kHz. (1) 1 × 8 Ω BTL. (2) 2 × 4 Ω SE. (3) 2 × 8 Ω SE. THD + N = 10%; fi = 1 kHz. (1) 1 × 8 Ω BTL. (2) 2 × 4 Ω SE. (3) 2 × 8 Ω SE. Fig.20 Output power as a function of supply voltage. Fig.21 Output power as a function of supply voltage. 2003 Mar 20 24 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 MGX330 0 handbook, halfpage αcs MGX331 0 handbook, halfpage αcs (dB) (dB) −20 −20 −40 −40 −60 −60 (1) −80 (1) −80 (2) (2) −100 10 102 103 104 f i (Hz) −100 10 105 102 103 104 f i (Hz) 105 2 × 8 Ω SE; VP = ±20 V. (1) Po = 1 W. (2) Po = 10 W. 2 × 4 Ω SE; VP = ±15 V. (1) Po = 1 W. (2) Po = 10 W. Fig.22 Channel separation as a function of input frequency. Fig.23 Channel separation as a function of input frequency. MGX340 40 MGX341 40 handbook, halfpage handbook, halfpage G (dB) G (dB) 35 (1) 35 (1) (2) 30 30 (2) (3) (3) 25 20 10 25 102 103 104 f i (Hz) 20 10 105 Vi = 100 mV; Rs = 5.6 kΩ; Ci = 330 pF. (1) 1 × 8 Ω BTL, VP = ±15 V. (2) 2 × 8 Ω SE, VP = ±20 V. (3) 2 × 4 Ω SE, VP = ±15 V. 103 104 f i (Hz) 105 Vi = 100 mV; Rs = 0 kΩ. (1) 1 × 8 Ω BTL, VP = ±15 V. (2) 2 × 8 Ω SE, VP = ±20 V. (3) 2 × 4 Ω SE, VP = ±15 V. Fig.24 Gain as a function of input frequency. 2003 Mar 20 102 Fig.25 Gain as a function of input frequency. 25 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 MGX338 100 MGX339 320 handbook, halfpage handbook, halfpage Iq (mA) fclk (kHz) 80 310 60 40 300 20 290 0 0 5 10 15 20 25 30 0 35 5 10 15 20 VDD (V) 25 30 35 VDD (V) RL = ∞. RL = ∞. Fig.26 Quiescent current as a function of supply voltage. Fig.27 Clock frequency as a function of supply voltage. MGX346 0 MGX347 0 handbook, halfpage handbook, halfpage SVRR (dB) SVRR) (dB) −20 −20 (1) −40 (1) −40 (2) (3) −60 (2) −60 (3) −80 −100 10 −80 102 103 104 f i (Hz) −100 105 VP = ±20 V; Vripple = 2 V (p-p) with respect to ground. (1) Both supply lines in phase. 1 2 3 4 5 Vripple(p-p) (V) VP = ±20 V; Vripple with respect to ground (in phase). (1) fripple = 1 kHz. (2) fripple = 100 Hz. (3) fripple = 10 Hz. (2) Both supply lines in anti-phase. (3) One supply line rippled. Fig.28 SVRR as a function of input frequency. 2003 Mar 20 0 Fig.29 SVRR as a function of Vripple(p-p). 26 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 MGX334 10 MGX335 10 handbook, halfpage handbook, halfpage Vripple(p-p) Vripple(p-p) (V) (V) 8 8 6 6 (1) 4 4 (1) (2) 2 2 (2) 0 10 −2 10 −1 1 10 Po (W) 0 10 102 3000 µF per supply line; fi = 10 Hz. (1) 1 × 4 Ω SE, VP = ±15 V. (2) 1 × 8 Ω SE, VP = ±20 V. 102 103 f i (Hz) 104 3000 µF per supply line. (1) Po = 10 W into 1 × 4 Ω SE, VP = ±15 V. (2) Po = 10 W into 1 × 8 Ω SE, VP = ±20 V. Fig.30 Supply voltage ripple as a function of output power. Fig.31 Supply voltage ripple as a function of input frequency. MGX342 10 MGX344 150 handbook, halfpage handbook, halfpage Iq (mA) THD + N (%) 120 1 (1) 90 10 −1 (2) 10 −2 60 (3) 30 10 −3 100 200 300 400 500 fclk (kHz) 0 100 600 VP = ±20 V; Po = 1 W into 8 Ω. (1) 10 kHz. 300 400 500 fclk (kHz) 600 VP = ±20 V; RL = ∞. (2) 1 kHz. (3) 100 Hz. Fig.33 Quiescent current as a function of clock frequency. Fig.32 THD + N as a function of clock frequency. 2003 Mar 20 200 27 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 MGX345 1000 handbook, halfpage Vres(rms) (mV) 800 Po (W) 40 600 30 400 20 200 10 0 100 MGX343 50 handbook, halfpage 200 300 400 500 fclk (kHz) 0 100 600 200 300 400 500 fclk (kHz) VP = ±20 V; RL = 8 Ω. VP = ±20 V; RL = 8 Ω; fi = 1 kHz; THD + N = 10%. Fig.34 PWM residual voltage as a function of clock frequency. Fig.35 Output power as a function of clock frequency. MGX348 10 MGX349 120 S/N (dB) 100 handbook, halfpage 600 handbook, halfpage Vo (V) 1 10 −1 (1) 80 (2) 10 −2 60 10 −3 40 10 −4 20 10 −5 10 −6 0 1 2 3 4 0 10 −2 5 6 VMODE (V) 10 −1 1 10 102 103 Po (W) Vi = 100 mV; fi = 1 kHz. VP = ±20 V; Rs = 5.6 kΩ.; filter: 20 kHz AES17 (1) 2 × 8 Ω SE. (2) 1 × 8 Ω BTL. Fig.36 Output voltage as a function of mode selection voltage. Fig.36 Signal-to-noise ratio as a function of output power. 2003 Mar 20 28 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... VDDA1 3 10 +25 V STABI PROT 18 13 VDDP2 VDDP1 23 14 15 BOOT1 RFB IN1− 9 Vin1 RELEASE1 INPUT STAGE IN1+ 8 SGND1 11 SGND PWM MODULATOR SWITCH1 CONTROL AND ENABLE1 HANDSHAKE mute COSC DRIVER HIGH 16 OUT1 DRIVER LOW STABI Philips Semiconductors VDDA2 2 × 25 W class-D power amplifier VDDA 16.13 Application schematics handbook, full pagewidth 2003 Mar 20 VDDP VDDA VSSP1 OSC 7 29 VSSA ROSC Vmode OSCILLATOR MODE 6 TEMPERATURE SENSOR CURRENT PROTECTION IN2− 4 VDDP2 22 BOOT2 ENABLE2 mute CONTROL SWITCH2 AND HANDSHAKE RELEASE2 IN2+ 5 Vin2 TDA8922TH MODE SGND2 2 SGND MANAGER INPUT STAGE PWM MODULATOR RFB 1 12 VSSA2 VSSA1 24 19 VSSD HW SGND 0V DRIVER HIGH 21 OUT2 DRIVER LOW 17 VSSP1 20 VSSP2 −25 V VSSA MGU998 TDA8922 Fig.37 Typical SE application schematic of TDA8922TH. VSSP Objective specification VSSA VSSA This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... VDDA2 VDDA1 20 4 +25 V STABI PROT 12 7 VDDP2 VDDP1 16 8 9 BOOT1 RFB IN1− 3 Vin1 RELEASE1 INPUT STAGE IN1+ 2 SGND1 5 SGND PWM MODULATOR SWITCH1 CONTROL AND ENABLE1 HANDSHAKE mute COSC DRIVER HIGH 10 OUT1 DRIVER LOW STABI Philips Semiconductors VDDA 2 × 25 W class-D power amplifier handbook, full pagewidth 2003 Mar 20 VDDP VDDA VSSP1 OSC 1 30 VSSA ROSC Vmode OSCILLATOR MODE 23 IN2− 21 TDA8922J VDDP2 15 BOOT2 ENABLE2 IN2+ 22 Vin2 TEMPERATURE SENSOR CURRENT PROTECTION MODE mute SGND2 19 SGND MANAGER INPUT STAGE PWM MODULATOR RFB 18 6 VSSA2 VSSA1 CONTROL SWITCH2 AND HANDSHAKE RELEASE2 SGND 0V DRIVER HIGH 14 OUT2 DRIVER LOW 17 VSSD 11 VSSP1 13 VSSP2 −25 V VSSA MGU999 TDA8922 Fig.38 Typical SE application schematic of TDA8922J. VSSP Objective specification VSSA VSSA Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 17 PACKAGE OUTLINES HSOP24: plastic, heatsink small outline package; 24 leads; low stand-off height SOT566-3 E D A x X c E2 y HE v M A D1 D2 12 1 pin 1 index Q A A2 E1 (A3) A4 θ Lp detail X 24 13 Z w M bp e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A A2 max. 3.5 3.5 3.2 A3 0.35 A4(1) D1 D2 E(2) E1 E2 e HE Lp Q +0.08 0.53 0.32 16.0 13.0 −0.04 0.40 0.23 15.8 12.6 1.1 0.9 11.1 10.9 6.2 5.8 2.9 2.5 1 14.5 13.9 1.1 0.8 1.7 1.5 bp c D(2) v w x y 0.25 0.25 0.03 0.07 Z θ 2.7 2.2 8° 0° Notes 1. Limits per individual lead. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEITA ISSUE DATE 02-01-30 03-02-18 SOT566-3 2003 Mar 20 EUROPEAN PROJECTION 31 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 DBS23P: plastic DIL-bent-SIL power package; 23 leads (straight lead length 3.2 mm) SOT411-1 non-concave Dh x D Eh view B: mounting base side A2 d A5 A4 β E2 B j E E1 L2 L3 L1 L 1 e1 Z e 0 5 v M e2 m w M bp c Q 23 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A 2 mm A4 A5 bp c D (1) d D h E (1) e e1 e2 12.2 4.6 1.15 1.65 0.75 0.55 30.4 28.0 12 2.54 1.27 5.08 11.8 4.3 0.85 1.35 0.60 0.35 29.9 27.5 Eh E1 E2 j L 6 10.15 6.2 1.85 3.6 9.85 5.8 1.65 2.8 L1 L2 L3 m Q v w x β Z (1) 14 10.7 2.4 1.43 2.1 4.3 0.6 0.25 0.03 45° 13 9.9 1.6 0.78 1.8 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEITA ISSUE DATE 98-02-20 02-04-24 SOT411-1 2003 Mar 20 EUROPEAN PROJECTION 32 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 18 SOLDERING 18.3.2 18.1 Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. Introduction This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). To overcome these problems the double-wave soldering method was specifically developed. There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. 18.2 18.2.1 WAVE SOLDERING If wave soldering is used the following conditions must be observed for optimal results: • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; Through-hole mount packages SOLDERING BY DIPPING OR BY SOLDER WAVE The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. 18.2.2 The footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. MANUAL SOLDERING Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. 18.3 18.3.1 Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 18.3.3 Surface mount packages Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. REFLOW SOLDERING Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferably be kept: • below 220 °C for all the BGA packages and packages with a thickness 2.5mm and packages with a thickness <2.5 mm and a volume ≥350 mm3 so called thick/large packages • below 235 °C for packages with a thickness <2.5 mm and a volume <350 mm3 so called small/thin packages. 2003 Mar 20 MANUAL SOLDERING 33 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier 18.4 TDA8922 Suitability of IC packages for wave, reflow and dipping soldering methods MOUNTING SOLDERING METHOD PACKAGE(1) WAVE suitable(3) Through-hole mount DBS, DIP, HDIP, SDIP, SIL Surface mount REFLOW(2) DIPPING − suitable suitable − DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS not suitable(4) suitable − PLCC(5), SO, SOJ suitable suitable − suitable − suitable − BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable recommended(5)(6) LQFP, QFP, TQFP not SSOP, TSSOP, VSO, VSSOP not recommended(7) Notes 1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy from your Philips Semiconductors sales office. 2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 3. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. 4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 5. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 6. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2003 Mar 20 34 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 19 DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 20 DEFINITIONS 21 DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2003 Mar 20 35 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: [email protected]. SCA75 © Koninklijke Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 753503/01/pp36 Date of release: 2003 Mar 20 Document order number: 9397 750 10757