PHILIPS TDA3755

INTEGRATED CIRCUITS
DATA SHEET
TDA3755
PAL/NTSC/SECAM
synchronization processor for video
recorders
Product specification
File under Integrated Circuits, IC02
June 1986
Philips Semiconductors
Product specification
PAL/NTSC/SECAM synchronization
processor for video recorders
TDA3755
• Horizontal phase detector with current output
GENERAL DESCRIPTION
• Video identification and mute circuit
The TDA3755 is a monolithic integrated circuit for
PAL/NTSC SECAM synchronization processing in VHS
video recorders.
• Burst gating pulse output (externally adjustable phase
relationship)
• Test-picture output
Features
• Adaptive sync separator
• Subcarrier frequency output switched in phase in
accordance with VHS standard
• Internal vertical sync pulse integrator
• Fast phase correction of subcarrier frequency
• Composite sync and vertical pulse output
• Selection input to force PAL or NTSC function
• Current controlled oscillator (CCO) with 320/321 times
horizontal frequency
• Still picture input
QUICK REFERENCE DATA
Supply voltage (pin 13)
VP = V13-15
typ.
10
V
Supply current (pin 13)
IP = I13
typ.
24
mA
V3-15(p-p)
typ.
300
mV
V1-15(p-p)
min.
7,3
V
V18-15(p-p)
min.
2,7
V
∆f
min.
± 3,0
%
PAL
fosc
typ.
5,02
MHz
NTSC
fosc
typ.
5,04
MHz
PAL
fo
typ.
627
kHz
NTSC
fo
typ.
629
kHz
V8-15(p-p)
typ.
3
V
Sync separator
Sync pulse input voltage
(peak-to-peak value)
Sync pulse output voltage
(peak-to-peak value)
Vertical sync pulse
Output voltage
(peak-to-peak value)
Phase detector
Catching range
Oscillator
Oscillator frequency
Output frequency
Output sinewave
(peak-to-peak value)
PACKAGE OUTLINE
18-lead DIL; plastic (SOT102); SOT102-1; 1996 December 11.
June 1986
2
Philips Semiconductors
Product specification
PAL/NTSC/SECAM synchronization
processor for video recorders
Fig.1 Block diagram
TDA3755
June 1986
3
Philips Semiconductors
Product specification
PAL/NTSC/SECAM synchronization
processor for video recorders
TDA3755
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
VP = V13-15
max. 13,2
9, 10, 11, 17 to pin 15 (ground)
Vn -15
0 to VP
V
Voltage range at pin 12
V12-15
min.
0
V
Voltage range at pin 6
V6-15
max. 8
V
at pins 1, 5, 8, 14, 16, 18
± In
max. 5
mA
at pin 6
−I6
max. 1
mA
at pin 12
Supply voltage (pin 13)
V
Voltage range at pins 2, 3, 4, 7,
Currents
I12
max. 2
mA
Total power dissipation
Ptot
max. 1
W
Storage temperature range
Tstg
−25 to + 150
°C
Operating ambient temperature range
Tamb
0 to + 70
°C
June 1986
4
Philips Semiconductors
Product specification
PAL/NTSC/SECAM synchronization
processor for video recorders
TDA3755
CHARACTERISTICS
VP = 10 V; Tamb = 25 °C; measured in Fig.4; unless otherwise specified
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
Supply (pin 13)
Supply voltage range
VP = V13-15
9,6
−
13,2
V
Supply current
IP = I13
−
24
−
mA
V3-15(p-p)
−
1
−
V
V3-15(p-p)
75
−
600
mV
−
50
−
%
RG
−
−
1
kΩ
V1-15
7,8
−
−
V
V1-15
−
−
0,5
V
td
−
0,2
−
µs
V18-15
2,7
−
5,0
V
V18-15
−
−
0,5
V
tp
−
190
−
µs
td
32
−
64
µs
V4-15
−
−
0,3
V
−I4
−
−
20
µA
V4-15
2
−
−
V
Sync separator (pin 3)
Colour composite video
input voltage (note 2)
(peak-to-peak value)
Sync pulse amplitude
(peak-to-peak value)
Slicing level, relative to
sync pulse amplitude (note 3)
Internal resistance of video source
Sync output voltage HIGH
at −I1 = 1 mA
Sync output voltage LOW
at I1 = 1 mA
Delay between signal
at input pin 3 and sync pulse
at output pin 1
Vertical sync pulse (pin 18; note 4)
Output voltage HIGH
at −I18 = 1 mA
Output voltage LOW
at I18 = 1,6 mA
Duration of HIGH state
of internally generated output pulse
Delay between leading edge of input
signal at pin 3 and leading edge of
output pulse at pin 18
Selection input (pin 4)
Input voltage for NTSC state
Input current
at V4-15 = 0 V
Input voltage for PAL state
pin 4 open circuit
June 1986
5
Philips Semiconductors
Product specification
PAL/NTSC/SECAM synchronization
processor for video recorders
TDA3755
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
Test picture/mute/synthetic sync pulse
Minimum voltage at pin 11 for
V11-15
4,8
−
−
V
V11-15
−
−
3,8
V
at test picture “black” or at mute
V16-15
−
2,75
−
V
at test picture “white”
V16-15
−
4,50
−
V
at “in sync condition”
V16-15
−
−
0,5
V
−I11
−
−
25
µA
PAL
fosc
−
5,02
−
MHz
NTSC
fosc
−
5,04
−
MHz
Oscillator conversion gain
ko
−
16,13
−
MHz/mA
D.C. control voltage
V6-15
−
2,1
−
V
Input current for f = 5,016 MHz
−I16
−
310
−
µA
Holding range (note 7)
∆f
± 3,2
−
−
%
Catching range (note 7)
∆f
± 3,0
−
−
%
Control loop gain
kv
−
380
−
s−1
test picture mode active (note 5)
Maximum voltage at pin 11 for
test picture mode inactive
Output voltage at pin 16
Input current (pin 11)
Oscillator/phase detector
Oscillator frequency (note 6)
× 103
Output of lower subcarrier (note 8)
V8-15(p-p)
−
3
−
V
Output current
I8
−
−
2
mA
D.C. output voltage
V8-15
−
3,1
−
V
α2nd
20
−
−
dB
ts
−
2
−
µs
± I5
−
3,78
−
mA
V5-15
1,4
−
2,8
V
(peak-to-peak value)
2nd harmonic suppression
without switching
Switching position prior to centre
of sync pulse (pin 3)
Output peak current of phase detector
during sync pulse
Output voltage range (note 9)
June 1986
6
Philips Semiconductors
Product specification
PAL/NTSC/SECAM synchronization
processor for video recorders
TDA3755
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
Sandcastle pulse (pin 14; note 10)
Output voltage HIGH (note 11)
V14-15
7,8
−
−
V
V14-15
2,3
3,0
3,7
V
V14-15
−
−
0,5
V
t14-3
−
2,6
−
µs
V10-15
−
7,2
−
V
−I10
−
−
20
µA
V9-15
−
1,4
−
V
Input current
−I9
−
−
20
µA
D.C. input voltage
V7-15
−
5,6
−
V
Input resistance
R7-15
3
−
−
kΩ
V7-15
−
5,6(1)
−
V
V7-15
−
−
0,5
V
V7-15
−
VP
−
V
at −I14 =1 mA
Output voltage INTERMEDIATE
at −I14 = 1 mA
Output voltage LOW
at I14 =1 mA
Lower part is starting prior to the
centre of sync pulse at pin 3
and ending with the upper part
Fast phase correction/head pulse
Threshold voltage
for fast phase correction (note 12)
Input current
Threshold voltage
of head pulse input
Subcarrier phase switching (note 13)
Phase switching of subcarrier phase
in accordance with head pulse
LOW state of still picture input
Continuous phase switching
voltage
June 1986
7
Philips Semiconductors
Product specification
PAL/NTSC/SECAM synchronization
processor for video recorders
TDA3755
Notes to the characteristics
1. Or not connected.
2. The sync separator input signal is shown in Fig.2.
3. The black level and the top sync level are detected internally and stored in capacitors at pin 2 and pin 3 respectively.
4. The vertical sync pulse output is disabled by mute.
5. In test picture mode the synthetic sync pulse is fed to output pin 1 and the vertical pulse consists of an uninterrupted
block pulse of 192 µs triggering at every transition of head pulse (HP) at pin 9. The timing of test picture and synthetic
sync pulse is shown in Fig.3.
6. Oscillator adjustment during test picture mode made only, at V11-15 > 4,8 V, V7-15 = 0 V and V4-15 > 2 V or open
circuit; measurement is fosc / 8 at output pin 8.
7. The holding range and catching range are both determined by the resistor connected between pin 5 and pin 6.
8. The phase of the lower subcarrier is switched in accordance with the VHS standard. PNP emitter follower, internal
resistive load of 10 kΩ (typ.) to VP.
9. The output voltage at pin 5 is disabled during test picture mode.
10. The burst gating pulse is superimposed on an uninterrupted horizontal pulse. It is suppressed 16 times starting with
every transition of the head pulse at pin 9. If a vertical pulse is detected during that time the burst gating pulses are
additionally suppressed until line 12 and line 324 respectively. In any event the number of suppressed burst gating
pulses is even.
11. The timing of the upper part of the sandcastle pulse is determined by the components connected to pin 12 (Fig.4)
and is independent of supply voltage variations.
12. The fast phase correction pulses have to be in the burst gating reference pulse. For any HIGH to LOW transitions of
the correction pulse the phase is corrected by −90° if the head pulse input is LOW and by +90° if the head pulse input
is HIGH.
13. Subcarrier phase switching is detailed in Table 1.
Subcarrier is 40,000 × fH for NTSC state and 40,125 × fH for PAL state.
Table 1
Subcarrier phase switching
STILL
PAL
NTSC
PICTURE INPUT
HP = HIGH
HP = LOW
HP = HIGH
HP = LOW
HIGH
−90°
−90°
−90°
−90°
not connected
0°
−90°
+90°
−90°
LOW
0°
0°
+90°
+90°
June 1986
8
Philips Semiconductors
Product specification
PAL/NTSC/SECAM synchronization
processor for video recorders
TDA3755
Fig.2 Colour composite video input signal at pin 3.
Where: The value of t1 is dependent upon adjustment of the burst gating pulse delay.
Time t2 is the burst gating pulse duration.
Fig.3 Timing of test picture and synthetic sync pulse.
June 1986
9
Philips Semiconductors
Product specification
PAL/NTSC/SECAM synchronization
processor for video recorders
TDA3755
Fig.4 Application circuit diagram.
APPLICATION INFORMATION
June 1986
10
Philips Semiconductors
Product specification
PAL/NTSC/SECAM synchronization
processor for video recorders
TDA3755
PACKAGE OUTLINE
DIP18: plastic dual in-line package; 18 leads (300 mil)
SOT102-1
ME
seating plane
D
A2
A
A1
L
c
e
Z
w M
b1
(e 1)
b
b2
MH
10
18
pin 1 index
E
1
9
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
b2
c
D (1)
E (1)
e
e1
L
ME
MH
w
Z (1)
max.
mm
4.7
0.51
3.7
1.40
1.14
0.53
0.38
1.40
1.14
0.32
0.23
21.8
21.4
6.48
6.20
2.54
7.62
3.9
3.4
8.25
7.80
9.5
8.3
0.254
0.85
inches
0.19
0.020
0.15
0.055
0.044
0.021
0.015
0.055
0.044
0.013
0.009
0.86
0.84
0.26
0.24
0.10
0.30
0.15
0.13
0.32
0.31
0.37
0.33
0.01
0.033
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
93-10-14
95-01-23
SOT102-1
June 1986
EUROPEAN
PROJECTION
11
Philips Semiconductors
Product specification
PAL/NTSC/SECAM synchronization
processor for video recorders
TDA3755
SOLDERING
Introduction
There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and
surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for
surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often
used.
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our
“IC Package Databook” (order code 9398 652 90011).
Soldering by dipping or by wave
The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the
joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds.
The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may
be necessary immediately after soldering to keep the temperature within the permissible limit.
Repairing soldered joints
Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more
than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds.
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
June 1986
12