INTEGRATED CIRCUITS DATA SHEET TEA1114A Low voltage telephone transmission circuit with dialler interface and regulated strong supply Product specification Supersedes data of 1999 Sep 14 File under Integrated Circuits, IC03 2000 Mar 21 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A FEATURES APPLICATIONS • Low DC line voltage; operates down to 1.45 V (excluding voltage drop over external polarity guard) • Line powered telephone sets with LCD module • Line voltage regulator with adjustable DC voltage • Fax machines • Cordless telephones • 3.3 V regulated strong supply point for peripheral circuits compatible with: • Answering machines. – Speech mode GENERAL DESCRIPTION – Ringer mode The TEA1114A is a bipolar integrated circuit that performs all speech and line interface functions required in fully electronic telephone sets. It performs electronic switching between speech and dialling. The IC operates at a line voltage down to 1.45 V DC (with reduced performance) to facilitate the use of telephone sets connected in parallel. – Trickle mode. • Transmit stage with: – Microphone amplifier with symmetrical high impedance inputs – DTMF amplifier with confidence tone on receive output. When the line current is high enough, a fixed amount of current is derived from the LN pin in order to create a strong supply point at pin VDD. The voltage at pin VDD is regulated to 3.3 V to supply peripherals such as dialler, LCD module and microcontroller. • Receive stage with: – Receive amplifier with asymmetrical output – Earpiece amplifier with adjustable gain (and gain boost facility) for all types of earpieces. • MUTE input for pulse or DTMF dialling • AGC line loss compensation for microphone and receive amplifiers. ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION TEA1114A DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4 TEA1114AT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 TEA1114AUH 2000 Mar 21 − − bare die; on foil 2 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A QUICK REFERENCE DATA Iline = 15 mA; VEE = 0 V; RSLPE = 20 Ω; AGC pin connected to VEE; Zline = 600 Ω; f = 1 kHz; measured according to test circuits given in Figs 15, 16 and 17; Tamb = 25 °C for TEA1114A(T); Tj = 25 °C for TEA1114AUH; unless otherwise specified. SYMBOL Iline PARAMETER line current operating range CONDITIONS MIN. TYP. MAX. UNIT normal operation 11 − 140 mA with reduced performance 1 − 11 mA 4.05 4.35 4.65 V VLN DC line voltage ICC internal current consumption VCC = 3.6 V − 1.25 1.5 mA VCC supply voltage for internal circuitry (unregulated) IP = 0 mA − 3.6 − V VDD regulated supply voltage for peripherals speech mode IDD = −3 mA 3.0 3.3 3.6 V ringer mode IDD = 75 mA 3.0 3.3 3.6 V − − −3 mA VMIC = 4 mV (RMS) 43.2 44.2 45.2 dB IDD available supply current for peripherals Gv(TX) typical voltage gain for microphone amplifier Gv(RX) typical voltage gain for receiving amplifier VIR = 4 mV (RMS) 32.4 33.4 34.4 dB ∆Gv(QR) gain setting range for earpiece amplifier RE1 = 100 kΩ −14 − +12 dB ∆Gv(trx) gain control range for microphone and receive amplifiers with respect to Iline = 15 mA Iline = 85 mA − 6.0 − dB ∆Gv(trx)(m) gain reduction for microphone and receive amplifiers MUTE = LOW − 80 − dB 2000 Mar 21 3 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A BLOCK DIAGRAM handbook, full pagewidth IR 4 V MUTE I 8 V DTMF RX 11 GAR 9 I 6 ATTENUATOR V 12 QR CURRENT AND VOLTAGE REFERENCE 0.5VCC I 16 VCC 7 VDD VDD REGULATOR TEA1114A MIC+ 13 MIC− 14 VEE 10 1 LN V I AGC CIRCUIT 3 REG LOW VOLTAGE CIRCUIT AGC 5 2 SLPE Fig.1 Block diagram. 2000 Mar 21 4 MGK804 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A PINNING PIN PAD TEA1114A(T) TEA1114AUH LN 1 1, 19 SLPE 2 2 slope (DC resistance) adjustment REG 3 3 line voltage regulator decoupling IR 4 4 receiving amplifier input AGC 5 5 automatic gain control/ line loss compensation DTMF 6 6 dual-tone multi-frequency input VDD 7 7 regulated supply for peripherals MUTE 8 8 mute input to select speech or dialling mode (active LOW) QR 9 9 earpiece amplifier output n.c. − 10 not connected VEE 10 11 negative line terminal SYMBOL DESCRIPTION positive line terminal n.c. − 12 not connected GAR 11 13 earpiece amplifier gain adjustment RX 12 14 receive amplifier output MIC+ 13 15 non-inverting microphone amplifier input MIC− 14 16 inverting microphone amplifier input n.c. 15 − not connected VCC 16 17 supply voltage for internal circuit n.c. − 18 not connected handbook, halfpage 16 VCC LN 1 15 n.c. SLPE 2 REG 3 14 MIC− IR 4 13 MIC+ TEA1114A AGC 5 12 RX DTMF 6 11 GAR VDD 7 10 VEE MUTE 8 9 QR MGK803 Fig.2 Pin configuration. 2000 Mar 21 5 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A FUNCTIONAL DESCRIPTION I SLPE = I line – I CC – I P – I SUP All data given in this chapter are typical values, except when otherwise specified. where: Iline = line current Supply (pins LN, SLPE, REG, VCC and VDD) ICC = current consumption of the IC The supply for the TEA1114A and its peripherals is obtained from the telephone line (see Fig.3). IP = supply current for external circuits ISUP = current consumed between LN and VEE by the VDD regulator. THE LINE INTERFACE (PINS LN, SLPE AND REG) The preferred value for RSLPE is 20 Ω. Changing RSLPE will affect more than the DC characteristics; it also influences the microphone and DTMF gains, the gain control characteristics, the sidetone level and the maximum output swing on the line. The IC generates a stabilized reference voltage (Vref) between pins LN and SLPE. Vref is temperature compensated and can be adjusted by means of an external resistor (RVA). Vref equals 4.15 V and can be increased by connecting RVA between pins REG and SLPE or decreased by connecting RVA between pins REG and LN. The voltage at pin REG is used by the internal regulator to generate Vref and is decoupled by CREG, which is connected to VEE. This capacitor, converted into an equivalent inductance (see Section “Set impedance”) realizes the set impedance conversion from its DC value (RSLPE) to its AC value (RCC in the audio-frequency range). The voltage at pin SLPE is proportional to the line current. The DC line current flowing into the set is determined by the exchange supply voltage (VEXCH), the feeding bridge resistance (REXCH), the DC resistance of the telephone line (Rline) and the reference voltage (Vref). With line currents below 9 mA, the internal reference voltage (generating Vref) is automatically adjusted to a lower value. This means that more sets can operate in parallel with DC line voltages (excluding the polarity guard) down to an absolute minimum voltage of 1.45 V. At currents below 9 mA, the circuit has limited sending and receiving levels. This is called the low voltage area. The voltage at pin LN is: V LN = V ref + R SLPE × I SLPE handbook, full pagewidth Rline RCC Iline ILN TEA1114A ICC VCC LN CVCC IP 100 µF from preamplifier ISUP internal circuitry REXCH VDD REGULATOR VDD external circuits IDD VEXCH peripherals REG CREG 4.7 µF VEE SLPE CVDD 220 µF ISLPE RSLPE 20 Ω MGK805 Fig.3 Supply configuration. 2000 Mar 21 6 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A THE INTERNAL SUPPLY POINT (PIN VCC) The internal circuitry of the TEA1114A is supplied from pin VCC. This voltage supply is derived from the line voltage by means of a resistor (RCC) and must be decoupled by a capacitor CVCC. It may also be used to supply some external circuits. The VCC voltage depends on the current consumed by the IC and the peripheral circuits as: V CC0 = V LN – R CC × I CC MGL827 3 handbook, halfpage IP (mA) 1.9 mA 2 1.6 mA V CC = V CC0 – R CC × ( I P + I rec ) (see also Figs 4 and 5). Irec is the current consumed by the output stage of the earpiece amplifier. 1 (2) handbook, halfpage RCC VCC0 0 VCC Irec 0 EXTERNAL CIRCUITS VEE Fig.4 1 2 3 VCC (V) 4 IP VCC ≥ 2.5 V; VLN = 4.35 V at Iline = 15 mA; RCC = 619 Ω; RSLPE = 20 Ω. Curve (1) is valid when the receiving amplifier is driven: VQR(rms) = 150 mV; RL1 = 150 Ω. Curve (2) is valid when the receiving amplifier is not driven. MGK806 VCC used as supply voltage for external circuits. Fig.5 THE REGULATED SUPPLY POINT (PIN VDD) Typical current IP available from VCC for peripheral circuitry. In ringer mode, the stabilizer operates as a shunt stabilizer to keep VDD at 3.3 V. In this mode, the input voltage VLN = 0 V while the input current into pin VDD is delivered by the ringing signal. VDD has to be decoupled by a capacitor CVDD. The VDD regulator delivers a stabilized voltage for the peripherals in transmission mode (nominal VLN) as well as in ringer mode (VLN = 0 V). The regulator (see Fig.6) consists of a sense input circuit, a current switch and a VDD output stabilizer. The regulator operates as a current source at the LN input in transmission mode; it takes a constant current of 4.3 mA (at nominal conditions) from pin LN. The current switch reduces the distortion on the line at large signal swings. Output VDD follows the DC voltage at pin LN (with typically 0.35 V difference) up to VDD = 3.3 V. The input current of the regulator is constant while the output (source) current is determined by the consumption of the peripherals. The difference between input and output current is shunted by the internal VDD stabilizer. 2000 Mar 21 (1) 7 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply Rline handbook, full pagewidth TEA1114A RCC Iline ICC ILN LN CVCC VCC 100 µF VDD REXCH ISUP IDD SENSE SWITCH peripherals VEXCH VDD regulator CVDD TEA1114A VEE 220 µF MGK807 Fig.6 VDD regulator configuration. Set impedance Transmit stage (pins MIC+, MIC− and DTMF) In the audio frequency range, the dynamic impedance is mainly determined by the RCC resistor. The equivalent impedance of the circuit is illustrated in Fig.7. MICROPHONE AMPLIFIER (PINS MIC+ AND MIC−) handbook, halfpage The TEA1114A has symmetrical microphone inputs. The input impedance between pins MIC+ and MIC− is 64 kΩ (2 × 32 kΩ). The voltage gain from pins MIC+/MIC− to pin LN is set at 44.2 dB (typically). Automatic gain control is provided on this amplifier for line loss compensation. LN LEQ Vref RP RCC 619 Ω REG VCC CREG 4.7 µF CVCC 100 µF DTMF AMPLIFIER (PIN DTMF) When the DTMF amplifier is enabled, dialling tones may be sent on line. These tones are also sent to the receive output RX at a low level (confidence tone). SLPE RSLPE 20 Ω VEE The TEA1114A has an asymmetrical DTMF input. The input impedance between DTMF and VEE is 20 kΩ. The voltage gain from pin DTMF to pin LN is set at 26 dB. MBE788 Automatic gain control has no effect on the DTMF amplifier. LEQ = CREG × RSLPE × RP. RP = internal resistance. RP = 17.5 kΩ. Fig.7 Equivalent impedance between LN and VEE. 2000 Mar 21 8 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A Receiving stage (pins IR, RX, GAR and QR) The preferred value of RE1 is 100 kΩ. The receive part consists of a receive amplifier and an earpiece amplifier. The earpiece amplifier offers a gain boost facility relative to the initial gain. Resistor RE2 has to be replaced by the network of RE21, RE22 and RE23 as shown in Fig.8. THE RECEIVE AMPLIFIER (PINS IR AND RX) R E21 + R E22 The initial gain is defined by: – -----------------------------R E1 The receive amplifier transfers the receive signal from input IR to output RX. The input impedance of the receive amplifier, between pins IR and VEE, is 20 kΩ. The voltage gain from pin IR to RX is set at 33.4 dB. RX output is intended to drive high ohmic (real) loads. Automatic gain control is provided on the receive amplifier. which corresponds to RE23 = ∞. The gain boost is realized by a defined value of RE23 and is: R E21 + R E22 R E21 // R E22 – ------------------------------- × 1 + --------------------------------- R E1 R E23 Two external capacitors CGAR (connected between GAR and QR) and CGARS (connected between GAR and VEE) ensure stability. The CGAR capacitor provides a first-order low-pass filter. The cut-off frequency corresponds to the time constant CGAR × RE2. The relationship CGARS = 10 × CGAR must be fulfilled to ensure stability. THE EARPIECE AMPLIFIER (PINS GAR AND QR) The earpiece amplifier is an operational amplifier having its output (QR) and inverting input (GAR) available. It can be used in conjunction with two resistors to get some extra gain or attenuation. In an usual configuration (see Fig.8), output RX drives the earpiece amplifier by means of RE1 connected between RX and GAR. Feedback resistor RE2 of the earpiece amplifier is connected between QR and GAR. Output QR drives the earpiece. The output voltages of both amplifiers are specified for continuous wave drive. The maximum output swing depends on the DC line voltage VLN, the RCC resistor, the ICC current consumption of the circuit, the IP current consumption of the peripheral circuits and the load impedance. The gain of the earpiece amplifier (from RX to QR) can be set between +12 and −14 dB by means of resistor RE2. CGAR handbook, full pagewidth Iline RCC Rline CGARS RE2 ICC TEA1114A LN VCC QR RE1 GAR RX REXCH EARPIECE AMPLIFIER CVCC 100 µF RX RE1 100 kΩ GAR CGARS RE21 VEXCH 10 µF 0.5VCC CGAR VEE RE22 RE23 VEE QR Addition for gain boost of earpiece amplifier Fig.8 Earpiece amplifier configuration. 2000 Mar 21 9 MGK808 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A Automatic gain control (pin AGC) Sidetone suppression The TEA1114A performs automatic line loss compensation. The automatic gain control varies the gain of the microphone amplifier and the gain of the receive amplifier in accordance with the DC line current. The TEA1114A anti-sidetone network comprising RCC // Zline, Rast1, Rast2, Rast3, RSLPE and Zbal (see Fig.9) suppresses the transmitted signal in the earpiece. Maximum compensation is obtained when the following conditions are fulfilled: The control range is 6.0 dB (which corresponds approximately to a line length of 5 km for a 0.5 mm diameter twisted-pair copper cable with a DC resistance of 176 Ω/km and an average attenuation of 1.2 dB/km). R SLPE × R ast1 = R CC × ( R ast2 + R ast3 ) R ast2 × ( R ast3 + R SLPE ) k = ---------------------------------------------------------R ast1 × R SLPE The IC can be used with different configurations of feeding bridge (supply voltage and bridge resistance) by connecting an external resistor RAGC between pins AGC and VEE. This resistor enables the Istart and Istop line currents to be increased (the ratio between Istart and Istop is not affected by the resistor). The AGC function is disabled when pin AGC is left open-circuit. Z bal = k × Z line The scale factor k is chosen to meet the compatibility with a standard capacitor from the E6 or E12 range for Zbal. The mute function performs the switching between the speech mode and the dialling mode. In practice, Zline varies considerably with the line type and the line length. Therefore, the value of Zbal should be for an average line length which gives satisfactory sidetone suppression with short and long lines. The suppression also depends on the accuracy of the match between Zbal and the impedance of the average line. When MUTE is LOW, the DTMF input is enabled and the microphone and receive amplifier inputs are disabled. In this mode, the DTMF tones are sent to the receive output at a low level (confidence tone). The anti-sidetone network for the TEA1114A attenuates the receiving signal from the line by 32 dB before it enters the receiving amplifier. The attenuation is almost constant over the whole audio frequency range. When MUTE is HIGH, the microphone and receiving amplifiers inputs are enabled while the DTMF input is disabled. The MUTE input is provided with an internal pull-up current source to VCC. A Wheatstone bridge configuration (see Fig.10) may also be used. Mute function (pin MUTE) 2000 Mar 21 More information on the balancing of an anti-sidetone bridge can be obtained in our publication “Semiconductors for Wired Telecom Systems; Application Handbook, IC03b”. For ordering information please contact the Philips Semiconductors sales office. 10 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A LN handbook, full pagewidth Zline RCC Rast1 IR Im VEE Zir Rast2 RSLPE Rast3 SLPE Zbal MBE787 Fig.9 Equivalent circuit of TEA1114A anti-sidetone bridge. handbook, full pagewidth LN Zline RCC Zbal Im VEE RSLPE IR Zir Rast1 RA SLPE MBE786 Fig.10 Equivalent circuit of an anti-sidetone network in a Wheatstone bridge configuration. 2000 Mar 21 11 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VLN PARAMETER CONDITIONS MIN. MAX. UNIT positive continuous line voltage VEE − 0.4 12 V repetitive line voltage during switch-on or line interruption VEE − 0.4 13.2 V IDD maximum input current at pin VDD − 75 mA Vn(max) maximum voltage on all pins except pin VDD VEE − 0.4 VCC + 0.4 V Iline line current RSLPE = 20 Ω; see Figs 11 and 12 − 140 mA Ptot total power dissipation Tamb = 75 °C; see Figs 11 and 12 − 625 mW − 416 mW TEA1114A TEA1114AT − − Tstg storage temperature −40 +125 °C Tamb ambient temperature −25 +75 °C Tj junction temperature − 125 °C TEA1114AUH; note 1 Note 1. Mostly dependent on the maximum required ambient temperature, on the voltage between LN and SLPE and on the thermal resistance between die ambient temperature. This thermal resistance depends on the application board layout and on the materials used. Figure 13 shows the safe operating area versus this thermal resistance for ambient temperature Tamb = 75 °C. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER CONDITIONS VALUE UNIT TEA1114A 70 K/W TEA1114AT 115 K/W tbf by customer application K/W thermal resistance from junction to ambient in free air; note 1 TEA1114AUH Note 1. Mounted on epoxy board 40.1 × 19.1 × 1.5 mm. 2000 Mar 21 12 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A MGL212 150 handbook, halfpage ILN (mA) (1) 110 (2) (3) (4) 70 30 2 4 6 8 10 12 VLN - VSLPE (V) (1) Tamb = 45 °C; Ptot = 1.000 W. (2) Tamb = 55 °C; Ptot = 0.875 W. (3) Tamb = 65 °C; Ptot = 0.750 W. (4) Tamb = 75 °C; Ptot = 0.625 W. Fig.11 DIP16 safe operating area (TEA1114A). MGL213 150 handbook, halfpage ILN (mA) 110 (1) (2) 70 (3) (4) 30 2 (1) (2) (3) (4) 4 6 8 10 12 VLN - VSLPE (V) Tamb = 45 °C; Ptot = 0.666 W. Tamb = 55 °C; Ptot = 0.583 W. Tamb = 65 °C; Ptot = 0.500 W. Tamb = 75 °C; Ptot = 0.416 W. Fig.12 SO16 safe operating area (TEA1114AT). 2000 Mar 21 13 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A FCA161 160 handbook, full pagewidth I line (mA) (1) 120 (2) (3) (4) 80 (5) (6) (7) 40 0 2 4 6 8 10 LINE Rth(j-a) (K/W) (1) 40 (2) 50 (3) 60 (4) 75 (5) 90 (6) 105 (7) 130 Fig.13 Safe operating area at Tamb = 75 °C (TEA1114AUH). 2000 Mar 21 14 12 VSLPE (V) Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A CHARACTERISTICS Iline = 15 mA; VEE = 0 V; RSLPE = 20 Ω; pin AGC connected to VEE; Zline = 600 Ω; f = 1 kHz; measured according to test circuits given in Figs 15, 16 and 17; Tamb = 25 °C for TEA1114A(T); Tj = 25 °C for TEA1114AUHT; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply (pins LN, VCC, SLPE, REG and VDD) THE LINE INTERFACE (PINS LN, SLPE AND REG) Vref stabilized reference voltage between pins LN and SLPE VLN DC line voltage 3.9 4.15 4.4 V Iline = 1 mA − 1.45 − V Iline = 4 mA − 2 − V Iline = 15 mA 4.05 4.35 4.65 V Iline = 140 mA − 7.1 7.55 V VLN(Rext) DC line voltage with an external resistor RVA RVA = 44.2 kΩ (between pins LN and REG) − 3.6 − V ∆VLN(T) DC line voltage variation with temperature referred to 25 °C Tamb = −25 to +75 °C − ±40 − mV THE INTERNAL SUPPLY POINT (PIN VCC) ICC internal current consumption VCC = 3.6 V − 1.25 1.5 mA VCC supply voltage for internal circuitry IP = 0 mA − 3.6 − V − 0 − mA THE REGULATED SUPPLY POINT (PIN VDD) ISUP VDD IDD 2000 Mar 21 input current of the VDD Iline = 1 mA regulator (current from pin LN Iline = 4 mA not flowing through pin SLPE) Iline ≥ 11 mA − 2.15 − mA − 4.3 − mA 3.6 V regulated supply voltage in: speech mode IDD = −3 mA; VLN > 3.6 + 0.25 V (typ.); Iline ≥ 11 mA 3.0 3.3 speech mode at reduced performance Iline = 4 mA − VLN − 0.35 − V ringer mode Iline = 0 mA; IDD = 75 mA 3.0 3.3 3.6 V speech mode Iline ≥ 11 mA − − −3 mA speech mode at reduced performance Iline = 4 mA − −0.5 − mA trickle mode Iline = 0 mA; VCC discharging; VDD = 1.2 V − − 100 nA regulated supply current available in: 15 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply SYMBOL PARAMETER TEA1114A CONDITIONS MIN. TYP. MAX. UNIT Transmit stage (pins MIC+, MIC− and DTMF) MICROPHONE AMPLIFIER (PINS MIC+ AND MIC−) Zi input impedance differential between pins MIC+ and MIC− − 68 − kΩ single-ended between pins MIC+/MIC− and VEE − 34 − kΩ Gv(TX) voltage gain from pins MIC+/MIC− to pin LN VMIC = 4 mV (RMS) 43.2 44.2 45.2 dB ∆Gv(TX)(f) voltage gain variation with frequency referred to 1 kHz f = 300 to 3400 Hz − ±0.2 − dB ∆Gv(TX)(T) voltage gain variation with temperature referred to 25 °C Tamb = −25 to +75 °C − ±0.3 − dB CMRR common mode rejection ratio − 80 − dB VLN(max)(rms) maximum sending signal (RMS value) Iline = 15 mA; THD = 2% 1.8 2.15 − V Iline = 4 mA; THD = 10% − 0.35 − V noise output voltage at pin LN psophometrically − weighted (P53 curve); pins MIC+/ MIC− shorted through 200 Ω −78 − dBmp Vno(LN) DTMF AMPLIFIER (PIN DTMF) Zi input impedance − 21 − kΩ Gv(DTMF) voltage gain from pin DTMF to VDTMF = 20 mV (RMS); pin LN MUTE = LOW 25 26 27 dB ∆Gv(DTMF)(f) voltage gain variation with frequency referred to 1 kHz f = 300 to 3400 Hz − ±0.2 − dB ∆Gv(DTMF)(T) voltage gain variation with temperature referred to 25 °C Tamb = −25 to +75 °C − ±0.4 − dB Gv(ct) voltage gain from pin DTMF to VDTMF = 20 mV (RMS); pin RX (confidence tone) RL2 = 10 kΩ; MUTE = LOW − −9.2 − dB − 21.5 − kΩ Receiving stage (pins IR, RX, GAR and QR) THE RECEIVE AMPLIFIER (PINS IR AND RX) Zi input impedance Gv(RX) voltage gain from pin IR to pin RX VIR = 4 mV (RMS) 32.4 33.4 34.4 dB ∆Gv(RX)(f) voltage gain variation with frequency referred to 1 kHz f = 300 to 3400 Hz − ±0.2 − dB ∆Gv(RX)(T) voltage gain variation with temperature referred to 25 °C Tamb = −25 to +75 °C − ±0.3 − dB VRX(max)(rms) maximum receiving signal on pin RX (RMS value) IP = 0 mA; sine wave drive; RL2 = 10 kΩ; THD = 2% 0.4 − − V 2000 Mar 21 16 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply SYMBOL PARAMETER TEA1114A CONDITIONS IRX(max) maximum source and sink current on pin RX (peak value) Vno(RX)(rms) noise output voltage at pin RX pin IR open-circuit; (RMS value) RL2 = 10 kΩ; psophometrically weighted (P53 curve) IP = 0 mA; sine wave drive MIN. TYP. MAX. UNIT 50 − − µA − −86 − dBVp THE EARPIECE AMPLIFIER (PINS GAR AND QR) Gv(QR) voltage gain from pin RX to pin QR VIR = 4 mV (RMS); RE1 = RE2 = 100 kΩ − 0 − dB ∆Gv(QR) voltage gain setting RE1 = 100 kΩ −14 − +12 dB VQR(max)(rms) maximum receiving signal on pin QR (RMS value) IP = 0 mA; sine wave drive; RL1 = 150 Ω; THD = 2% 0.3 0.38 − V IP = 0 mA; sine wave drive; RL1 = 450 Ω; THD = 2% 0.46 0.56 − V − −86 − dBVp RE1 = 100 kΩ; RE2 = 25 kΩ − −98 − dBVp Iline = 85 mA − 6.0 − dB Vno(QR)(rms) noise output voltage at pin QR IR open-circuit; (RMS value) RL1 = 150 Ω; RE1 = RE2 = 100 kΩ psophometrically weighted (P53 curve) Automatic gain control (pin AGC) ∆Gv(trx) voltage gain control range for microphone and receive amplifiers with respect to Iline = 15 mA Istart highest line current for maximum gain − 23 − mA Istop lowest line current for minimum gain − 59 − mA VEE − 0.4 − VEE + 0.3 V Mute function (pin MUTE) VIL LOW-level input voltage VIH HIGH-level input voltage VEE + 1.5 − VCC + 0.4 V IMUTE input current − 2 10 µA ∆Gv(trx)(m) voltage gain reduction for: 2000 Mar 21 microphone amplifier MUTE = LOW − 80 − dB receive amplifier MUTE = LOW − 80 − dB earpiece amplifier MUTE = LOW − 80 − dB DTMF amplifier MUTE = HIGH − 80 − dB 17 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A TEST AND APPLICATION INFORMATION Rprot handbook, full pagewidth Cz D1 AB D2 1N4004 D3 D4 Dz Vd 10 V RCC Cemc 10 nF Rz CVCC 100 µF BA VCC LN SLPE CREG Rast1 130 kΩ CIR 4.7 µF 100 nF Rast2 3.92 kΩ Rast3 392 Ω Rbal1 130 Ω Cbal 220 nF 619 Ω Rbal2 820 Ω RAGC CDTMF DTMF 220 nF VDD RSLPE 20 Ω peripheral supply n.c. RTX1 REG MIC− MIC− RTX3 IR MIC+ TEA1114A AGC CMIC+ RX DTMF GAR VDD VEE CVDD MUTE 220 µF RTX2 MIC+ QR RE1 100 kΩ RE2 100 kΩ CGARS CGAR 1 nF 100 pF CEAR REC 10 µF VEE MUTE Fig.14 Basic application of the TEA1114A IC. 2000 Mar 21 CMIC− 18 FCA002 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A CVDD handbook, full pagewidth VLN Iline 220 µF RCC 619 Ω ICC LN VCC VDD 10 µF RE2 MIC− VO RL1 QR VMIC Iline 100 µF IDD IR 100 µF CVCC CGAR TEA1114A MIC+ 3 mA CGARS GAR RE1 Zline 100 kΩ DTMF RX 600 Ω 220 nF VDTMF REG AGC CREG 4.7 µF SLPE VEE RSLPE 20 Ω MUTE S1 100 nF RL2 10 kΩ MGK809 V Voltage gain defined as Gv = 20 log ------O- ; VI = VMIC or VDTMF. VI Microphone gain: S1 = open. DTMF gain and confidence tone: S1 = closed. Inputs not being tested should be open-circuit. Fig.15 Test figure for defining transmit gains. 2000 Mar 21 19 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A CVDD handbook, full pagewidth VLN Iline 220 µF RCC 619 Ω ICC LN VCC 100 µF IDD VQR VDD 10 µF IR 100 µF RL1 QR RE2 MIC− 220 nF Iline Zline CVCC TEA1114A MIC+ CGARS GAR RE1 VI 3 mA CGAR 100 kΩ DTMF RX REG 600 Ω AGC VEE SLPE CREG MUTE VRX RSLPE 4.7 µF 100 nF RL2 S1 20 Ω 10 kΩ MGK810 V Voltage gain defined as Gv = 20 log ------O- ; VO = VQR or VRX. VI Receive and earpiece gains: S1 = open. Inputs not being tested should be open-circuit. Fig.16 Test figure for defining receive gains. handbook, full pagewidth RCC 619 Ω LN VCC VDD IR QR MIC− MIC+ TEA1114A VCC GAR DTMF VDD 10 µF IDD RX REG AGC CREG 4.7 µF SLPE VEE MUTE RSLPE 20 Ω MGK811 Inputs not being tested should be open-circuit. Fig.17 Test figure for defining regulated supply (VDD) performance in ringer and trickle mode. 2000 Mar 21 20 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A BONDING PAD LOCATIONS FOR TEA1114AUH All x/y coordinates represent the position of the centre of the pad (in µm) with respect to the origin (x/y = 0/0) of the die (see Fig.18). The size of all pads is 80 µm × 80 µm. SYMBOL COORDINATES PAD LN SLPE REG IR AGC DTMF VDD MUTE QR n.c. VEE n.c. GAR RX MIC+ MIC− VCC n.c. LN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 handbook, full pagewidth y 365.7 99 99 99 99 99 104 333 531 1010 1160 1160 1160 1160 1160 1160 963.5 764 570 MICM MICP RX GAR n.c. VEE 16 15 14 13 12 11 VCC 17 n.c. 18 LN 19 LN x 99 126 377 639 869 1162 1343 1366 1366 1366 1370 1219.5 1045 782.5 357.5 141.5 99 99 99 1 10 n.c. 9 QR 8 MUTE 2 3 4 5 6 7 SLPE REG IR AGC DTMF VDD x 0,0 y Fig.18 TEA1114AUH bonding pad locations. 2000 Mar 21 21 FCA158 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A PACKAGE OUTLINES DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b b2 MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 b2 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.30 0.53 0.38 1.25 0.85 0.36 0.23 19.50 18.55 6.48 6.20 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 0.76 inches 0.17 0.020 0.13 0.068 0.051 0.021 0.015 0.049 0.033 0.014 0.009 0.77 0.73 0.26 0.24 0.10 0.30 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.030 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 92-11-17 95-01-14 SOT38-4 2000 Mar 21 EUROPEAN PROJECTION 22 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.16 0.15 0.050 0.039 0.016 0.028 0.020 0.01 0.01 0.004 0.028 0.012 inches 0.244 0.041 0.228 θ Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 2000 Mar 21 EIAJ EUROPEAN PROJECTION ISSUE DATE 97-05-22 99-12-27 23 o 8 0o Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. SOLDERING Introduction This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). WAVE SOLDERING Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. Through-hole mount packages SOLDERING BY DIPPING OR BY SOLDER WAVE • For packages with leads on two sides and a pitch (e): The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. MANUAL SOLDERING Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Surface mount packages REFLOW SOLDERING MANUAL SOLDERING Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. 2000 Mar 21 TEA1114A 24 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A Suitability of IC packages for wave, reflow and dipping soldering methods SOLDERING METHOD MOUNTING PACKAGE WAVE suitable(2) Through-hole mount DBS, DIP, HDIP, SDIP, SIL Surface mount REFLOW(1) DIPPING − suitable BGA, SQFP not suitable suitable − HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable(3) suitable − PLCC(4), SO, SOJ suitable suitable − suitable − suitable − recommended(4)(5) LQFP, QFP, TQFP not SSOP, TSSOP, VSO not recommended(6) Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. 3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2000 Mar 21 25 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. BARE DIE DISCLAIMER All die are tested and are guaranteed to comply with all data sheet limits up to the point of wafer sawing for a period of ninety (90) days from the date of Philips' delivery. If there are data sheet limits not guaranteed, these will be separately indicated in the data sheet. There is no post waffle pack testing performed on individual die. Although the most modern processes are utilized for wafer sawing and die pick and place into waffle pack carriers, Philips Semiconductors has no control of third party procedures in the handling, packing or assembly of the die. Accordingly, Philips Semiconductors assumes no liability for device functionality or performance of the die or systems after handling, packing or assembly of the die. It is the responsibility of the customer to test and qualify their application in which the die is used. 2000 Mar 21 26 Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply NOTES 2000 Mar 21 27 TEA1114A Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 403502/04/pp28 Date of release: 2000 Mar 21 Document order number: 9397 750 06729