REVISIONS LTR DESCRIPTION A Add footnotes 3/ and 4/ to output voltage (reference voltage) test under Table I. Update boilerplate paragraphs to current requirements. - ro DATE APPROVED 12-08-14 C. SAFFLE CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 PMIC N/A PREPARED BY RICK OFFICER Original date of drawing YY-MM-DD CHECKED BY TOM HESS 06-03-15 TITLE MICROCIRCUIT, LINEAR, DUAL OUTPUT, LOW DROPOUT VOLTAGE REGULATOR, MONOLITHIC SILICON APPROVED BY RAYMOND MONNIN SIZE A REV AMSC N/A DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 CODE IDENT. NO. DWG NO. V62/06616 16236 A PAGE 1 OF 16 5962-V073-12 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance dual output, low dropout voltage regulator microcircuit, with an operating temperature range of -55°C to +125°C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturer’s PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/06616 - Drawing number 01 X E Device type (See 1.2.1) Case outline (See 1.2.2) Lead finish (See 1.2.3) 1.2.1 Device type(s). Device type Generic 01 TPS70345-EP Circuit function Dual output, low dropout voltage regulator 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins X 24 JEDEC PUB 95 Package style MO-153 Plastic small outline with a thermal pad 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator A B C D E Z DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO Material Hot solder dip Tin-lead plate Gold plate Palladium Gold flash palladium Other SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06616 PAGE 2 1.3 Absolute maximum ratings. 1/ Input voltage range: ( VIN1 ) ............................................................................................................. -0.3 V to +7 V 2/ ( VIN2 ) ............................................................................................................. -0.3 V to +7 V 2/ Voltage range at EN ............................................................................................ -0.3 V to +7 V Output voltage range (VOUT1, VSENSE1) ............................................................. +5.5 V Output voltage range (VOUT2, VSENSE2) ............................................................. +5.5 V Maximum RESET , PG1 voltage ........................................................................ +7 V Maximum MR1 , MR2 , and SEQ voltage ............................................................ VIN1 Peak output current .............................................................................................. Internally limited Operating virtual junction temperature range (TJ) ................................................ -55°C to +150°C Storage temperature range (TSTG) ...................................................................... -65°C to +150°C Electrostatic discharge (ESD) rating: Human body model (HBM) ............................................................................... 2 kV 1.4 Recommended operating conditions. 3/ Input voltage range (VIN) ..................................................................................... +2.7 V to +6.0 V 4/ Output current (IO) (regulator 1) ........................................................................... 0 to 1.0 A Output current (IO) (regulator 2) ........................................................................... 0 to 2.0 A Operating virtual junction temperature range (TJ) ................................................ -55°C to +125°C 1/ 2/ 3/ 4/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are tied to network ground. Use of this product beyond the manufacturers design rules or stated parameters is done at the user’s risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. To calculate the minimum input voltage for maximum output current, use the following equation: VI(min) = VO(max) + VDO(max load). DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06616 PAGE 3 2. APPLICABLE DOCUMENTS JEDEC Solid State Technology Association JEDEC PUB 95 – Registered and Standard Outlines for Semiconductor Devices (Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http://www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturer’s part number as shown in 6.3 herein and as follows: A. B. C. Manufacturer’s name, CAGE code, or logo Pin 1 identifier ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturer’s part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Timing waveforms. The timing waveforms shall be as shown in figure 4. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06616 PAGE 4 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions 2/ Temperature, TJ Device type Limits Min Output voltage 3/ 4/ (reference voltage) VO 2.7 V < VI < 6 V, 01 25°C Unit Max 1.224 typical V FB connected to VO 2.7 V < VI < 6 V, 1.196 -55°C to +125°C 1.248 FB connected to VO Output voltage 1.2 V output (VOUT2) Quiescent current (GND current) for regulator 1 and VO 3/ 2.7 V < VI < 6 V 25°C 2.7 V < VI < 6 V -55°C to +125°C 4/ 01 1.2 typical 1.176 01 25°C V 1.224 185 typical µA 250 -55°C to +125°C regulator 2, EN = 0 V Output voltage line regulation ( ∆VO / VO ) for regulator 1 and regulator 2 5/ VO + 1 V < VI < 6 V 3/ 25°C VO + 1 V < VI < 6 V 3/ -55°C to +125°C Load regulation for VOUT1 and VOUT2 4/ Output current limit Regulator 1, VO = 0 V 01 0.01 % typical 0.1 % 25°C 01 -55°C to +125°C 01 1 typical A 4.8 Thermal shutdown junction temperature II(standby) mV 2.35 Regulator 2, VO = 0 V Standby current V 01 150 typical °C 01 2 µA EN = VI 25°C EN = VI -55°C to +125°C I(RESET) = 300 µA, -55°C to +125°C 01 -55°C to +125°C 01 +25°C 01 10 RESET terminal. Minimum input voltage for valid RESET 1.3 V 98% VO V(RESET) ≤ 0.8 V Trip threshold voltage VO decreasing Hysteresis voltage Measured at VO 92% 0.5% typical VO See footnotes at end of table. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06616 PAGE 5 TABLE I. Electrical performance characteristics – Continued. 1/ Test Symbol Conditions 2/ Temperature, TJ Device type Limits Unit Min Max 80 160 RESET terminal – continued. -55°C to +125°C 01 +25°C 01 VI = 3.5 V, I(RESET) = 1 mA -55°C to +125°C 01 0.4 V V(RESET) = 6 V -55°C to +125°C 01 1 µA Minimum input voltage for valid PG I(PG) = 300 µA, V(PG1) ≤ 0.8 V -55°C to +125°C 01 1.3 V Trip threshold voltage VO decreasing -55°C to +125°C 01 98% VO Hysteresis voltage Measured at VO +25°C 01 0.5% typical VO tr(PG1) Rising edge deglitch +25°C 01 30 typical µs Output low voltage VI = 2.7 V, I(PG) = 1 mA -55°C to +125°C 01 0.4 V Leakage current V(PG1) = 6 V -55°C to +125°C 01 1 µA High level EN input voltage -55°C to +125°C 01 Low level EN input voltage -55°C to +125°C 01 Input current ( EN ) -55°C to +125°C 01 -1 High level SEQ input voltage -55°C to +125°C 01 2 Low level SEQ input voltage -55°C to +125°C 01 SEQ pullup current source +25°C 01 t(RESET) RESET pulse duration tr(RESET) Rising edge deglitch Output low voltage Leakage current ms µs 30 typical PG terminal. 92% EN terminal. 2 V 0.7 V 1 µA SEQ terminal. V 0.7 6 typical V µA See footnotes at end of table. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06616 PAGE 6 TABLE I. Electrical performance characteristics – Continued. 1/ Test Symbol Conditions 2/ Temperature, TJ Device type Limits Min Unit Max MR1 / MR2 terminals. High level input voltage -55°C to +125°C 01 Low level input voltage -55°C to +125°C 01 +25°C 01 VOUT2 UV comparator positive going input threshold voltage of VOUT1 UV comparator -55°C to +125°C 01 80 % VO VOUT2 UV comparator hysteresis +25°C 01 3 % VO typical mV Pullup current source 2 V 0.7 9.5 typical V µA VOUT2 terminal. 86 % VO V VOUT2 UV comparator falling edge deglitch VSENSE2 decreasing below threshold +25°C 01 140 typical µs Peak output current 2 ms pulse width +25°C 01 3 typical A Discharge transistor current VOUT2 = 1.5 V +25°C 01 7.5 typical mA VOUT1 UV comparator positive going input threshold voltage of VOUT1 UV comparator -55°C to +125°C 01 80 % VO VOUT1 UV comparator hysteresis +25°C 01 3 % VO typical mV VOUT1 terminal. 86 % VO V VOUT1 UV comparator falling edge deglitch VSENSE1 decreasing below threshold +25°C 01 140 typical µs Dropout voltage 6/ IO = 1 A, VIN1 = 3.2 V +25°C 01 160 typical mV IO = 1 A, VIN1 = 3.2 V -55°C to +125°C 255 Peak output current 2 ms pulse width +25°C 01 1.2 typical A Discharge transistor current VOUT1 = 1.5 V +25°C 01 7.5 typical mA See footnotes at end of table. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06616 PAGE 7 TABLE I. Electrical performance characteristics – Continued. 1/ Test Symbol Conditions 2/ Temperature, TJ Device type Limits Unit Min Max 2.3 2.65 VIN1 / VIN2 terminal. UVLO threshold -55°C to +125°C 01 UVLO hysteresis +25°C 01 110 typical V mV 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ Unless otherwise specified, VIN1 or VIN2 = VOUTX(nom) + 1 V, IOUTX = 1 mA, EN = 0, COUT1 = 22 µF, and COUT2 = 47 µF. 3/ Minimum input operating voltage is 2.7 V or VO(typ) + 1 V, whichever is greater. Maximum input voltage = 6 V, minimum output current is 1 mA. 4/ IO = 1 mA to 1 A for regulator 1 and 1 mA to 2 A regulator 2. 5/ If VO < 1.8 V then VImax = 6 V, VImin = 2.7 V: Line regulation (mV) = ( % / V ) x ( VO ( VImax – 2.7 V ) / 100 ) x 1000 If VO > 2.5 V then VImax = 6 V, VImin = VO + 1 V: Line regulation (mV) = ( % / V ) x ( VO ( VImax – (VO + 1 V )) / 100 ) x 1000 6/ Input voltage ( VIN1 or VIN2 ) = VO(typ) – 100 mV. For the 1.5 V, 1.8 V, and 2.5 V regulators, the dropout voltage is limited by input voltage range. The 3.3 V regulator input voltage is set to 3.2 V to perform this test. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06616 PAGE 8 Case X FIGURE 1. Case outline. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06616 PAGE 9 Case X Dimensions Inches Symbol Millimeters Min Max Min Max A --- .047 --- 1.20 A1 .001 .005 0.05 0.15 b .007 .011 0.19 0.30 c .005 nominal 0.15 nominal D .303 .311 7.70 7.90 E .169 .177 4.30 4.50 E1 .244 .259 6.20 6.60 e L n .025 BSC .019 0.65 BSC .029 0.50 24 0.75 24 Notes: 1. Controlling dimensions are millimeter, inch dimensions are given for reference only. 2. Body dimensions do not include mold flash or protrusions. Mold flash and protrusion shall not exceed 0.15 mm (0.006 inch) per side. 3. This package is designed to be soldered to a thermal pad on the board. Refer to technical brief, power pad thermally enhanced package, manufacturer literature number SLMA002 for information regarding recommended board layout. This document is available from the manufacturer. 4. Falls within JEDEC MO-153. FIGURE 1. Case outline – Continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06616 PAGE 10 Device type 01 Case outline X Terminal number Terminal symbol 1 GND / HEATSINK 2 VIN1 3 VIN1 4 NC 5 MR2 6 MR1 7 EN 8 SEQ 9 GND 10 VIN2 11 VIN2 12 GND / HEATSINK 13 GND / HEATSINK 14 VOUT2 15 VOUT2 16 VSENSE2 / FB2 17 NC 18 RESET 19 PG1 20 NC 21 VSENSE1 / FB1 22 VOUT1 23 VOUT1 24 GND / HEATSINK FIGURE 2. Terminal connections. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06616 PAGE 11 Terminal symbol I/O EN I Description Active low enable. GND Regulator ground. GND / HEATSINK Ground / heatsink. MR1 I MR2 I NC Manual reset input 1, active low, pulled up internally. Manual reset input 2, active low, pulled up internally. No connection. Open drain output, low when VOUT1 voltage is less than 95 % of the nominal regulated voltage. Open drain output, SVS (power on reset) signal, active low. Power up sequence control: SEQ = high, VOUT2 powers up first; PG1 O RESET O SEQ I VIN1 I Input voltage of regulator 1. VIN2 I Input voltage of regulator 2. VOUT1 O Output voltage of regulator 1. VOUT2 O Output voltage of regulator 2. VSENSE2 I Regulator 2 output voltage sense. VSENSE1 I Regulator 1 output voltage sense. SEQ = low, VOUT1 powers up first, SEQ terminal pulled up internally. FIGURE 2. Terminal connections – Continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06616 PAGE 12 NOTES: 1. For most applications, VSENSE1 and VSENSE2 should be externally connected to VOUT as close as possible to the device. For other implementations, refer to SENSE terminal connection discussion in the application information section. 2. If the SEQ terminal is floating at the input, VOUT2 powers up first. FIGURE 3. Logic diagram. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06616 PAGE 13 NOTES: 1. 2. VRES is the minimum input voltage for a valid RESET . The symbol VRES is not currently listed within EIA or JEDEC standards for semiconductor symbology. VIT - Trip voltage is typically 5% lower than the output voltage (95% VO) VIT- to VIT+ is the hysteresis voltage. FIGURE 4. Timing waveforms. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06616 PAGE 14 Notes: 1. VPG is the minimum input voltage for a valid PG. The symbol VPG is not currently listed within EIA or JEDEC standards for semiconductor symbology. 2. VIT- Trip voltage is typically 5% lower than the output voltage (95% VO) VIT– to VIT+ is the hysteresis voltage. FIGURE 4. Timing waveforms – Continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06616 PAGE 15 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturer’s standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturer’s data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. DLA Land and Maritime maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Regulator 1 VO (V) Regulator 2 VO (V) Vendor part number V62/06616-01XE 01295 3.3 V 1.2 V TPS70345MPWPREP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code 01295 DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO Source of supply Texas Instruments, Inc. Semiconductor Group 8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06616 PAGE 16