V6203635 VID

REVISIONS
LTR
DESCRIPTION
A
Add device type 11. Update boilerplate. Editorial
change throughout. – phn
B
Update boilerplate paragraphs to current
requirements. - phn
DATE
06-02-22
APPROVED
Thomas M. Hess
12-02-14
Thomas M. Hess
CURRENT DESIGN ACTIVITY CAGE CODE 16236
HAS CHANGED NAMES TO:
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
Prepared in accordance with ASME Y14.24
Vendor item drawing
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MICROCIRCUIT, LINEAR, FAST-TRANSIENTRESPONSE 2-A LOW DROPOUT VOLTAGE
REGULATORS, MONOLITHIC SILICON
Thomas M. Hess
REV
B
7
TITLE
Phu H. Nguyen
APPROVED BY
A
B
6
DEFENSE SUPPLY CENTER, COLUMBUS
COLUMBUS, OHIO
Phu H. Nguyen
CHECKED BY
SIZE
B
5
CODE IDENT. NO.
DWG NO.
V62/03635
16236
B
PAGE
1
OF
12
5962-V028-12
1. SCOPE
1.1 Scope. This drawing documents the general requirements of a fast-transient-response 2-A low dropout voltage regulators, with
an operating temperature range of -40°C to +125°C and of -55°C to +125°C.
1.2 Vendor Item Drawing Administrative Control Number. The manufacturer’s PIN is the item of identification. The vendor item
drawing establishes an administrative control number for identifying the item on the engineering documentation:
V62/03635
01
X
E
Drawing
number
Device type
(See 1.2.1)
Case outline
(See 1.2.2)
Lead finish
(See 1.2.3)
1.2.1 Device type(s). 1/
Device
Type
Generic
Output
voltage
Circuit function
01
TPS75201-EP
+1.5 V to +5.0 V
Fast-transient-response 2-A low-dropout voltage regulator with RESET .
02
TPS75215-EP
+1.5 V
Fast-transient-response 2-A low-dropout voltage regulator with RESET .
03
TPS75218-EP
+1.8 V
Fast-transient-response 2-A low-dropout voltage regulator with RESET .
04
TPS75225-EP
+2.5 V
Fast-transient-response 2-A low-dropout voltage regulator with RESET .
05
06
07
08
09
10
TPS75233-EP
TPS75301-EP
TPS75315-EP
TPS75318-EP
TPS75325-EP
TPS75333-EP
+3.3 V
+1.5 V to +5.0 V
+1.5 V
+1.8 V
+2.5 V
+3.3 V
Fast-transient-response 2-A low-dropout voltage regulator with RESET .
Fast-transient-response 2-A low-dropout voltage regulator with power good.
Fast-transient-response 2-A low-dropout voltage regulator with power good.
Fast-transient-response 2-A low-dropout voltage regulator with power good.
Fast-transient-response 2-A low-dropout voltage regulator with power good.
Fast-transient-response 2-A low-dropout voltage regulator with power good.
11
TPS75201M-EP
+1.5 V to +5.0 V
Fast-transient-response 2-A low-dropout voltage regulator with RESET .
1.2.2 Case outline(s). The case outlines are as specified herein.
Outline letter
Number of pins
X
20
JEDEC PUB 95
Package style
JEDEC MO-153
Plastic small outline
1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer:
Finish designator
A
B
C
D
E
Z
DEFENSE SUPPLY CENTER, COLUMBUS
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Material
Hot solder dip
Tin-lead plate
Gold plate
Palladium
Gold flash palladium
Other
SIZE
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CODE IDENT NO.
16236
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V62/03635
PAGE
2
1.3 Absolute maximum ratings.
2/
Input voltage range (VI) ......................................................................................... -0.3 V to +5.5 V 3/
Voltage range at EN ............................................................................................. -0.3 V to +16.5 V
Maximum RESET voltage (device type 01-05) ...................................................
Maximum PG voltage (device type 06-10) ...........................................................
Peak output current ..............................................................................................
Output voltage (VO) (OUT, FB) ..............................................................................
Continuous total power dissipation........................................................................
Operating virtual junction temperature range (TJ):
Device type 01 to 10 .....................................................................................
Device type 11 ..............................................................................................
Storage temperature range (TSTG).........................................................................
ESD rating, (HBM) ................................................................................................
+16.5 V
+16.5 V
Internally limited
+5.5 V
See dissipation rating tables
-40°C to +125°C
-55°C to +125°C
-65°C to +150°C
2 kV
Dissipation Rating Table – Ambient Temperatures
Case
Air Flow
TA < 25°C
Derating Factor
TA = 70°C
TA = 85°C
outline
(CFM)
Power rating
Above TA = 25°C
Power Rating
Power Rating
0
2.9 W
23.5 mW/°C
1.9 W
1.5 W
300
4.3 W
34.6 mW/°C
2.8 W
2.2 W
0
3.0 W
23.8 mW/°C
1.9 W
1.5 W
300
7.2 W
57.9 mW/°C
4.6 W
3.8 W
X 4/
X 5/
1.4 Recommended operating conditions.
Input voltage range (VI) .........................................................................................
Output voltage (VO) ...............................................................................................
Output current (IO) .................................................................................................
Operating virtual junction temperature range (TJ):
Device type 01 to 10 .....................................................................................
Device type 11 ..............................................................................................
+2.7 V to +5.0 V
+1.5 V to +5.0 V
0 to 2.0 A
6/
-40°C to +125°C
-55°C to +125°C
1/
2/
Users are cautioned to review the manufacturers data manual for additional user information relating to these devices.
Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those indicated under
“recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may
affect device reliability.
3/ All voltage values are with respect to network terminal ground.
4/ This parameter is measured with the recommended copper heat sink pattern on a 1-layer PCB, 5 in x 5 in PCB, 1 oz. copper,
2 in x 2 in coverage.
5/ This parameter is measured with the recommended copper heat sink pattern on a 8-layer PCB, 1.5 in x 2 in PCB, 1 oz.
2
2
copper with layer 1, 2, 4, 5, 7, and 8 at 5% coverage (0.9 in ) and layers 3 and 6 at 100% coverage (6 in ). For more
information, refer to the manufacturer technical brief SLMA002.
6/ To calculate the minimum input voltage for your maximum output current, use the following equation:
VI(min) = VO(max) + VDO(max load)
DEFENSE SUPPLY CENTER, COLUMBUS
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SIZE
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CODE IDENT NO.
16236
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2. APPLICABLE DOCUMENTS
JEDEC – SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC)
JEDEC PUB 95
–
Registered and Standard Outlines for Semiconductor Devices
(Copies of these documents are available online at http:/www.jedec.org or from JEDEC – Solid State Technology Association, 3103
North 10th Street, Suite 240–S, Arlington, VA 22201.)
3. REQUIREMENTS
3.1 Marking. Parts shall be permanently and legibly marked with the manufacturer’s part number as shown in 6.3 herein and as
follows:
A.
B.
C.
Manufacturer’s name, CAGE code, or logo
Pin 1 identifier
ESDS identification (optional)
3.2 Unit container. The unit container shall be marked with the manufacturer’s part number and with items A and C (if applicable)
above.
3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are
as specified in 1.3, 1.4, and table I herein.
3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein.
3.5 Diagrams.
3.5.1 Case outline(s). The case outline(s) shall be as shown in 1.2.2 and figure 1.
3.5.2 Terminal connections. The terminal connections shall be as specified on figure 2.
3.5.3 Block diagrams. The block diagrams shall be as specified on figure 3.
3.5.4 Timing diagram. The timing diagram shall be as specified on figure 4.
DEFENSE SUPPLY CENTER, COLUMBUS
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TABLE I. Electrical performance characteristics. 1/
Test
Test conditions
VI = VO(Typ) + 1 V
Device
type
01, 06,
11
1.5 V ≤ VO ≤ 5.0 V
2.7 V < VIN < 5.0 V,
TJ = 25°C
04, 09
TJ = 25°C
05, 10
3.5 V ≤ VIN ≤ 5.0 V
4.3 V ≤ VIN ≤ 5.0 V
TJ = 25°C, 3/
All
Output voltage line regulation (∆VO/VO)
4/
5/
VO + 1 V < VI ≤ 5.0 V,
3/
2.550
3.366
125
All
TJ = 25°C
0.01 TYP
VO + 1 V < VI ≤ 5.0 V
VO = 1.5 V,
CO = 100 µF,
TJ = 25°C
VO = 0 V
FB input current
EN = VI
FB = 1.5 V
All
1 TYP
mV
04, 09,
11
60 TYP
µVrms
All
Thermal shutdown junction temperature
EN = VI ,
TJ = 25°C,
4.5
150 TYP
°C
All
1 TYP
µA
10
-1.0
2.0
V
0.7
f = 100 Hz, CO = 100 µF,
TJ = 25°C, IO = 2.0 A
IO(RESET) = 300 µA,
Trip threshold voltage
VO decreasing
Hysteresis voltage
Measured at VO
Output low voltage
VI = 2.7 V,
Leakage current
V(RESET) = 5 V
V
60 TYP
dB
4/
V(RESET) ≤ 0.8V
01-05,
11
RESET
Reset
µA
1.0
Low level enable input voltage
Minimum input voltage for valid
A
All
01, 06,
11
All
High level enable input voltage
Power supply ripple rejection 5/
%/V
0.1
BW = 300 Hz to 50 kHz,
Standby current
µA
75 TYP
All
6/
Output current limit
1.836
3.3 TYP
3.234
Quiescent current (GND current)
4/
1.530
2.5 TYP
2.450
4.3 V < VIN < 5.0 V,
1.02 VO
1.8 TYP
1.764
TJ = 25°C
V
1.5 TYP
03, 08
TJ = 25°C
3.5 V < VIN < 5.0 V,
Output noise voltage
0.98 VO
1.470
2.8 V ≤ VIN ≤ 5.0 V
Load regulation
Max
VO TYP
02, 07
2.7 V ≤ VIN ≤ 5.0 V
2.8 V < VIN < 5.0 V,
Unit
Min
IO = 1 mA, EN = 0 V
CO = 47 µF
-40°C ≤ TJ ≤ 125°C 2/
-55°C ≤ TJ ≤ 125°C 3
unless otherwise specified
1.5 V ≤ VO ≤ 5.0 V,
TJ = 25°C
Output voltage
4/ 6/
Limits
1.3
V
98
%VO
92
0.5 TYP
IO(RESET) = 1 mA
RESET time out delay
%VO
0.4
V
1.0
µA
100 TYP
ms
See notes at end of table.
DEFENSE SUPPLY CENTER, COLUMBUS
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CODE IDENT NO.
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TABLE I. Electrical performance characteristics - Continued. 1/
Test
Test conditions
VI = VO(Typ) + 1 V
Device
type
Min
IO = 1 mA, EN = 0 V
CO = 47 µF
-40°C ≤ TJ ≤ 125°C 2/
-55°C ≤ TJ ≤ 125°C 3
unless otherwise specified
PG
Minimum input voltage for
valid PG
IO(PG) = 300 µA ,
Trip threshold voltage
VO decreasing
Hysteresis voltage
Measured at VO
Output low voltage
IO(PG) = 1 mA
Leakage current
V(PG) = 5 V
Input current ( EN )
Limits
V(PG) ≤ 0.8 V
06 - 10
80
All
EN = VI
High level EN input voltage
All
Low level EN input voltage
All
7/
All
IO = 2.0 A, VI = 3.2 V, TJ = 25°C
IO = 2.0 A, VI = 3.2 V
1/
2/
3/
4/
5/
6/
7/
Max
1.3
V
86
%VO
0.5 TYP
EN = 0 V
Dropout voltage (3.3 V Output)
Unit
%VO
0.4
V
1
µA
-1
1
µA
-1
1
µA
2.0
V
0.7
210 TYP
V
mV
400
Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the
specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not
necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or
design.
For device type 01 to 10
For device type 11.
Minimum IN operating voltage is 2.7 V or VO(Typ) + 1V, whichever is greater. Maximum IN voltage 5.0 V.
If VO ≤ 1.8 V then Vimin = 2.7 V, VImax = 5.0 V:
V (V
− 2 .7 V )
Line Reg. (mV) = (%/V) x O Im ax
x 1000
100
If VO ≥ 2.5 V then VImin = VO + 1 V, Vimax = 5.0 V.
V (V
− (VO + 1V ))
x 1000
Line Reg. (mV) = (%/V) x O Im ax
100
IO = 1 mA to 2.0 A.
IN voltage equals VO(Typ) – 100 mV; Device type 02, 03, 04, 06, 07 and 08 dropout voltage limited by input voltage range limitations
( i.e., device type 05 and 10 input voltage needs to drop to 3.2 V for purpose of this test).
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Case X
Notes:
1. All linear dimensions are in millimeters.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusions.
4. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane.
This pad is electrically and thermally connected to the backside of the die and possibly selected leads.
5. Falls within JEDEC MO-153.
FIGURE 1. Case outline.
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Case X
Millimeters
Symbol
Min
Max
A
1.20
A1
0.05
0.15
b
0.19
0.30
c
0.15 NOM
D
6.40
6.60
E
4.30
4.500
E1
6.20
6.60
e
0.65 TYP
L
0.50
0.75
FIGURE 1. Case outline - Continued.
1/
Terminal
number
Terminal
symbol
Terminal
number
Terminal symbol
1
GND/HEATSINK
11
GND/HEATSINK
2
NC
12
NC
3
IN
13
NC
4
IN
14
NC
5
EN
15
NC
6
RESET or PG 1/
16
NC
7
FB/SENSE
17
GND
8
OUTPUT
18
NC
9
OUTPUT
19
NC
10
GND/HEASINK
20
GND/HEATSINK
PG is on the device types: 06-10 and RESET is on the device type 01-05.
NC: No internal connection
FIGURE 2. Terminal connections.
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Functional block diagram – adjustable version
Functional block diagram – fixed voltage version
FIGURE 3. Block diagrams.
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RESET timing diagram
NOTES:
1.
2.
Vres is the minimum input voltage for a valid RESET . The symbol Vres is not currently listed within EIA or JEDEC standards
for semiconductor symbology.
VIT - Trip voltage is typically 5% lower than the output voltage (95% VO) VIT- to VIT+ is the hysteresis voltage.
FIGURE 4. Timing diagram.
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PG timing diagram
Notes:
1. VPG is the minimum input voltage for a valid PG. The symbol VPG is not currently listed within EIA or JEDEC standards for
semiconductor symbology.
2. VIT- Trip voltage is typically 17 % lower than the output voltage (83% VO) VIT– to VIT+ is the hysteresis voltage.
FIGURE 4. Timing diagram - Continued.
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4
VERIFICATION
4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as
indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices,
classification, packaging, and labeling of moisture sensitive devices, as applicable.
5. PREPARATION FOR DELIVERY
5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturer’s standard commercial
practices for electrostatic discharge sensitive devices.
6. NOTES
6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum.
6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturer’s data book.
The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided.
6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee
of present or continued availability as a source of supply for the item.
Vendor item drawing
administrative control number 1/
V62/03635-01XE
V62/03635-02XE
V62/03635-03XE
V62/03635-04XE
V62/03635-05XE
V62/03635-06XE
V62/03635-07XE
V62/03635-08XE
V62/03635-09XE
V62/03635-10XE
V62/03635-11XE
1/
2/
3/
4/
Device manufacturer
CAGE code
01295
01295
01295
01295
01295
01295
01295
01295
01295
01295
01295
Vendor part number
2/
TPS75201QPWPEP 3/
TPS75215QPWPEP
TPS75218QPWPEP
TPS75225QPWPEP
TPS75233QPWPEP
TPS75301QPWPEP
TPS75315QPWPEP
TPS75318QPWPEP
TPS75325QPWPEP
TPS75333QPWPEP
TPS75201MPWPREP
The vendor item drawing establishes an administrative control number for identifying the
item on the engineering documentation.
The PWP package is available taped and reeled. Add an R suffix to the device type (e.g.,
TPS75201QPWPREP) to indicate tape and reel.
This device is programmable using an external resistor divider (see manufacturer
application information).
This device is not available from an approved source of supplied.
CAGE code
01295
DEFENSE SUPPLY CENTER, COLUMBUS
COLUMBUS, OHIO
Source of supply
Texas Instruments, Inc.
Semiconductor Group
8505 Forest Lane
P.O. Box 660199
Dallas, TX 75243
Point of contact: U.S. Highway 75 South
P.O. Box 84, M/S 853
Sherman, TX 75090-9493
SIZE
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CODE IDENT NO.
16236
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