SMPS MOSFET PD - 95471 IRFB16N60LPbF HEXFET® Power MOSFET Applications • Zero Voltage Switching SMPS • Telecom and Server Power Supplies • Uninterruptible Power Supplies • Motor Control applications • Lead-Free VDSS RDS(on) typ. Trr typ. ID 385mΩ 600V 130ns Features and Benefits • SuperFast body diode eliminates the need for external diodes in ZVS applications. • Lower Gate charge results in simpler drive requirements. • Enhanced dv/dt capabilities offer improved ruggedness. • Higher Gate voltage threshold offers improved noise immunity . 16A TO-220AB Absolute Maximum Ratings Parameter Max. Units ID @ TC = 25°C Continuous Drain Current, VGS @ 10V ID @ TC = 100°C Continuous Drain Current, VGS @ 10V Pulsed Drain Current IDM 16 PD @TC = 25°C Power Dissipation 310 W 2.5 ±30 W/°C V 10 -55 to + 150 V/ns 10 c VGS Linear Derating Factor Gate-to-Source Voltage d dv/dt TJ Peak Diode Recovery dv/dt TSTG Storage Temperature Range Operating Junction and °C Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Mounting torque, 6-32 or M3 screw 1.1(10) Diode Characteristics Symbol Parameter A 60 Min. Typ. Max. Units N•m (lbf•in) Conditions IS Continuous Source Current ––– ––– 16 ISM (Body Diode) Pulsed Source Current ––– ––– 60 showing the integral reverse ––– 1.5 V p-n junction diode. TJ = 25°C, IS = 16A, VGS = 0V ns c MOSFET symbol A (Body Diode) VSD Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge IRRM Reverse Recovery Current ton Forward Turn-On Time www.irf.com ––– ––– 130 200 ––– 240 360 ––– 450 670 ––– 1080 1620 ––– 5.8 8.7 D G TJ = 25°C, IF = 16A TJ = 125°C, di/dt = 100A/µs f S f f f nC TJ = 25°C, IS = 16A, VGS = 0V TJ = 125°C, di/dt = 100A/µs A TJ = 25°C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) 1 7/7/04 IRFB16N60LPbF Static @ TJ = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units V(BR)DSS ∆V(BR)DSS/∆TJ Drain-to-Source Breakdown Voltage RDS(on) ––– Breakdown Voltage Temp. Coefficient ––– 0.39 ––– V/°C Reference to 25°C, ID = 1mA Static Drain-to-Source On-Resistance ––– 385 460 VGS(th) Gate Threshold Voltage 3.0 ––– 5.0 mΩ V IDSS Drain-to-Source Leakage Current ––– ––– 50 µA VDS = 600V, VGS = 0V ––– ––– 2.0 mA VDS = 480V, VGS = 0V, TJ = 125°C Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 30V Gate-to-Source Reverse Leakage ––– ––– -100 Internal Gate Resistance ––– 0.79 ––– Ω f = 1MHz, open drain IGSS RG ––– V Conditions 600 VGS = 0V, ID = 250µA VGS = 10V, ID = 9.0A f VDS = VGS, ID = 250µA VGS = -30V Dynamic @ TJ = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units 8.3 ––– ––– ––– ––– 100 ––– ––– 30 S Conditions gfs Qg Forward Transconductance VDS = 50V, ID = 9.0A Total Gate Charge Qgs Gate-to-Source Charge Qgd Gate-to-Drain ("Miller") Charge ––– ––– 46 VGS = 10V, See Fig. 7 & 15 td(on) Turn-On Delay Time ––– 20 ––– VDD = 300V tr Rise Time ––– 44 ––– td(off) Turn-Off Delay Time ––– 28 ––– RG = 1.8Ω tf Fall Time ––– 5.5 ––– VGS = 10V, See Fig. 11a & 11b Ciss Input Capacitance ––– 2720 ––– VGS = 0V Coss Output Capacitance ––– 260 ––– Crss Reverse Transfer Capacitance ––– 20 ––– Coss eff. Effective Output Capacitance ––– 120 ––– Coss eff. (ER) Effective Output Capacitance ––– 100 ––– ID = 16A nC ns VDS = 480V f ID = 16A f VDS = 25V pF ƒ = 1.0MHz, See Fig. 5 VGS = 0V,VDS = 0V to 480V g (Energy Related) Avalanche Characteristics Symbol EAS Parameter Single Pulse Avalanche Energy IAR Avalanche Current EAR Repetitive Avalanche Energy c d c Typ. ––– Max. 310 Units mJ ––– 16 A ––– 31 mJ Thermal Resistance Typ. Max. Units RθJC Symbol Junction-to-Case Parameter ––– 0.4 °C/W RθJA Junction-to-Ambient ––– 62 Notes: Repetitive rating; pulse width limited by max. junction temperature. (See Fig. 11) Starting TJ = 25°C, L = 2.5mH, RG = 25Ω, IAS = 16A, dv/dt = 10V/ns. (See Figure 12a) ISD ≤ 16A, di/dt ≤ 340A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C. 2 Pulse width ≤ 300µs; duty cycle ≤ 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% V DSS . Coss eff.(ER) is a fixed capacitance that stores the same energy as Coss while VDS is rising from 0 to 80% V DSS . www.irf.com IRFB16N60LPbF 1000 100 100 10 BOTTOM VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V 5.0V TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP 1 5.0V 0.1 0.01 10 BOTTOM 5.0V 1 0.1 20µs PULSE WIDTH Tj = 150°C 20µs PULSE WIDTH Tj = 25°C 0.001 0.01 0.1 1 10 100 0.1 VDS, Drain-to-Source Voltage (V) 1 10 100 VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 3.0 100 T J = 150°C 10 1 T J = 25°C 0.1 VDS = 50V 20µs PULSE WIDTH 0.01 ID = 15A 2.5 VGS = 10V 2.0 (Normalized) RDS(on) , Drain-to-Source On Resistance ID, Drain-to-Source Current (Α) VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V 5.0V 1.5 1.0 0.5 0.0 4 6 8 10 12 14 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 16 -60 -40 -20 0 20 40 60 80 100 120 140 160 T J , Junction Temperature (°C) Fig 4. Normalized On-Resistance vs. Temperature 3 IRFB16N60LPbF 100000 10000 20 Coss = Cds + Cgd Ciss 1000 Energy (µJ) C, Capacitance(pF) 25 VGS = 0V, f = 1 MHZ Ciss = C gs + Cgd, C ds SHORTED Crss = Cgd Coss 100 Crss 15 10 5 10 0 1 1 10 100 0 1000 VDS, Drain-to-Source Voltage (V) 300 400 500 600 700 Fig 6. Typ. Output Capacitance Stored Energy vs. VDS 12.0 100.00 ID= 15A VDS= 480V VDS= 300V 10.0 ISD, Reverse Drain Current (A) VGS , Gate-to-Source Voltage (V) 200 VDS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage VDS= 120V 8.0 6.0 4.0 2.0 0.0 T J = 150°C 10.00 T J = 25°C 1.00 VGS = 0V 0.10 0 10 20 30 40 50 60 Q G Total Gate Charge (nC) Fig 7. Typical Gate Charge vs. Gate-to-Source Voltage 4 100 70 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VSD, Source-to-Drain Voltage (V) Fig 8. Typical Source-Drain Diode Forward Voltage www.irf.com IRFB16N60LPbF 18 ID, Drain-to-Source Current (A) 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) 16 14 10 ID, Drain Current (A) 100 100µsec 1msec 1 Tc = 25°C Tj = 150°C Single Pulse 12 10 8 6 4 2 10msec 0 0.1 1 10 100 1000 10000 25 VDS, Drain-to-Source Voltage (V) VGS RG RD 100 125 150 Fig 10. Maximum Drain Current vs. Case Temperature VDS 90% D.U.T. + -VDD 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % Fig 11a. Switching Time Test Circuit www.irf.com 75 T C , Case Temperature (°C) Fig 9. Maximum Safe Operating Area VDS 50 10% VGS td(on) tr t d(off) tf Fig 11b. Switching Time Waveforms 5 IRFB16N60LPbF Thermal Response ( Z thJC ) 1 D = 0.50 0.1 0.20 0.10 0.05 P DM 0.02 0.01 0.01 t1 t2 SINGLE PULSE ( THERMAL RESPONSE ) Notes: 1. Duty factor D = 2. Peak T t1/ t 2 J = P DM x Z thJC +T C 0.001 1E-006 1E-005 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 12. Maximum Effective Transient Thermal Impedance, Junction-to-Case VGS(th) Gate threshold Voltage (V) 5.0 4.5 4.0 3.5 ID = 250µA 3.0 2.5 2.0 -75 -50 -25 0 25 50 75 100 125 150 175 T J , Temperature ( °C ) Fig 13. Threshold Voltage vs. Temperature 6 www.irf.com 1 IRFB16N60LPbF EAS , Single Pulse Avalanche Energy (mJ) 600 ID 7.2A 10A BOTTOM 16A TOP 500 400 300 200 100 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) Fig 14a. Maximum Avalanche Energy vs. Drain Current 15V V(BR)DSS DRIVER L VDS D.U.T RG + - VDD IAS 20V tp tp A 0.01Ω I AS Fig 14b. Unclamped Inductive Test Circuit Fig 14c. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. QG 50KΩ 12V VGS V .2µF .3µF D.U.T. QGS + V - DS QGD VG VGS 3mA IG ID Current Sampling Resistors Fig 15a. Gate Charge Test Circuit www.irf.com Charge Fig 15b. Basic Gate Charge Waveform 7 IRFB16N60LPbF Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + RG • • • • Driver Gate Drive P.W. + dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Period D= - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 16. For N-Channel HEXFET® Power MOSFETs 8 www.irf.com IRFB16N60LPbF TO-220AB Package Outline Dimensions are shown in millimeters (inches) 10.54 (.415) 10.29 (.405) 2.87 (.113) 2.62 (.103) -B- 3.78 (.149) 3.54 (.139) 4.69 (.185) 4.20 (.165) -A- 1.32 (.052) 1.22 (.048) 6.47 (.255) 6.10 (.240) 4 15.24 (.600) 14.84 (.584) LEAD ASSIGNMENTS 1.15 (.045) MIN 1 2 3 4- DRAIN 14.09 (.555) 13.47 (.530) 4- COLLECTOR 4.06 (.160) 3.55 (.140) 3X 3X LEAD ASSIGNMENTS IGBTs, CoPACK 1 - GATE 2 - DRAIN 1- GATE 1- GATE 3 - SOURCE 2- COLLECTOR 2- DRAIN 3- SOURCE 3- EMITTER 4 - DRAIN HEXFET 1.40 (.055) 1.15 (.045) 0.93 (.037) 0.69 (.027) 0.36 (.014) 3X M B A M 0.55 (.022) 0.46 (.018) 2.92 (.115) 2.64 (.104) 2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. TO-220AB Part Marking Information E XAMPL E : T HIS IS AN IR F 1010 LOT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y LINE "C" Note: "P" in assembly line position indicates "Lead-Free" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE PAR T NU MB E R DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C TO-220AB package is not recommended for Surface Mount Application. Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.7/04 www.irf.com 9