INTEGRATED CIRCUITS DATA SHEET TEA1081 Supply circuit with power-down for telephone set peripherals Product specification Supersedes data of February 1988 File under Integrated Circuits, IC03 Philips Semiconductors September 1994 Philips Semiconductors Product specification Supply circuit with power-down for telephone set peripherals TEA1081 FEATURES GENERAL DESCRIPTION • High input impedance for audio signals The TEA1081 is an integrated circuit for use in line-powered telephone sets to supply peripheral circuits for extended dialling and/or loudspeaker facilities. • Low DC series resistance • High output current The IC uses a part of the surplus line current normally drawn by the voltage regulator of the speech/transmission circuit. A power-down function isolates the IC from its load and reduces the input current. • Large audio signal handling capability • Low distortion • Two modes of operation: – output voltage that follows the DC line voltage – regulated output voltage • Power-down input • Low number of external components. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VLN operating DC line voltage 2.5 − 12.0 V VO DC output voltage 2.0 − 10.0 V − 0.5 − V − 20 − Ω TEA1081 − − 30 mA TEA1081T − − 20 mA ∆VLN-O voltage drop from line to output RS internal series resistance IO output current (pin 7) IO = 0 mA VLN = 4 V VLN(rms) AC line voltage (RMS value) VLN = 4 V; IO = 15 mA; THD = 2% − 1.5 − V IINT internal supply current VLN = 4 V; IO = 0 mA; PD = LOW; VSP = VO − 0.8 1.4 mA Tamb operating ambient temperature −25 − +70 °C ORDERING INFORMATION PACKAGE TYPE NUMBER NAME DESCRIPTION VERSION TEA1081 DIP8 plastic dual in-line package; 8 leads (300 mil) SOT97-1 TEA1081T SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 September 1994 2 Philips Semiconductors Product specification Supply circuit with power-down for telephone set peripherals TEA1081 BLOCK DIAGRAM handbook, full pagewidth 1 RS 7 TR1 LN QS TR2 0.5 V A2 5 IF 8 A1 POWERDOWN 4 SP PD 3 AD REFERENCE CURRENT A3 1/2 V O 6 VA 2 VN TEA1081 MLC166 Fig.1 Block diagram. PINNING SYMBOL PIN DESCRIPTION page LN 1 positive line terminal VN 2 negative line terminal AD 3 amplifier decoupling PD 4 power-down input IF 5 low-pass filter input VA 6 output voltage adjustment QS 7 power supply output SP 8 supply input; power-down circuit September 1994 LN 1 VN 2 8 SP 7 QS TEA1081 AD 3 6 VA PD 4 5 IF MLC167 3 Fig.2 Pin configuration. Philips Semiconductors Product specification Supply circuit with power-down for telephone set peripherals TEA1081 The output voltage follows the line voltage and is expressed by formula (2); see also Table 2. V O = V LN – ( I 1 × R S + 0.5 ) ( V ) FUNCTIONAL DESCRIPTION The TEA1081 is a supply interface between telephone line and peripheral devices in the telephone set. The high input impedance of the circuit allows direct connection to the telephone line (via a diode bridge). An inductor function is obtained by amplifier A1, resistor RS (see Fig.1) and an external low-pass RC filter. (2) Table 2 Explanation of formula (2). SYMBOL DESCRIPTION VLN line voltage I1 input current RS internal series resistance Under the control of amplifier A2, transistor TR1 supplies peripheral devices and transistor TR2 minimizes line signal distortion by momentarily diverting input current to ground whenever the instantaneous value of the line voltage drops below the output voltage. REGULATED OUTPUT VOLTAGE (SEE FIG.4) Internal circuits are biased by a temperature and line voltage compensated reference current source. The circuit operates in this mode when an external resistor (RV) is connected between QS and VA (see Fig.6). The power-down circuit isolates the supply circuit from external circuitry. The output voltage is held constant at VO = 2 × I6 × RV (V) as soon as the line voltage VLN > (2 × I6 × RV + I1 × RS + 0.5) (V) Line terminals: LN and VN (pins 1 and 2) The control current I6 is typically 20 µA. The input terminals LN and VN can be connected directly to the line. The minimum DC line voltage required at the input is expressed by formula (1); see also Table 1. (1) V LN = I 1 × R S + V LNmin + V LN ( P ) ( V ) MLC168 10 handbook, halfpage VO (V) Table 1 Explanation of formula (1). SYMBOL 8 DESCRIPTION I1 input current RS internal series resistance VLNmin minimum instantaneous line voltage (1.4 V at IO = 5 mA) VLN(P) required peak level of AC line voltage (1) (2) 6 (3) 4 2 The internal current (IINT) at IO = 0 mA is typically 0.8 mA at VLN = 4 V and reaches a maximum of 1.4 mA at VLN = 12 V. 0 0 2 4 6 8 10 VLN (V) Supply terminals: QS and VA (pins 7 and 6) Application without RV. (1) I1 = 5 mA. (2) I1 = 20 mA. (3) I1 = 30 mA; not valid for TEA1081T. Peripheral devices are supplied from QS (pin 7). Two modes of output voltage regulation are available. OUTPUT VOLTAGE FOLLOWS LINE VOLTAGE (SEE FIG.3) The TEA1081 operates in this mode when there is no external resistor (RV) between QS and VA (see Fig.6). September 1994 Fig.3 Output voltage as a function of line voltage. 4 Philips Semiconductors Product specification Supply circuit with power-down for telephone set peripherals TEA1081 Input current at VLN(rms) = 1 V and without RV approximates to: MLC169 6 handbook, halfpage I1 = IINT + 2 × IO (mA) VO The maximum supply current (within the specified output current limits) available for peripheral devices is shown by: (V) RV = 100 kΩ 4 I LINEmin – I LNmin – I INT IOmax = ----------------------------------------------------------2 (1) 75 kΩ (2) Where: (3) 50 kΩ 2 ILINEmin is the minimum line current of the telephone set; ILNmin is the specified minimum input current of the speech/transmission circuit. Input low-pass filter: IF (pin 5) 0 0 2 4 6 8 10 VLN (V) The input impedance between LN and VN at audio frequencies is determined by the filter elements CL (between pins 1 and 5), RL (between pins 5 and 7) and the internal resistor RS (typical value 20 Ω). RV connected between QS and VA. (1) I1 = 5 mA. (2) I1 = 20 mA. (3) I1 = 30 mA; not valid for TEA1081T. At audio frequencies the TEA1081 behaves as an inductor of the value LI = CL × RL × RS (H). The typical value of LI at CL = 2.2 µF and RL = 100 kΩ is 4.4 H. Fig.4 Output voltage as a function of line voltage. Amplifier decoupling: AD (pin 3) Input and output currents I1 and IO (pins 1 and 7) To ensure stability, a 68 pF decoupling capacitor is required between AD (pin 3) and LN (pin 1). If IOmin < 1.5 mA, a 47 pF capacitor has to be added between AD (pin 3) and VA (pin 6). The maximum available current into pin 1 (I1) is determined by: • The minimum line current (ILINEmin) that is available for the telephone set Power-down inputs: PD and SP (pins 4 and 8) • The specified minimum input current (ILNmin) for the speech/transmission circuit. During pulse dialling or register recall, or if the input current to pin 1 is insufficient to maintain the output current, the supply to peripheral devices can be switched off by activating the PD input at pin 4. With PD = HIGH, the input current is reduced to 40 µA (typ.) at VLN = 4 V and the internal circuits are isolated from the load at QS (pin 7). That is I1max = ILINEmin − ILNmin. At VLN(rms) < 150 mV, the input current I1 is approximately: I1 = IINT + k × IO (mA) Where: The power-down circuit is supplied via the SP input (pin 8). SP can be wired to QS in conditions where VO > VSPmin during line interruptions. When VO < VSPmin, SP should be wired to an external supply point (e.g. to VCC of the TEA1060 family circuit). IINT = internal supply current (0.8 mA at VLN = 4 V); k = correction factor (k < 1.1 for the specified output current range). With large line signals the instantaneous line voltage may drop below VO + 0.4 V. Normally (when VLN > VO + 0.4 V), instantaneous current flows from LN to QS (pin 1 to pin 7) to the output load. When power-down is not required, the PD and SP inputs can be left open-circuit. When VLN < VO + 0.4 V, the instantaneous current is diverted to pin 2 to prevent distortion of the line signal. September 1994 5 Philips Semiconductors Product specification Supply circuit with power-down for telephone set peripherals TEA1081 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VLN PARAMETER CONDITIONS MIN. MAX. UNIT continuous − 12 V during switch-on or line interruptions − 12.5 V 12 Ω resistor in series with pin 1 − 28 V VVN − 0.5 VLN + 0.5 V TEA1081 − 120 mA TEA1081T − 80 mA −1 +1 mA positive line voltage VLN(RM) repetitive peak line voltage for a 1 ms pulse per 5 s VI input voltage (all other terminals) I1 DC input current II input current (all other terminals) Ptot total power dissipation Tamb operating ambient temperature −25 Tstg storage temperature Tj junction temperature see Fig.5 +70 °C −40 +125 °C − +125 °C THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER VALUE UNIT TEA1081 120 K/W TEA1081T (mounted on a printed-circuit board of 50 × 50 × 1.5 mm) 260 K/W thermal resistance from junction to ambient in free air MLC170 800 handbook, halfpage Ptot (mW) (1) 600 400 (2) 200 0 0 20 40 60 80 100 120 o Tamb ( C) (1) TEA1081. (2) TEA1081T. Fig.5 Power derating curves. September 1994 6 Philips Semiconductors Product specification Supply circuit with power-down for telephone set peripherals TEA1081 CHARACTERISTICS VLN = 4 V; VLN(rms) = 100 mV; IO = 5 mA; f = 300 to 3400 Hz; RL = 100 kΩ; CL = 2.2 µF; RV = 75 kΩ; Tamb = 25 °C; unless otherwise specified; see Fig.6. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT − 12.0 V VLN operating DC line voltage 2.5 VLNmin minimum instantaneous line voltage − − 1.4 V VLNmax maximum instantaneous line voltage 12.0 − − V − 5.8 − mA Characteristics with RV = 75 kΩ connected between pins 6 and 7 and CL = 10 µF I1 input current (pin 1) VO output voltage (pin 7) ∆VO variation of output voltage over the ranges of: VLN(rms) = 0 V VLN(rms) = 1.5 V; IO = 15 mA I6 − 30 − mA − 3.0 − V line voltage VLN = 4 to 6 V − 100 − mV temperature Tamb = +25 to −25 °C − −100 − mV temperature Tamb = +25 to +75 °C − −100 − mV output current IO = 5 to 20 mA − −100 − mV − 20 − µA − 6.0 − mA control current (pin 6) Characteristics without RV I1 input current (pin 1) ∆VLN-O voltage drop from line to output IO VLN(rms) = 0 V VLN(rms) = 1.5 V; IO = 15 mA − 31 − mA IO = 0 mA − 0.5 − V IO = 15 mA; VLN(rms) = 1.5 V − 1.1 − V TEA1081 − − 30 mA TEA1081T − − 20 mA output current (pin 7) RS internal series resistance IINT internal supply current − 20 − Ω IO = 0 mA; PD = LOW; VSP = VO − 0.8 1.4 mA IO = 0 mA; PD = HIGH (note 1); VSP > 2 V − 40 60 µA THD total harmonic distortion VLN(rms) = 1.5 V − − 2 % BRL balance return loss 600 Ω reference 25 − − dB VLN(2H) second harmonic level of line voltage f = 500 Hz; VLN = 0 dBm; Zline = 600 Ω − −58 − dBm VLN(3H) third harmonic level of line voltage f = 500 Hz; VLN = 0 dBm; Zline = 600 Ω − −60 − dBm Vni(rms) noise voltage on input terminal (RMS value) VLN(rms) = 0 V; RL = 600 Ω; P53 curve − −83 − dBmp Power-down input (pin 4) VIL LOW level input voltage − − 0.3 V VIH HIGH level input voltage 1.5 − VSP V I4 input current − − 10 µA September 1994 7 Philips Semiconductors Product specification Supply circuit with power-down for telephone set peripherals SYMBOL TEA1081 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Power-down input (pin 8) V8 supply voltage for power-down I8 supply current to power-down circuit V8 = 3 V 2 − VLN V − − 70 µA Note 1. Power-down circuit supplied via external source. APPLICATION INFORMATION I1 CL = 2.2 µF AD 1 handbook, full pagewidth CD = 68 pF TELEPHONE LINE SPEECH/ TRANSMISSION CIRCUIT V LN LN PD SP 3 4 8 IF 5 6 VA 7 VN RL = 100 kΩ RV TEA1081 2 CS = 47 pF QS IO CO VO PERIPHERAL CIRCUITS MLC171 Fig.6 Application diagram. September 1994 8 Philips Semiconductors Product specification Supply circuit with power-down for telephone set peripherals TEA1081 PACKAGE OUTLINES 8.25 7.80 9.8 9.2 seating plane handbook, full pagewidth 3.2 max 4.2 max 0.51 min 3.60 3.05 2.54 (3x) 1.15 max 0.53 max 0.254 M 7.62 1.73 max 8 0.38 max 10.0 8.3 5 6.48 6.20 1 4 Dimensions in mm. Fig.7 Plastic dual in-line package; 8 leads (300 mil); DIP8; SOT97-1. September 1994 9 MSA252 - 1 Philips Semiconductors Product specification Supply circuit with power-down for telephone set peripherals TEA1081 4.0 3.8 5.0 4.8 handbook, full pagewidth S A 6.2 5.8 0.1 S 0.7 0.3 5 8 0.7 0.6 1.45 1.25 1 4 1.0 0.5 0.25 0.10 pin 1 index detail A 1.27 0.49 0.36 1.75 1.35 0.25 0.19 0 to 8 o MBC180 - 1 0.25 M (8x) Dimensions in mm. Fig.8 Plastic small outline package; 8 leads; body width 3.9 mm (SO8; SOT96-1). September 1994 10 Philips Semiconductors Product specification Supply circuit with power-down for telephone set peripherals TEA1081 SOLDERING BY SOLDER PASTE REFLOW Plastic dual in-line packages Reflow soldering requires the solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the substrate by screen printing, stencilling or pressure-syringe dispensing before device placement. BY DIP OR WAVE The maximum permissible temperature of the solder is 260 °C; this temperature must not be in contact with the joint for more than 5 s. The total contact time of successive solder waves must not exceed 5 s. Several techniques exist for reflowing; for example, thermal conduction by heated belt, infrared, and vapour-phase reflow. Dwell times vary between 50 and 300 s according to method. Typical reflow temperatures range from 215 to 250 °C. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified storage maximum. If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 min at 45 °C. REPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING IRON OR PULSE-HEATED SOLDER TOOL) REPAIRING SOLDERED JOINTS Fix the component by first soldering two, diagonally opposite, end pins. Apply the heating tool to the flat part of the pin only. Contact time must be limited to 10 s at up to 300 °C. When using proper tools, all other pins can be soldered in one operation within 2 to 5 s at between 270 and 320 °C. (Pulse-heated soldering is not recommended for SO packages.) Apply a low-voltage soldering iron below the seating plane (or not more than 2 mm above it). If its temperature is below 300 °C, it must not be in contact for more than 10 s; if between 300 and 400 °C, for not more than 5 s. Plastic small-outline packages BY WAVE For pulse-heated solder tool (resistance) soldering of VSO packages, solder is applied to the substrate by dipping or by an extra thick tin/lead plating before package placement. During placement and before soldering, the component must be fixed with a droplet of adhesive. After curing the adhesive, the component can be soldered. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder bath is 10 s, if allowed to cool to less than 150 °C within 6 s. Typical dwell time is 4 s at 250 °C. A modified wave soldering technique is recommended using two solder waves (dual-wave), in which a turbulent wave with high upward pressure is followed by a smooth laminar wave. Using a mildly-activated flux eliminates the need for removal of corrosive residues in most applications. September 1994 11 Philips Semiconductors Product specification Supply circuit with power-down for telephone set peripherals TEA1081 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. September 1994 12 Philips Semiconductors Product specification Supply circuit with power-down for telephone set peripherals TEA1081 NOTES September 1994 13 Philips Semiconductors Product specification Supply circuit with power-down for telephone set peripherals TEA1081 NOTES September 1994 14 Philips Semiconductors Product specification Supply circuit with power-down for telephone set peripherals TEA1081 NOTES September 1994 15 Philips Semiconductors – a worldwide company Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428) BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367 Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. (02)805 4455, Fax. (02)805 4466 Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213, Tel. (01)60 101-1236, Fax. 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(081)7548421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. (800)234-7381, Fax. (708)296-8556 Uruguay: Coronel Mora 433, MONTEVIDEO, Tel. (02)70-4044, Fax. (02)92 0601 For all other countries apply to: Philips Semiconductors, International Marketing and Sales, Building BE-p, P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands, Telex 35000 phtcnl, Fax. +31-40-724825 SCD34 © Philips Electronics N.V. 1994 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 413061/1500/02/pp16 Document order number: Date of release: September 1994 9397 739 40011