SFW/I9540 Advanced Power MOSFET FEATURES BVDSS = -100 V n Avalanche Rugged Technology RDS(on) = 0.2 Ω n Rugged Gate Oxide Technology n Lower Input Capacitance ID = -17 A n Improved Gate Charge n Extended Safe Operating Area D2-PAK o n 175 C Operating Temperature n Lower Leakage Current : 10 µA (Max.) @ VDS = -100V I2-PAK 2 n Low RDS(ON) : 0.161 Ω (Typ.) 1 1 2 3 3 1. Gate 2. Drain 3. Source Absolute Maximum Ratings Symbol VDSS Characteristic Value Drain-to-Source Voltage Continuous Drain Current (TC=25 C) -17 o Continuous Drain Current (TC=100 C) IDM Drain Current-Pulsed VGS Gate-to-Source Voltage EAS Single Pulsed Avalanche Energy IAR Avalanche Current EAR Repetitive Avalanche Energy dv/dt Peak Diode Recovery dv/dt TJ , TSTG TL A -12 1 O O 1 O 1 O O3 2 o Total Power Dissipation (TA=25 C) * PD V -100 o ID Units o -68 A ±30 V 578 mJ -17 A 13.2 mJ -6.5 V/ns 3.8 W Total Power Dissipation (TC=25 C) 132 W Linear Derating Factor 0.88 W/ C Operating Junction and o - 55 to +175 Storage Temperature Range o Maximum Lead Temp. for Soldering C 300 Purposes, 1/8” from case for 5-seconds Thermal Resistance Symbol Characteristic Typ. Max. RθJC Junction-to-Case -- 1.14 RθJA Junction-to-Ambient * -- 40 RθJA Junction-to-Ambient -- 62.5 Units o C/W * When mounted on the minimum pad size recommended (PCB Mount). Rev. C P-CHANNEL POWER MOSFET SFW/I9540 Electrical Characteristics (TC=25oC unless otherwise specified) Symbol Characteristic BVDSS Drain-Source Breakdown Voltage ∆BV/∆TJ VGS(th) IGSS IDSS RDS(on) Min. Typ. Max. Units Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse Drain-to-Source Leakage Current Static Drain-Source On-State Resistance -100 -- -- -- -0.11 -- -2.0 -- -4.0 -- -- -100 V nA See Fig 7 VDS=-5V,ID=-250µA VGS=-20V VGS=20V -- 100 -- -10 -- -- -100 -- -- 0.2 Ω VGS=-10V,ID=-8.5A 4 O 9.5 -- S VDS=-40V,ID=-8.5A 4 O Forward Transconductance -- Input Capacitance -- 1180 1535 Coss Output Capacitance -- 240 360 Crss Reverse Transfer Capacitance -- 83 125 td(on) Turn-On Delay Time -- 14 40 Rise Time -- 22 55 Turn-Off Delay Time -- 45 100 Fall Time -- 26 60 tf V/ C ID=-250µA -- gfs td(off) VGS=0V,ID=-250µA o -- Ciss tr V Test Condition Qg Total Gate Charge -- 43 54 Qgs Gate-Source Charge -- 7.4 -- Qgd Gate-Drain( “Miller” ) Charge -- 17.8 -- µA pF VDS=-100V o VDS=-80V,TC=150 C VGS=0V,VDS=-25V,f =1MHz See Fig 5 VDD=-50V,ID=-17A, ns RG=12 Ω See Fig 13 4 O 5 O VDS=-80V,VGS=-10V, nC ID=-17A See Fig 6 & Fig 12 4 O 5 O Source-Drain Diode Ratings and Characteristics Symbol Characteristic IS Continuous Source Current Min. Typ. Max. Units 1 O 4 O -17 Test Condition -- -- -- -- -68 -- -- -4.0 V TJ=25 C,IS=-17A,VGS=0V A Integral reverse pn-diode ISM Pulsed-Source Current VSD Diode Forward Voltage trr Reverse Recovery Time -- 135 -- ns TJ=25 C,IF=-17A Qrr Reverse Recovery Charge -- 0.7 -- µC diF/dt=100A/µs Notes ; Temperature O1 Repetitive Rating : Pulse Width Limited by Maximum Junction o 2 * =-17A, V =-25V, R =27Ω , Starting T =25 C L=3.0mH, I O AS DD G J O3 ISD <_-17A, di/dt <_450A/µs, VDD <_BVDSS , Starting TJ =25oC 4 Pulse Test : Pulse Width = 250µs, Duty Cycle < _ 2% O 5 Essentially Independent of Operating Temperature O in the MOSFET o o 4 O P-CHANNEL POWER MOSFET SFW/I9540 Fig 1. Output Characteristics Fig 2. Transfer Characteristics VGS 101 - 15 V - 10 V - 8.0 V - 7.0 V - 6.0 V - 5.5 V - 5.0 V Bottom : - 4.5 V -ID , Drain Current [A] -ID , Drain Current [A] Top : 100 @ Notes : 1. 250 µs Pulse Test 2. TC = 25 oC 10-1 101 175 oC 25 oC 100 @ Notes : 1. VGS = 0 V 2. VDS = -40 V 3. 250 µs Pulse Test - 55 oC 100 10-1 101 2 4 6 8 10 -VDS , Drain-Source Voltage [V] -VGS , Gate-Source Voltage [V] Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage 0.5 0.4 VGS = -10 V 0.3 0.2 0.1 VGS = -20 V 0.0 0 8 16 24 32 40 @ Note : TJ = 25 oC 48 56 -IDR , Reverse Drain Current [A] RDS(on) , [ Ω ] Drain-Source On-Resistance 0.6 101 100 175 oC 10-1 64 @ Notes : 1. VGS = 0 V 2. 250 µs Pulse Test 25 oC -ID , Drain Current [A] 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 -VSD , Source-Drain Voltage [V] Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage 2000 1000 C iss C oss @ Notes : 1. VGS = 0 V 2. f = 1 MHz 500 00 10 C rss 101 -VDS , Drain-Source Voltage [V] VDS = -20 V VDS = -50 V VDS = -80 V 10 -VGS , Gate-Source Voltage [V] Capacitance [pF] 1500 Ciss= Cgs+ Cgd ( Cds= shorted ) Coss= Cds+ Cgd Crss= Cgd 5 @ Notes : ID =-17 A 0 0 10 20 30 QG , Total Gate Charge [nC] 40 50 P-CHANNEL POWER MOSFET SFW/I9540 Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature 2.5 RDS(on) , (Normalized) Drain-Source On-Resistance -BVDSS , (Normalized) Drain-Source Breakdown Voltage 1.2 1.1 1.0 0.9 0.8 -75 @ Notes : 1. VGS = 0 V 2. ID = -250 µA -50 -25 0 25 50 75 100 125 150 175 2.0 1.5 1.0 0.0 -75 200 @ Notes : 1. VGS = -10 V 2. ID = -8.5 A 0.5 -50 -25 o 0 25 50 75 100 125 150 175 200 TJ , Junction Temperature [oC] TJ , Junction Temperature [ C] Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature -ID , Drain Current [A] Operation in This Area is Limited by R DS(on) 2 10 0.1 ms 1 ms 101 10 ms DC 100 @ Notes : 1. TC = 25 oC 2. TJ = 175 oC 3. Single Pulse 10-1 0 10 101 16 12 8 4 0 25 102 50 75 100 125 Tc , Case Temperature [oC] -VDS , Drain-Source Voltage [V] Thermal Response Fig 11. Thermal Response 100 D=0.5 @ Notes : 1. Zθ J C (t)=1.14 o C/W Max. 2. Duty Factor, D=t1 /t2 3. TJ M -TC =PD M *Zθ J C (t) 0.2 10- 1 0.1 P.DM 0.05 0.02 t1. t2. 0.01 θ JC Z (t) , -ID , Drain Current [A] 20 single pulse 10- 2 - 5 10 10- 4 10- 3 10- 2 10- 1 t 1 , Square Wave Pulse Duration 100 [sec] 101 150 175 P-CHANNEL POWER MOSFET SFW/I9540 Fig 12. Gate Charge Test Circuit & Waveform “ Current Regulator ” VGS Same Type as DUT 50KΩ Qg 200nF 12V -10V 300nF VDS Qgs VGS Qgd DUT -3mA R1 R2 Current Sampling (IG) Resistor Current Sampling (ID) Resistor Charge Fig 13. Resistive Switching Test Circuit & Waveforms RL t on Vout td(on) VDD Vin ( 0.5 rated VDS ) RG Vin t off tr td(off) tf 10% DUT -10V Vout 90% Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD LL VDS Vary tp to obtain required peak ID tp ID VDD RG C VDD -10V IAS tp VDS (t) ID (t) DUT BVDSS Time P-CHANNEL POWER MOSFET SFW/I9540 Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms + VDS DUT -IS L Driver VGS RG VGS VGS ( Driver ) Compliment of DUT (N-Channel) VDD • dv/dt controlled by “RG” • IS controlled by Duty Factor “D” Gate Pulse Width D = -------------------------Gate Pulse Period 10V Body Diode Reverse Current IRM IS ( DUT ) di/dt IFM , Body Diode Forward Current Vf VDS ( DUT ) Body Diode Forward Voltage Drop Body Diode Recovery dv/dt VDD