2SK3441 TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (U-MOSII) 2SK3441 DC-DC Converter Applications Relay Drive and Motor Drive Applications Unit: mm • Low drain-source ON resistance: RDS (ON) = 4.5 mΩ (typ.) • High forward transfer admittance: |Yfs| = 80 S (typ.) • Low leakage current: IDSS = 100 μA (max) (VDS = 60 V) • Enhancement mode: Vth = 1.3 to 2.5 V (VDS = 10 V, ID = 1 mA) Absolute Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating Unit Drain-source voltage VDSS 60 V Drain-gate voltage (RGS = 20 kΩ) VDGR 60 V Gate-source voltage VGSS ±20 V (Note 1) ID 75 < 1 ms) Pulse (t = (Note 1) IDP 300 Drain power dissipation (Tc = 25°C) PD 125 W JEDEC Single pulse avalanche energy (Note 2) EAS 468 mJ JEITA SC-97 Avalanche current IAR 75 A TOSHIBA 2-9F1B Repetitive avalanche energy (Note 3) EAR 12.5 mJ Channel temperature Tch 150 °C Storage temperature range Tstg −55 to 150 °C DC Drain current A ― Weight: 0.74 g (typ.) Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Thermal Characteristics Characteristics Thermal resistance, channel to case Circuit Configuration Symbol Max Unit Notice: Rth (ch-c) 1.00 °C/W Please use the S1 pin for gate input signal return. Make sure that the main current flows into the S2 pin. Note 1: Ensure that the channel temperature does not exceed 150°C. Note 2: VDD = 25 V, Tch = 25°C (initial), L = 113 μH, RG = 25 Ω, IAR = 75 A Note 3: Repetitive rating: pulse width limited by maximum channel temperature 4 This transistor is an electrostatic-sensitive device. Please handle with caution. 1 2 3 1 2009-09-29 2SK3441 Marking Part No. (or abbreviation code) K3441 Lot No. Note Note 4: A line under a Lot No. identifies the indication of product Labels. Not underlined: [[Pb]]/INCLUDES > MCV Underlined: [[G]]/RoHS COMPATIBLE or [[G]]/RoHS [[Pb]] Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product. The RoHS is the Directive 2002/95/EC of the European Parliament and of the Council of 27 January 2003 on the restriction of the use of certain hazardous substances in electrical and electronic equipment. Electrical Characteristics (Note 5) (Ta = 25°C) Gate leakage current Drain cut-off current Drain-source breakdown voltage Gate threshold voltage Symbol IGSS Unit ⎯ ⎯ ±10 μA μA VDS = 60 V, VGS = 0 V ⎯ ⎯ 100 60 ⎯ ⎯ V (BR) DSX ID = 10 mA, VGS = −20 V 40 ⎯ ⎯ VDS = 10 V, ID = 1 mA 1.3 ⎯ 2.5 Vth |Yfs| Input capacitance Ciss Reverse transfer capacitance Crss Output capacitance Coss tr VGS = 10 V, ID = 38 A ⎯ 4.5 5.8 VGS = 4 V, ID = 38 A ⎯ 5.8 10 VDS = 10 V, ID = 38 A 40 80 ⎯ ⎯ 9300 ⎯ ⎯ 910 ⎯ ⎯ 1435 ⎯ ⎯ 18 ⎯ ⎯ 40 ⎯ ⎯ 42 ⎯ ⎯ 250 ⎯ ⎯ 210 ⎯ ⎯ 145 ⎯ ⎯ 65 ⎯ VDS = 10 V, VGS = 0 V, f = 1 MHz VGS ID = 38 A VOUT 10 V 0V ton 4.7 Ω Switching time Turn-off time Max ID = 10 mA, VGS = 0 V Forward transfer admittance Fall time Typ. IDSS RDS (ON) Turn-on time VGS = ±16 V, VDS = 0 V Min V (BR) DSS Drain-source ON resistance Rise time Test Condition tf toff Total gate charge (gate-source plus gate-drain) Qg Gate-source charge Qgs Gate-drain (“miller”) charge Qgd VDD ∼ − 30 V < Duty = 1%, tw = 10 μs RL = 0.79 Ω Characteristics VDD ∼ − 48 V, VGS = 10 V, ID = 75 A V V mΩ S pF ns nC Note 5: Connect the S1 and S2 pins together, and ground them except during switching time measurement. Source-Drain Ratings and Characteristics (Note 6) (Ta = 25°C) Characteristics Symbol Test Condition Min Typ. Max Unit Continuous drain reverse current (Note 1, Note 6) IDR1 ⎯ ⎯ ⎯ 75 A Pulse drain reverse current (Note 1, Note 6) IDRP1 ⎯ ⎯ ⎯ 300 A Continuous drain reverse current (Note 1, Note 6) IDR2 ⎯ ⎯ ⎯ 1 A Pulse drain reverse current (Note 1, Note 6) IDRP2 ⎯ ⎯ ⎯ 4 A Forward voltage (diode) VDS2F ⎯ ⎯ −1.5 V IDR1 = 75 A, VGS = 0 V Reverse recovery time trr IDR = 75 A, VGS = 0 V, ⎯ 60 ⎯ ns Reverse recovery charge Qrr dIDR/dt = 50 A/μs ⎯ 50 ⎯ nC Note 6: IDR1, IDRP1: Current flowing between the drain and the S2 pin. Ensure that the S1 pin is left open. IDR2, IDRP2: Current flowing between the drain and the S1 pin. Ensure that the S2 pin is left open. Unless otherwise specified, connect the S1 and S2 pins together, and ground them. 2 2009-09-29 2SK3441 ID – VDS Drain current ID (A) 80 Common source Tc = 25°C Pulse test 60 ID – VDS 200 6 4 3.6 3.8 10 160 8 10 3.4 40 3.2 20 0.2 0.4 0.6 Drain-source voltage 0.8 5 3.8 120 3.6 80 3.4 3.2 40 VGS = 3 V 0 0 Common source Tc = 25°C Pulse test 4.5 4 Drain current ID (A) 100 VGS = 3 V 0 0 1.0 2 VDS (V) 4 6 Drain-source voltage 8 VDS (V) VDS – VGS ID – VGS 120 0.6 Common source Common source VDS (V) VDS = 10 V Pulse test 80 Drain-source voltage Drain current ID (A) 100 60 40 25 20 0 0 100 1 2 Tc = −55°C 3 5 4 Gate-source voltage Tc = 25°C 0.5 Pulse test 0.4 ID = 70 A 0.3 0.2 35 0.1 0 0 6 15 2 VGS (V) 4 ⎪Yfs⎪ – ID 8 10 12 VGS (V) RDS (ON) – ID 50 Common source Common source (S) 6 Gate-source voltage 300 VDS = 10 V Pulse test Tc = −55°C 100 Drain-source on resistance RDS (ON) (mΩ) Forward transfer admittance ⎪Yfs⎪ 10 25 50 100 30 30 Tc = 25°C Pulse test 10 VGS = 4 V 5 10 3 10 5 1 3 5 10 30 50 1 1 100 Drain current ID (A) 3 5 10 30 50 100 Drain current ID (A) 3 2009-09-29 2SK3441 RDS (ON) – Tc IDR – VDS 12 300 Common source (A) ID = 70 A 35 15 Drain reverse current IDR Drain-source on resistance RDS (ON) (m Ω) 10 10 Pulse test 8 6 VGS = 4 V ID = 15, 35, 70 A 4 VGS = 10 V 2 5 100 50 3 30 VGS = 0, −1 V 10 5 3 Common source Tc = 25°C −40 0 40 80 120 Pulse test 1 0 160 −0.4 Case temperature Tc (°C) −0.8 Drain-source voltage Vth (V) (pF) 30000 Ciss 10000 Gate threshold voltage 5000 3000 Common source Coss 1000 VGS = 0 V f = 1 MHz 500 Tc = 25°C Common source VDS = 10 V ID = 1 mA 4 Pulse test 3 2 1 Crss 0.3 0.5 1 3 5 Drain-source voltage 10 30 50 0 −80 100 −40 VDS (V) 0 80 40 120 160 Case temperature Tc (°C) PD – Tc Dynamic input/output characteristics 200 VDS (V) 50 160 Drain-source voltage 120 80 40 25 Common source ID = 75 A Tc = 25°C 20 Pulse test VDS 40 30 15 VDD = 48 V 24 10 20 12 5 10 VGS (V) Capacitance C VDS (V) 5 50000 Drain power dissipation PD (W) −2.0 −1.6 Vth – Tc Capacitance – VDS 100000 300 0.1 −1.2 Gate-source voltage 0 −80 VGS 10 0 40 80 120 160 0 0 200 Case temperature Tc (°C) 80 160 240 320 0 400 Total gate charge Qg (nC) 4 2009-09-29 2SK3441 rth – tw Normalized transient thermal impedance rth (t)/Rth (ch-c) 10 1 Duty = 0.5 0.2 PDM 0.1 0.1 t 0.05 T 0.02 0.01 Duty = t/T Rth (ch-c) = 1.0°C/W Single 0.01 0.00001 0.0001 0.001 0.01 Pulse width 0.1 tw 1 (s) EAS – Tch Safe operating area 600 Drain current ID (A) ID max (pulsed) * 100 μs * 100 ID max (continuous) 10 Avalanche energy EAS (mJ) 1000 1 10 1 ms * DC operation Tc = 25°C *: Single nonrepetitive pulse Tc = 25°C Curves must be derated linearly with increase in temperature 0.1 0.1 1 500 400 300 200 100 VDSS max 10 Drain-source voltage 100 0 25 1000 50 VDS (V) 75 100 125 150 Channel temperature (initial) Tch (°C) 15 V BVDSS IAR 0V VDD Waveform Test circuit RG = 25 Ω VDD = 25 V, L = 236 μH 5 VDS Ε AS = ⎛ ⎞ 1 B VDSS ⎟ ⋅ L ⋅ I2 ⋅ ⎜ ⎜B ⎟ − 2 V VDSS DD ⎝ ⎠ 2009-09-29 2SK3441 RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively “Product”) without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. 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