$GYDQFHG 3RZHU 026)(7 IRLR/U210A FEATURES BVDSS = 200 V ♦ Avalanche Rugged Technology ♦ Rugged Gate Oxide Technology RDS(on) = 1.5Ω ♦ Lower Input Capacitance ♦ Improved Gate Charge ID = 2.7 A ♦ Extended Safe Operating Area ♦ Lower Leakage Current: 10µA (Max.) @ VDS = 200V D-PAK ♦ Lower RDS(ON): 1.185Ω (Typ.) I-PAK 2 1 1 3 2 3 1. Gate 2. Drain 3. Source Absolute Maximum Ratings Symbol VDSS ID Characteristic Value Drain-to-Source Voltage 200 Continuous Drain Current (TC=25°C) 2.7 Continuous Drain Current (TC=100°C) 1.7 Units V A IDM Drain Current-Pulsed VGS Gate-to-Source Voltage ±20 V EAS Single Pulsed Avalanche Energy (2) 24 mJ A A 9 (1) IAR Avalanche Current (1) 2.7 EAR Repetitive Avalanche Energy (1) 2.1 mJ dv/dt Peak Diode Recovery dv/dt (3) 5 V/ns Total Power Dissipation (TA=25°C) * 2.5 W Total Power Dissipation (TC=25°C) 21 W 0.17 W/°C PD Linear Derating Factor TJ , TSTG TL Operating Junction and - 55 to +150 Storage Temperature Range °C Maximum Lead Temp. for Soldering Purposes, 1/8 300 from case for 5-seconds Thermal Resistance Symbol RθJC Characteristic Typ. Max. Junction-to-Case -- 5.7 RθJA Junction-to-Ambient * -- 50 RθJA Junction-to-Ambient -- 110 Units °C/W * When mounted on the minimum pad size recommended (PCB Mount). Rev. B ©1999 Fairchild Semiconductor Corporation 1 1&+$11(/ 32:(5 026)(7 IRLR/U210A Electrical Characteristics (TC=25°C unless otherwise specified) Symbol Characteristic BVDSS Drain-Source Breakdown Voltage 200 -- -- ∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.19 -- IGSS IDSS RDS(on) Gate Threshold Voltage V See Fig 7 VDS=5V,ID=250µA -- 2.0 -- -- 100 Gate-Source Leakage , Reverse -- -- -100 -- -- 10 -- -- 100 -- -- 1.5 Ω VGS=5V,ID=1.35A (4) VDS=40V,ID=1.35A (4) Drain-to-Source Leakage Current Static Drain-Source On-State Resistance -- 1.9 -- Ciss Input Capacitance -- 185 240 Coss Output Capacitance -- 35 45 Crss Reverse Transfer Capacitance -- 14 20 td(on) Turn-On Delay Time -- 9 30 Rise Time -- 9 30 Turn-Off Delay Time -- 20 50 Fall Time -- 6 20 Qg Total Gate Charge -- 6.1 9 Qgs Gate-Source Charge -- 1.4 -- Qgd Gate-Drain ( Miller ) Charge -- 2.8 -- tf V/°C ID=250µA 1.0 Forward Transconductance td(off) VGS=0V,ID=250µA Gate-Source Leakage , Forward gfs tr V Test Condition Ω VGS(th) Min. Typ. Max. Units nA µA pF VGS=20V VGS=-20V VDS=200V VDS=160V,TC=125°C VGS=0V,VDS=25V,f =1MHz See Fig 5 VDD=100V,ID=3.3A, ns RG=22Ω See Fig 13 (4) (5) VDS=160V,VGS=5V, nC ID=3.3A See Fig 6 & Fig 12 (4) (5) Source-Drain Diode Ratings and Characteristics Symbol Characteristic Min. Typ. Max. Units Test Condition IS Continuous Source Current -- -- 2.7 ISM Pulsed-Source Current (1) -- -- 9 VSD Diode Forward Voltage (4) -- -- 1.5 V trr Reverse Recovery Time -- 123 -- ns TJ=25°C,IF=3.3A Qrr Reverse Recovery Charge -- 0.38 -- µC diF/dt=100A/µs A Integral reverse pn-diode in the MOSFET TJ=25°C,IS=2.7A,VGS=0V (4) Notes; Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature L=5mH, IAS=2.7A, VDD=50V, RG=27Ω, Starting TJ =25°C ISD ≤ 3.3A, di/dt ≤ 140A/µs, VDD ≤ BVDSS , Starting TJ =25°C Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2% Essentially Independent of Operating Temperature 2 1&+$11(/ 32:(5 026)(7 IRLR/U210A Fig 1. Output Characteristics Fig 2. Transfer Characteristics 101 101 VGS 7.0V 6.0V 5.5V 5.0V 100 ID , Drain Current [A] ID , Drain Current [A] Top : 4.5V 4.0V 3.5V Bottom : 3.0 V @ Notes : 1. 250 µs Pulse Test 2. TC = 25 oC 10-1 10-1 100 150 oC 100 25 oC 3. 250 µs Pulse Test 10-1 101 0 2 101 IDR , Reverse Drain Current [A] RDS(on) , [ Ω ] Drain-Source On-Resistance Fig 3. On-Resistance vs. Drain Current 3 VGS = 5 V 2 1 o VGS = 10 V 2 4 @ Note : TJ = 25 C 6 4 6 8 10 VGS , Gate-Source Voltage [V] DS 0 0 2. VDS = 40 V - 55 oC V , Drain-Source Voltage [V] 4 @ Notes : 1. VGS = 0 V 8 10 Fig 4. Source-Drain Diode Forward Voltage 100 @ Notes : 1. VGS = 0 V 150 oC o 25 C 10-1 0.4 I , Drain Current [A] 0.6 2. 250 µs Pulse Test 0.8 1.0 1.2 1.4 V , Source-Drain Voltage [V] D SD Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage 300 C iss 180 120 C oss 60 C rss 00 10 @ Notes : 1. VGS = 0 V 2. f = 1 MHz 1 10 VDS , Drain-Source Voltage [V] 6 VGS , Gate-Source Voltage [V] Capacitance [pF] 240 Ciss= Cgs+ Cgd ( Cds= shorted ) Coss= Cds+ Cgd Crss= Cgd VDS = 40 V VDS =100 V 4 VDS = 160 V 2 @ Notes : ID = 3.3 A 0 0 2 4 6 Q , Total Gate Charge [nC] G 3 1&+$11(/ 32:(5 026)(7 IRLR/U210A Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature 2.5 RDS(on) , (Normalized) Drain-Source On-Resistance BVDSS , (Normalized) Drain-Source Breakdown Voltage 1.2 1.1 1.0 0.9 @ Notes : 1. VGS = 0 V 2.0 1.5 1.0 @ Notes : 1. VGS = 5 V 2. ID = 1.65 A 0.5 2. ID = 250 µA 0.8 -75 -50 -25 0 25 50 75 100 125 150 0.0 -75 175 -50 -25 0 25 50 75 100 125 150 175 T , Junction Temperature [oC] TJ , Junction Temperature [oC] Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Ambient Temperature J ID , Drain Current [A] 101 100 µs 1 ms 10 ms 100 DC 10-1 @ Notes : 1. TC = 25 oC 0.8 0.6 0.4 0.2 100 101 0.0 25 102 50 102 100 75 100 125 150 TA , Ambient Temperature [oC] VDS , Drain-Source Voltage [V] Thermal Response 10-3 -1 10 2. TJ = 150 oC 3. Single Pulse Fig 11. Thermal Response D=0.5 0.2 101 0.1 0.05 @ Notes : 1. Z J A (t)=69.4 o C/W Max. 0.02 2. Duty Factor, D=t1 /t2 0.01 3. TJ M -TA =PD M *Z θ θ JA 10- 1 - 5 10 (t) PDM t1 single pulse θJA 10-2 Z (t) , ID , Drain Current [A] 1.0 Operation in This Area is Limited by R DS(on) t2 10- 4 t 10- 3 1 10- 2 10- 1 100 , Square Wave Pulse Duration 101 102 103 [sec] 4 1&+$11(/ 32:(5 026)(7 IRLR/U210A Fig 12. Gate Charge Test Circuit & Waveform Current Regulator VGS Same Type as DUT 50kΩ Qg 200nF 12V 5V 300nF VDS Qgs VGS Qgd DUT 3mA R1 R2 Current Sampling (IG) Resistor Charge Current Sampling (ID) Resistor Fig 13. Resistive Switching Test Circuit & Waveforms RL Vout Vout 90% VDD Vin ( 0.5 rated VDS ) RG DUT Vin 10% 5V td(on) tr td(off) t on tf t off Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD LL VDS Vary tp to obtain required peak ID BVDSS IAS ID RG C DUT ID (t) VDD VDS (t) VDD 5V tp tp Time 5 1&+$11(/ 32:(5 026)(7 IRLR/U210A Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS -- IS L Driver VGS RG VGS VGS ( Driver ) Same Type as DUT VDD dv/dt controlled by RG IS controlled by Duty Factor D Gate Pulse Width D = -------------------------Gate Pulse Period 5V IFM , Body Diode Forward Current IS ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt Vf VDD Body Diode Forward Voltage Drop 6 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 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