SAMSUNG KS88C4404

KS88C4404 MICROCONTROLLER
1
PRODUCT OVERVIEW
PRODUCT OVERVIEW
SAM8 PRODUCT FAMILY
Samsung's new SAM8 family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide
range of integrated peripherals, and various mask-programmable ROM sizes.
A dual address/data bus architecture and a large number of bit- or nibble-configurable I/O ports provide a flexible
programming environment for applications with varied memory and I/O requirements.
Timer/counters with selectable operating modes are included to support real-time operations. Many SAM8
microcontrollers have an external interface that provides access to external memory and other peripheral devices.
The sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more
interrupt sources and vectors. Fast interrupt processing (within a minimum six CPU clocks) can be assigned to
specific interrupt levels.
KS88C4404 MICROCONTROLLER
The KS88C4404 single-chip microcontroller is fabricated using a highly advanced CMOS process. Its design is
based on the powerful SAM8 CPU core. Stop and Idle power-down modes were implemented to reduce power
consumption. The size of the internal register file is logically expanded, increasing the addressable on-chip
register space to 1040 bytes. A flexible yet sophisticated external interface is used to access up to 64-Kbytes of
program and data memory. The KS88C4404 is a versatile microcontroller that is ideal for use in a wide range of
general-purpose applications such as CD-ROM/DVD-ROM drives.
Using the SAM8 modular design approach, the following peripherals were integrated with the SAM8 CPU core:
1–1
PRODUCT OVERVIEW
— Six configurable 8-bit general I/O ports
— One 8-bit n-channel, open-drain output port
— One 8-bit input port for A/D converter input or
digital input
KS88C4404 MICROCONTROLLER
The KS88C4404 is a versatile microcontroller that is
ideal for use in a wide range of general-purpose
ROM-less applications such as CD-ROM/DVD-ROM
drivers.
— Full-duplex serial data port with one
synchronous and three asynchronous (UART)
operating modes
— Two 8-bit timers with interval timer or PWM
mode
— Two 16-bit timer/counters with four
programmable operating modes
— Two programmable 8-bit PWM modules with
corresponding output pins
— One 8-bit capture module with CAP input pin
— A/D converter with 8 selectable input pins
Figure 1–1. KS88C4404 Microcontroller
1–2
KS88C4404 MICROCONTROLLER
FEATURES
PRODUCT OVERVIEW
General I/O
•
Six 8-bit general I/O ports (ports 0,1,2,3,4, and
5)
•
One 8-bit n-channel, open-drain output port
(port 6)
•
One 8-bit input port (for ADC input or port 7
digital input)
CPU
•
SAM8 CPU core
Memory
•
1040-byte of internal register file
•
4-kbyte internal program memory area
External Interface
Serial Port
•
Full-duplex serial data port (UART)
•
Four programmable operating modes
•
64-Kbyte external data memory area
•
64-Kbyte external program memory (ROMless)
PWM and Capture
•
60-Kbyte external program memory (normal)
•
Two output channels (PWM0, PWM1)
•
8-bit resolution with 2-bit prescaler
•
97.66-kHz frequency (25-MHz CPU clock)
•
Capture module with CAP input pin
Instruction Set
•
•
78 instructions
IDLE and STOP instructions
Instruction Execution Time
•
240 ns at 25 MHz fOSC (minimum)
Interrupts
•
20 interrupt sources and 19 interrupt vectors
•
Seven interrupt levels
•
Fast interrupt processing (level0 and 3-7 only)
Analog-to-Digital Converter
•
Eight analog input pins
•
8-bit conversion resolution
•
7.68-µs conversion speed (25-MHz CPU clock)
Operating Temperature Range
•
– 20°C to + 85°C
Timer/Counters
Operating Voltage Range
•
Two 8-bit timers with interval timer or PWM
mode (timers A and B)
•
•
Two 16-bit timer/counters with four
programmable operating modes (timers C and
D)
Package Type
•
4.5 V to 5.5 V
80-pin QFP, 80–pin TQFP
1–3
PRODUCT OVERVIEW
KS88C4404 MICROCONTROLLER
BLOCK DIAGRAM
EXTERNAL ADDRESS/DATA BUS
P0.0–P0.7
(A8–A15)
PORT 0
P1.0–P1.7
(AD0–AD7)
P2.0–P2.5
(Control Signal)
PORT 1
PORT 2
RESET
EA
SAM8 BUS
P2.6
P2.7
PORT 3
P3.0–P3.7
PORT 4
P4.0–P4.7
PORT2
PORT I/O & INTERRUPT
CONTROL
TA
TB
TIMERS
A and B
P5.0–P5.3
SAM8 CPU
PORT 5
P5.4–P5.7
TCCK
TDCK
TCG
TDG
TIMERS
C and D
RxD
TxD
SERIAL
PORT
1040-BYTE
REGISTER FILE
PORT 6
VDD1 ,VSS1
VDD2 ,VSS2
SAM8 BUS
AVSS
AVREF
A/D
CONVERTER
ADC0 /P7.0 –
ADC7 /P7.7
PWM
MODULE
PWM0
PWM1
Figure 1–2. KS88C4404 Block Diagram
1–4
P6.0–P6.7
CAPTURE (P3.6)
KS88C4404 MICROCONTROLLER
PRODUCT OVERVIEW
PIN ASSIGNMENTS
EA
P1.7 / AD7
P1.6 / AD6
P1.5 / AD5
P1.4 / AD4
P1.3 / AD3
P1.2 / AD2
P1.1 / AD1
P1.0 / AD0
VDD1 (int.)
P0.7 / A15
P0.6 / A14
P0.5 / A13
P0.4 / A12
P0.3 / A11
P0.2 / A10
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
P0.1 / A9
P0.0 / A8
P5.7
P5.6
P5.5
P5.4
P5.3
P5.2
P5.1
P5.0
VDD2 (ext.)
P2.7 / TB
P2.6 / TA
P2.5 / PM
P2.4 / MR
P2.3 / DM
P2.2 / MW
P2.1 / DS
P2.0 / AS
RxD
TxD
PWM1
PWM0
P3.0 / TCCK / INT0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
KS88C4404
80-QFP
(TOP VIEW)
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
RESET
NC
AS
VSS1 (int.)
XOUT
XIN
P6.0
P6.1
P6.2
P6.3
P6.4
P6.5
P6.6
P6.7
P7.7 / ADC7
P7.6 / ADC6
P7.5 / ADC5
P7.4 / ADC4
P7.3 / ADC3
AVSS
P7.2 / ADC2
P7.1 / ADC1
AVREF
P7.0 / ADC0
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
P4.7 / INT11
P4.6 / INT10
P4.5 / INT9
P4.4 / INT8
P4.3 / INT7
P4.2 / INT6
P4.1 / INT5
P4.0 / INT4
VSS2 (ext.)
P3.7 / WAIT
P3.6 / CAP
P3.5
P3.4
P3.3 / TDG / INT3
P3.2 / TCG / INT2
P3.1 / TDCK / INT1
Figure 1–3. KS88C4404 Pin Assignments
1–5
MR
MW
DM
DS
RxD
TxD
AS
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
P7.0 / ADC0
P4.7 / INT11
P4.6 / INT10
P4.5 / INT9
P4.4 / INT8
P4.3 / INT7
P4.2 / INT6
P4.1 / INT5
P4.0 / INT4
VSS2 (ext.)
P3.7 / WAIT
P3.6 / CAP
P3.5
P3.4
P3.3 / TDG / INT3
P3.2 / TCG / INT2
P3.1 / TDCK / INT1
P3.0 / TCCK / INT0
PWM0
PWM1
1–6
AS
NC
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
PM
RESET
EA
P1.7 / AD7
P1.6 / AD6
P1.5 / AD5
P1.4 / AD4
P1.3 / AD3
P1.2 / AD2
P1.1 / AD1
P1.0 / AD0
VDD1 (int.)
P0.7 / A15
P0.6 / A14
P0.5 / A13
P0.4 / A12
P0.3 / A11
P0.2 / A10
P0.1 / A9
Figure 1–4. KS88C4404 Pin Assignments
Vss1 (int.)
XOUT
XIN
P6.0
P6.1
P6.2
P6.3
P6.4
P6.5
P6.6
P6.7
P7.7 / ADC7
P7.6 / ADC6
P7.5 / ADC5
P7.4 / ADC4
P7.3 / ADC3
AVSS
P7.2 / ADC2
P7.1 / ADC1
AVREF
KS88C4404
(TOP VIEW)
80-TQFP
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
P0.0 / A8
P5.7
P5.6
P5.5
P5.4
P5.3
P5.2
P5.1
P5.0
VDD2 (ext.)
P2.7 / TB
P2.6 / TA
KS88C4404 MICROCONTROLLER
PRODUCT OVERVIEW
PIN ASSIGNMENTS (Continued)
KS88C4404 MICROCONTROLLER
PRODUCT OVERVIEW
PIN DESCRIPTIONS
Table 1–1. KS88C4404 Pin Descriptions
Pin
Name
Pin
Type
Pin
Description
Circuit
Type
QFP Pin
Number
Share
Pins
P0.0 - P0.7
I/O
Nibble programmable port; input or output mode
selected by software; Schmitt trigger input or pushpull, open-drain output with software assignable
pull-ups; alternately configurable as external
interface address lines A8 - A15.
3
2, 1,
80-75
A8 - A15
P1.0 - P1.7
I/O
Same general characteristics as port 0; alternately
configurable as external interface address/data lines
AD0 - AD7.
3
73-66
AD0 - AD7
P2.0 - P2.7
I/O
General I/O port with Schmitt trigger input or pushpull output. bit programmable;
P2.0 / Address Strobe (AS)
P2.1 / Data Strobe (DS)
P2.2 / Memory Write (MW )
P2.3 / Data Memory select (DM)
P2.4 / Memory Read (MR)
P2.5 / Program Memory select (PM)
P2.6 / timer A output (TA)
P2.7 / timer B output (TB)
5
19 - 12
AS, DS, MW,
DM, MR,
PM, TA, TB
P3.0 - P3.7
I/O
General I/O port with bit programmable pins.
Schmitt trigger input or push-pull output with
software assignable pull-ups. Input or output mode
is selectable by software. P3.0 - P3.3 are alternately
used as inputs for external interrupts INT0-INT3,
respectively (with noise filters and interrupt control):
P3.0 / timer C clock input (TCCK) / INT0
P3.1 / timer D clock input (TDCK) / INT1
P3.2 / timer C gate input (TCG) / INT2
P3.3 / timer D gate input (TDG) / INT3
P3.6 / Capture data input (CAP)
P3.7 /
for slow memory interface
4
24-31
(See pin
description)
P4.0 - P4.7
I/O
General I/O port with bit programmable pins.
Schmitt trigger input or push-pull, open-drain output
with software assignable pull-ups. Input or output
mode is selectable by software. P4.0-P4.7 can
alternately be used as inputs for external interrupts
INT4-INT11, respectively (with noise filters and
interrupt control)
4
33-40
INT4 INT11
1–7
PRODUCT OVERVIEW
KS88C4404 MICROCONTROLLER
Table 1–1. KS88C4404 Pin Descriptions (Continued)
Pin
Name
Pin
Type
Pin
Description
Circuit
Type
QFP Pin
Number
Share
Pins
P5.0–P5.7
I/O
General I/O port with nibble programmable
pins. Schmitt trigger input or push-pull,
open-drain output mode. Mode and pull-ups
are assigned by software.
3
10–3
—
P6.0–P6.7
O
N-channel, open-drain output port; the pin
circuits can withstand loads up to 9 volts.
8
58–51
—
ADC0–ADC7
I
Analog input pins for A/D converter module.
Alternatively used as general-purpose
digital input port 7.
2
41, 43–44,
46–50
AVREF, AVSS
—
A/D converter reference voltage and ground
—
42, 45
—
RxD
I/O
Serial data RxD pin for receive input and
transmit output (mode 0)
6
20
—
TxD
O
Serial data TxD pin for transmit output and
shift clock input (mode 0)
7
21
—
PWM0,
PWM1
O
Pulse width modulation output pins
7
23, 22
—
TA, TB
O
Output pins for timer A and timer B
5
13, 12
P2.6, P2.7
INT0–INT11
I
External interrupt input pins
4
24–27,
33–40
P3.0–P3.3,
P4.0–P4.7
TCCK, TDCK
I
External clock input for timer C and timer D
4
24, 25
P3.0, P3.1
TCG, TDG
I
Gate input pins for timer C and timer D
4
26, 27
P3.2, P3.3
CAP
I
Capture data input for PWM module
4
30
P3.6
WAIT
I
Input pin for the slow memory timing signal
from the external interface
4
31
P3.7
RESET
I
System reset pin (pull-up resistor: 220 kΩ)
1
64
—
EA
I
External access (EA) pin with two modes:
5 V input: normal ROM-less operation with
external interface (0 V is not allowed)
9 V–10 V input: for factory test mode
—
65
—
P7.0–P7.7
VDD1, VSS1
—
Power input pins for CPU operation
(internal)
—
74, 61
—
VDD2, VSS2
—
Power input pins for port output (external)
—
11, 32
—
XIN, XOUT
—
Main oscillator pins
—
59, 60
—
AS
O
Address strobe
7
62
—
NC
—
No connection pins (connect to VSS)
—
62, 63
—
NOTE
1–8
VDD1 must be connected to VDD2 in users application circuit, VSS1 & VSS2 also.
KS88C4404 MICROCONTROLLER
PRODUCT OVERVIEW
PIN CIRCUITS
Table 1–2. Pin Circuit Assignments for the KS88C4404
Circuit Number
1
2
3
4
5
6
7
8
Circuit Type
Input
Input
I/O
I/O
I/O
I/O
Output
Output
KS88C4404 Assignments
pin
A/D converter input pins, ADC0–ADC7
Port 0, 1, and 5
Ports 3 and 4, TCCK, TDCK, TCG, TDG, CAP, WAIT, INT0–INT11
Port 2 (AS, DS, MW, DM, MR, PM, TA,TB)
Serial port RxD pin
Serial port TxD pin, PWM0, PWM1 and AS
Port 6 (n-channel, open-drain output with high current capability)
RESET
1–9
PRODUCT OVERVIEW
KS88C4404 MICROCONTROLLER
INPUT
BUFFER
V DD
PULL-UP
RESISTOR
(Typical 230 kΩ )
IN
+
–
ADC
LOGIC
INPUT
V REF
Figure 1–5. Pin Circuit Type 1 (
1–10
)
Figure 1–6. Pin Circuit Type 2 (ADC0–ADC7)
KS88C4404 MICROCONTROLLER
PRODUCT OVERVIEW
VDD
PULL-UP
RESISTOR
(Typical 46 kΩ )
PULL-UP
ENABLE
VDD
DATA
IN / OUT
OPENDRAIN
OUTPUT
DISABLE
VSS
INPUT
Figure 1–7. Pin Circuit Type 3 (Ports 0,1, and 5)
1–11
PRODUCT OVERVIEW
KS88C4404 MICROCONTROLLER
V DD
PULL-UP
RESISTOR
(Typical 46 k Ω)
PULL-UP
ENABLE
V DD
DATA
IN / OUT
OUTPUT
DISABLE
VSS
INPUT
EXTERNAL
INTERRUPT
INPUT
NOISE
FILTER
Figure 1–8. Pin Circuit Type 4
(Ports 3 and 4, TCCK, TDCK, TCG, TDG, CAP,
1–12
INT0–INT11)
KS88C4404 MICROCONTROLLER
PRODUCT OVERVIEW
V DD
SELECTION BITS
FOR PORTS OR
OTHER FUNCTIONS
DATA
IN / OUT
OPENDRAIN
OUTPUT
DISABLE
VSS
INPUT
OTHER
FUNCTION
Figure 1–9. Pin Circuit Type 5 (Port 2, AS, DS, MW, DM, MR, PM, TA and TB)
1–13
PRODUCT OVERVIEW
KS88C4404 MICROCONTROLLER
V DD
EDGE DETECTION
VDD
R
(46 k Ω)
DATA
IN / OUT
OUTPUT
DISABLE
VSS
INPUT
NOISE FILTER
a
Figure 1–10. Pin Circuit Type 6 (Serial RxD Pin)
1–14
KS88C4404 MICROCONTROLLER
PRODUCT OVERVIEW
VDD
OUTPUT
DATA
DATA
OUTPUT
VSS
VSS
Figure 1–11. Pin Circuit Type 7
(AS, serial TxD Pin, PWM0, PWM1)
NOTE: Circuit type 8 can withstand up to 9-volt loads.
Figure 1–12. Pin Circuit Type 8 (Port 6)
1–15
PRODUCT OVERVIEW
KS88C4404 MICROCONTROLLER
NOTES
1–16
KS88C4404 MICROCONTROLLER
16
ELECTRICAL DATA
ELECTRICAL DATA
In this section, KS88C4404 electrical characteristics are presented in tables and graphs. The information is
arranged in the following order:
— Absolute maximum ratings
— DC electrical characteristics
— AC electrical characteristics
— Input timing for external interrupts (ports 3 and 4)
Input timing for
— I/O capacitance
— Data retention supply voltage in Stop mode
— Stop mode release timing initiated by
— A./D Converter Electrical Characteristics
— Serial port timing characteristics in mode 0 (10 MHz)
— Serial clock waveform
— Serial port timing in mode 0 (shift register mode)
— External memory timing characteristics (10 MHz)
— External memory read and write timing
— Recommended A/D converter circuit for highest absolute accuracy
— Main oscillator frequency (fOSC1)
— Main oscillator clock stabilization time (tST1)
— Clock timing measurement at XIN
— Suboscillator clock stabilization time (tST2)
— Characteristic curves
16–1
ELECTRICAL DATA
KS88C4404 MICROCONTROLLER
Table 16–1. Absolute Maximum Ratings
(TA = 25°C)
Parameter
Symbol
Conditions
Supply voltage
VDD
Input voltage
VI1
Port 6 only (open-drain)
VI2
All ports except port 6
Output voltage
VO
Output current
high
IOH
Output current
low
IOL
Rating
Unit
– 0.3 to +7.0
V
– 0.3 to +10
V
– 0.3 to VDD + 0.3
– 0.3 to VDD + 0.3
V
One I/O pin active
– 18
mA
All I/O pins active
– 60
One I/O pin active
30
Total pin current for ports 0, 2, 3, 4, 6
100
Total pin current for ports 1 and 5
200
mA
Operating
temperature
TA
– 20 to + 85
°C
Storage
temperature
TSTG
– 65 to + 150
°C
Table 16–2. D.C. Electrical Characteristics
(TA = – 20°C to + 85°C, VDD = 4.5 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
0.8 VDD
–
VDD
V
–
0.2 VDD
V
Input high
VIH1
All input pins except VIH2
voltage
VIH2
XIN
Input low voltage
VIL1
All input pins except VIL2
VIL2
XIN
VOH1
VDD = 4.5 V to 5.5 V
IOH = – 1 mA
Port 1 only
VDD – 1.0
VOH2
VDD = 4.5 V to 5.5V
IOH = – 200 µA
All output pins except port 1
VDD – 1.0
Output high
voltage
16–2
VDD – 0.5
–
0.4
–
–
V
KS88C4404 MICROCONTROLLER
ELECTRICAL DATA
Table 16–2. D.C. Electrical Characteristics (Continued)
(TA = – 20°C to + 85°C, VDD = 4.5 V to 5.5 V)
Parameter
Output low
voltage
Input high leakage
current
Input low leakage
current
Output high
leakage current
Symbol
Conditions
Min
Typ
Max
Unit
VOL1
VDD = 4.5 V to 5.5 V
IOL = 2 mA
All output pins except port 5
–
–
0.4
V
VOL2
VDD = 4.5 V to 5.5 V
IOL = 1.5 mA
Port 5
ILIH1
VIN = VDD
All input pins except XIN
–
–
3
µA
ILIH2
VIN = VDD
XIN
ILIL1
VIN = 0 V
All input pins except XIN, and
ILIL2
VIN = 0 V
XIN
ILOH1
VOUT = VDD
All output pins except for
port 6
ILOH2
Port 6 (open-drain)
VOUT = 9 V
20
–
–
–3
µA
– 20
–
–
5
µA
20
Output low
leakage current
ILOL
VOUT = 0 V
–
–
–5
µA
Pull-up resistor
RL1
VIN = 0 V; VDD = 5 V ± 10%
Ports 0, 1, 4, 5, and RxD
30
46
80
kΩ
RL2
VIN = 0 V; VDD = 5 V ± 10%
only
120
230
320
IDD1
VDD = 5 V ± 10%
25 MHz crystal oscillator
–
35
50
Supply current (1)
IDD2
IDD3
VDD = 5 V ± 10%
10 MHz crystal oscillator
30
Idle mode: VDD = 5 V ± 10%
25 MHz crystal oscillator
11
Idle mode: VDD = 5 V ± 10%
10 MHz crystal oscillator
5
Stop mode;
VDD = 5 V ± 10%
3
mA
25
20
µA
NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads.
16–3
ELECTRICAL DATA
KS88C4404 MICROCONTROLLER
Table 16–3. A.C. Electrical Characteristics
(TA = – 20°C to + 85°C, VDD = 4.5 V to 6.0V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Interrupt input
high, low width
tINTH,
tINTL
P3.0–P3.3, P4.0–P4.7
3
–
–
tCPU
input low
tRSL
Input
22
–
–
tCPU
width
NOTES:
1. The unit tCPU means one CPU clock period.
2. The oscillator frequency is the same as CPU clock frequency.
tINTL
tINTH
0.8 VDD
0.2 VDD
Figure 16–1. Input Timing for External Interrupts (Ports 3 and 4)
t RSL
RESET
0.2 V DD
Figure 16–2. Input Timing for
16–4
KS88C4404 MICROCONTROLLER
ELECTRICAL DATA
Table 16–4. Input/Output Capacitance
(TA = – 20°C to + 85°C, VDD = 0 V )
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Input
capacitance
CIN
f = 1 MHz; unmeasured pins
are returned to VSS
–
–
10
pF
Output
capacitance
COUT
I/O capacitance
CIO
Table 16–5. Data Retention Supply Voltage in Stop Mode
(TA = – 20°C to + 85°C)
Parameter
Symbol
Data retention
supply voltage
VDDDR
Data retention
supply current
IDDDR
Conditions
VDDDR = 2 V
Min
Typ
Max
Unit
2
–
6
V
–
–
5
µA
OSCILLATION
STABILIZATION
TIME
RESET
OCCURS
NORMAL
OPERATING
MODE
STOP MODE
DATA RETENTION MODE
VDD
VDDDR
EXECUTION OF
STOP INSTRUCTION
RESET
0.2 V DD
NOTE: t WAIT is the same as 4096 x 32 x 1 / f
OSC .
t WAIT
Figure 16–3. Stop Mode Release Timing Initiated by
16–5
ELECTRICAL DATA
KS88C4404 MICROCONTROLLER
Table 16–6. A/D Converter Electrical Characteristics
(TA = – 20°C to + 85°C, VDD = 4.5 V to 6.0 V, VSS = 0 V)
Parameter
Symbol
Conditions
Min
Typ
8
8
8
bit
–
–
|3|
LSB
tCON
tCPU ×
192 (3)
–
–
µs
Analog reference
voltage
AVREF
2.56
–
VDD
V
Analog ground
AVSS
VSS
–
–
V
Analog input
voltage
VIAN
AVSS
–
AVREF
V
Analog input
impedance
RAN
2
–
–
Resolution
Absolute
accuracy (1)
Conversion
time (2)
VDD = 5.12 V
CPU clock = 18 MHz
AVREF = 5.12 V
AVSS = 0 V
Max
Unit
M
NOTES:
1. Excluding quantization error, absolute accuracy equals ± 1/2 LSB.
2. 'Conversion time' is the time required from the moment a conversion operation starts until it ends.
3. tCPU is the CPU clock period.
Table 16–7. Serial Port Timing Characteristics in Mode 0 (10 MHz)
(TA = – 20°C to + 85°C, VDD = 4.5 V to 6.0V, VSS = 0 V)
Parameter
Symbol
Min
Typ
Max
Unit
tSCK
500
tCPU × 6
700
ns
Output data setup to clock rising edge
tS1
300
tCPU × 5
–
Clock rising edge to input data valid
tS2
–
–
300
Output data hold after clock rising edge
tH1
50
tCPU
–
Input data hold after clock rising edge
tH2
0
–
–
tHIGH,
tLOW
200
tCPU × 3
400
Serial port clock cycle time
Serial port clock high, low width
NOTES:
1. All times are in ns and assume a 10 MHz input frequency.
2. The unit tCPU means one CPU clock period.
3. The oscillator frequency is identical to the CPU clock frequency.
16–6
KS88C4404 MICROCONTROLLER
ELECTRICAL DATA
t HIGH
0.8 VDD
0.2 VDD
tLOW
tSCK
Figure 16–4. Serial Clock Waveform
16–7
SHIFT
CLOCK
DATA
OUT
DATA
IN
NOTE:
tS1
D0
tSCK
VALID
t H1
tS2
D1
VALID
tH2
D2
VALID
Output data setup to clock rising edge
Serial port clock cycle time
D3
VALID
The symbols shown in this diagram are defined as follows:
tSCK
Input data hold after clock rising edge
Output data hold after clock rising edge
Clock rising edge to input data valid
tS1
tS2
tH1
tH2
D4
VALID
D5
VALID
D6
VALID
D7
VALID
16–8
KS88C4404 MICROCONTROLLER
ELECTRICAL DATA
Figure 16–5. Serial Port Timing in Mode 0 (Shift Register Mode)
KS88C4404 MICROCONTROLLER
ELECTRICAL DATA
Table 16–8. External Memory Timing Characteristics (10 MHz)
(TA = – 20°C to + 85°C, VDD = 4.5 V to 6.0 V)
Number
Symbol
Parameter
Normal Timing
Extended Timing
Min
Max
Min
Max
↑ delay
10
–
50
–
tdAS (A)
↑ to address float delay
35
–
85
–
3
tdAS (DR)
↑ to read data required valid
–
140
–
335
4
twAS
low width
35
–
85
–
5
tdA (DS)
0
–
0
–
6a
twDS (read)
(read) low width
125
–
275
–
6b
twDS (write)
(write) low width
65
–
165
–
7
tdDS (DR)
↓ to read data required valid
–
80
–
255
8
thDS (DR)
↑ hold time
0
–
0
–
9
tdDS (A)
↑ to address active delay
20
–
70
–
10
tdDS (AS)
↑ to
30
–
80
–
11
tdDO (DS)
10
–
50
–
12
tdAS (W)
↑ to wait delay
–
90
–
335
13
thDS (W)
↑ to wait hold time
0
–
0
–
14
tdRW (AS)
20
–
70
–
15
tdDS (DW)
20
–
70
–
1
tdA (AS)
2
Address valid to
↓
Address float to
Read data to
↓ delay
Write data valid to
R/ valid to
(write) ↓ delay
↑ delay
↑ to write data not valid delay
NOTES:
1. All times are in ns and assume a 10 MHz input frequency.
2. Wait states add 100 ns to the time of numbers 3, 6a, 6b, and 7.
3. Auto-wait states add 100 ns to the time of number 12.
16–9
ELECTRICAL DATA
KS88C4404 MICROCONTROLLER
R/ W
14
PORT A
A8–A15, DM
DM
3
PORT AD
A0–A7
1
9
D0–D7 OUT
2
D0–D7
IN
OUT
11
10
AS
8
5
4
7
DS
6
WAIT (P3.7)
15
WAIT WINDOW
12
13
Figure 16–6. External Memory Read and Write Timing
(See Table 15–7 for a description of each timing point.)
16–10
KS88C4404 MICROCONTROLLER
ELECTRICAL DATA
V DD
REFERENCE
VOLTAGE
INPUT
R
AV REF
10 µF
+
–
C 103
ANALOG
INPUT PIN
V DD
ADC0–ADC7
KS88C4404
C 101
AV SS
V SS
NOTE: The symbol 'R' signifies an offset resistor with a value of from 50 to 100 Ohms.
If this resistor is omitted, the absolute accuracy will be maximum of 4 LSBs.
Figure 16–7. Recommended A/D Converter Circuit for Highest Absolute Accuracy
16–11
ELECTRICAL DATA
KS88C4404 MICROCONTROLLER
Table 16–9. Main Oscillator Frequency (fOSC1)
(TA = – 20°C + 85°C, VDD = 4.5 V to 6.0 V)
Oscillator
Crystal
Clock Circuit
C1
XIN
Min
Typ
Max
Unit
CPU clock oscillation
frequency
Test Condition
1
–
18
MHz
CPU clock oscillation
frequency
1
–
18
MHz
XIN input frequency
1
–
18
MHz
XOUT
C2
Ceramic
C1
XIN
XOUT
C2
External clock
a
XIN
XOUT
a
Table 16–10. Recommended Oscillator Constants
(TA = – 20°C + 85°C, VDD = 4.5 V to 6.0 V)
Manufacturer
TDK
Product Name
Oscillator Voltage
Range (V)
Remarks
C1
C2
MIN
MAX
CCR20.0MS6
5
5
4.5
5.5
SMD Type
CCR24.0M6
5
5
4.5
5.5
SMD Type
CCR25.0M6
–
5
4.5
5.5
SMD Type
NOTE: On-chip C: 30pF ±20% built in.
16–12
Load Cap (pF)
KS88C4404 MICROCONTROLLER
ELECTRICAL DATA
Table 16–11. Main Oscillator Clock Stabilization Time (tST1)
(TA = – 20°C + 85°C, VDD = 4.5 V to 6.0 V)
Oscillator
Test Condition
Min
Typ
Max
Unit
Crystal
VDD = 4.5 V to 6.0 V
–
–
20
ms
Ceramic
Stabilization occurs when VDD is equal to the minimum
oscillator voltage range.
–
–
10
ms
External clock
XIN input high and low level width (tXH, tXL)
25
–
500
ns
NOTE: Oscillation stabilization time (tST1) is the time required for the CPU clock to return to its normal oscillation
frequency after a power-on occurs, or when Stop mode is ended by a
signal. The RESET should therefore be held
at low level until the tST1 time has elapsed (see Figure 15–3).
1 / fOSC1
tXL
tXH
VDD – 0.5 V
XIN
0.4 V
Figure 16–8. Clock Timing Measurement at XIN
16–13
ELECTRICAL DATA
KS88C4404 MICROCONTROLLER
CHARACTERISTIC CURVES
NOTE
The characteristic values shown in the following graphs are based on actual test measurements. They do
not, however, represent guaranteed operating values.
(T A = 25 °C)
38
f OSC = 25 MHz
36
I DD1 (mA)
34
f OSC = 20 MHz
32
f OSC = 10 MHz
30
28
26
24
22
4.5
5.0
V DD (V)
Figure 16–9. IDD1 vs VDD
16–14
5.5
KS88C4404 MICROCONTROLLER
ELECTRICAL DATA
(T A = 25 °C)
13
12
11
I DD2 (mA)
10
f OSC = 25 MHz
9
f OSC = 20 MHz
8
7
f OSC = 10 MHz
6
5
4
4.5
5.0
5.5
V DD (V)
Figure 16–10. IDD2 vs VDD
(T A = 25 °C)
280
260
240
I DD3 (nA)
220
200
180
160
140
120
100
4.5
5.0
5.5
V DD (V)
Figure 16–11. IDD3 vs VDD
16–15
ELECTRICAL DATA
KS88C4404 MICROCONTROLLER
(T A = 25 °C)
18
16
I OL (mA)
14
12
VDD = 5.5 V
10
VDD = 4.5 V
8
6
4
2
0
0.2
0.4
0.6
V OL1 (V)
Figure 16–12. IOL vs VOL1
16–16
0.8
1.0
1.2
KS88C4404 MICROCONTROLLER
ELECTRICAL DATA
(T A = 25 °C)
18
16
I OL (mA)
14
12
VDD = 5.5 V
10
VDD = 4.5 V
8
6
4
2
0
0.2
0.4
0.6
0.8
1.0
1.2
V OL2 (V)
Figure 16–13. IOL vs VOL2
16–17
ELECTRICAL DATA
KS88C4404 MICROCONTROLLER
(T A = 25 °C)
-12
-11
-10
-9
VDD = 5.5 V
-8
I OH (mA)
-7
-6
-5
VDD = 4.5 V
-4
-3
-2
-1
0
2.4
3.0
3.6
V OH2 (V)
Figure 16–14. IOH vs VOH2
16–18
4.2
4.8
5.4
KS88C4404 MICROCONTROLLER
17
MECHANICAL DATA
MECHANICAL DATA
23.90 ± 0.3
0~8°
20.00 ± 0.2
+0.10
14.00 ± 0.2
0.10 MAX
80-QFP-1420C
0.80 ± 0.20
17.90 ± 0.3
0.15 - 0.05
(1.00)
#80
#1
0.80
0.05 MIN
2.65 ± 0.10
0.35 ± 0.1
± 0.15 MAX
(0.80)
3.00 MAX
0.80 ± 0.20
NOTE: Dimensions are in millimeters.
Figure 17–1. KS88C4404 QFP Standard Package Dimensions (in Millimeters)
17–1
MECHANICAL DATA
KS88C4404 MICROCONTROLLER
14.00BSC
0~7°
12.00BSC
0.09~0.20
0.65 ± 0. 15
12.00BSC
14.00BSC
0.10 MAX
80-TQFP-1212-AN
0.25GAUGE PLANE
#80
0.05~0.15
1.00 ± 0.05
#1
1.20 MAX
0.50
0.17~0.27
±
(1.25)
0.08 MAX M
NOTE: Dimensions are in millimeters.
Figure 17–2. KS88C4404 TQFP Standard Package Dimensions (in Millimeters)
17–2