SAMSUNG KS86C6104

KS86C6104/P6104
1
PRODUCT OVERVIEW
PRODUCT OVERVIEW
SAM87RI PRODUCT FAMILY
Samsung's SAM87RI family of 8-bit single-chip CMOS microcontrollers offer fast and efficient CPU, a wide range
of integrated peripherals, and supports OTP device.
A dual address/data bus architecture and bit- or nibble-configurable I/O ports provide a flexible programming
environment for applications with varied memory and I/O requirements. Timer/counters with selectable operating
modes are included to support real-time operations.
KS86C6104/P6104 MICROCONTROLLER
The KS86C6104/P6104 microcontroller with USB function can be used in a wide range of general purpose
applications. It is especially suitable for mouse or joystick controller and is available in 20-pin DIP and 24-pin
SOP package.
The KS86C6104/P6104 single-chip 8-bit microcontroller is fabricated using an advanced CMOS process. It is
built around the powerful SAM87RI CPU core.
Stop and Idle power-down modes were implemented to reduce power consumption. To increase on-chip register
space, the size of the internal register file was logically expanded. The KS86C6104/P6104 has 4 Kbytes of
program memory on-chip and 208 bytes of RAM including 16 bytes of working register.
Using the SAM87Ri design approach, the following peripherals were integrated with the SAM87Ri core:
— Two configurable I/O ports (11 pins)
— 7 bit-programmable pins for external interrupts
— 8-bit timer/counter with two operating modes
OTP
The KS86C6104 microcontroller is also available in OTP (One Time Programmable) version, KS86P6104.
KS86P6104 microcontroller has an on-chip 4-Kbyte one-time-programmable EPROM instead of masked ROM.
The KS86P6104 is comparable to KS86C6104, both in function and in pin configuration.
1-1
PRODUCT OVERVIEW
KS86C6104/P6104
FEATURES
CPU
Timer/Counter
•
•
One 8-bit basic timer for watchdog function and
programmable oscillation stabilization interval
generation function
•
One 8-bit timer/counter with Compare/Overflow
counter
SAM87RI CPU core
Memory
•
4-Kbyte internal program memory (ROM)
•
208-byte RAM
•
16 bytes of working register
Instruction Set
•
41 instructions
•
IDLE and STOP instructions added for powerdown modes
USB Serial Bus
•
Compatible to USB low speed (1.5 Mbps) device
1.0 specification.
•
Serial bus interface engine (SIE)
— Packet decoding/generation
— CRC generation and checking
— NRZI encoding/decoding and bit-stuffing
Instruction Execution Time
•
1.0 µs at 6 MHz fOSC
Interrupts
•
12 interrupt sources with one vector
•
One level, one vector interrupt structure
Oscillation Circuit Options
•
6 MHz crystal/ceramic oscillator
•
External clock source
General I/O
•
1-2
11 bit-programmable I/O pins
•
Two 8-byte receive/transmit USB buffer
Operating Temperature Range
•
– 40°C to + 85°C
Operating Voltage Range
•
4.0 V to 5.25 V
Package Types
•
20-pin DIP
•
24-pin SOP
Comparator
•
4-channel mode, 4-bit resolution
•
3-channel mode, external reference
low EMI design
KS86C6104/P6104
PRODUCT OVERVIEW
BLOCK DIAGRAM
I/O PORT AND
INTERRUPT CONTROL
PORT 1/
COMPARATOR
P1.0/CIN0/SCLK
P1.1/CIN1/SDAT
P1.2/CIN2
P1.3/CIN3
P1.4/INT1
P1.5/INT1
P1.6/INT1
P1.7/INT1
SAM87RI
CPU
PORT 0
P0.0/INT0
P0.1/INT0
P0.2/INT0
RESET
TEST
XIN
XOUT
OSC
BASIC
TIMER
TIMER 0
4-KB ROM
208-BYTE
REGISTER
USB
SIE
D+
D3.3Vout
Figure 1-1. Block Diagram
1-3
PRODUCT OVERVIEW
KS86C6104/P6104
PIN ASSIGNMENTS
VSS
1
20
VDD
Xout
2
19
P1.0/CIN0
Xin
3
18
P1.1/CIN1
TEST
4
17
P1.2/CIN2
P0.0/INT0
5
KS86C6104
16
P1.3/CIN3
P0.1/INT0
6
(TOP VIEW)
15
P1.4/INT1
RESET
7
14
P1.5/INT1
P0.2/INT0
8
13
3.3Vout
P1.7/INT1
9
12
D+
P1.6/INT1
10
11
D-
Figure 1-2. Pin Assignment Diagram (20-Pin DIP Package)
1-4
KS86C6104/P6104
PRODUCT OVERVIEW
VSS
1
24
VDD
Xout
2
23
P1.0/CIN0
Xin
3
22
P1.1/CIN1
NC
4
21
NC
TEST
5
20
P1.2/CIN2
P0.0/INT0
6
KS86C6104
19
P1.3/CIN3
P0.1/INT0
7
(TOP VIEW)
18
P1.4/INT1
8
17
P1.5/INT1
9
16
NC
P0.2/INT0
10
15
3.3V out
P1.7/INT1
11
14
D+
P1.6/INT1
12
13
D-
RESET
NC
Figure 1-3. Pin Assignment Diagram (24-Pin SOP Package)
1-5
PRODUCT OVERVIEW
KS86C6104/P6104
PIN DESCRIPTIONS
Table 1-1. KS86C6104/P6104 Pin Descriptions
Pin
Names
Pin
Type
P0.0–P0.2
I/O
P1.0–P1.3
Pin
Description
Circuit
Number
Pin
Numbers
Share
Pins
Bit-programmable I/O port for Schmitt trigger
input or push-pull output. Pull-up resistors are
individually assignable to input pins by software
and are automatically disable for output pins.
Port0 can be individually configured as external
interrupt inputs.
D
5, 6, 8
INT0
I/O
Bit-programmable I/O port for Schmitt trigger
input or push-pull output. Pull-up resistors are
individually assignable to input pins by software.
Port1.0–1.3 can be configured as comparator
input
F-8
19–16
CIN0–
CIN3
P1.4-P1.7
I/O
Bit-programmable I/O port for Schmitt trigger
input or push-pull output. Pull-up resistors are
individually assignable to input pins by software
and are automatically disabled for output pins.
Port1.4–1.7 can be individually configured as
external interrupt inputs.
D
15, 14, 10, 9
INT1
D+/D-
I/O
Only used as USB tranceive/receive port.
–
12–11
–
3.3VOUT
O
Internal regulator 3.3 V output pin for referencing
the voltage
–
13
–
XIN, XOUT
–
System clock input and output pin
(crystal/ceramic oscillator, or external clock
source)
–
3–2
–
INT0
I
External interrupt for bit-programmable port0.
D
5, 6, 8
Port0
INT1
I
External interrupt for bit-programmable port1
D
9, 10, 14, 15
Port1
RESET
I
RESET signal input pin.
–
7
–
TEST
I
Test signal input pin (for factory use only; must
be connected to VSS)
–
4
–
VDD
–
Power input pin
–
20
–
VSS
–
VSS is a ground power for CPU core.
–
1
–
1-6
KS86C6104/P6104
PRODUCT OVERVIEW
PIN CIRCUITS
Table 1-2. Pin Circuit Assignments for the KS86C6104/P6104
Circuit Number
Circuit Type
KS86C6104/P6104 Assignments
C
O
D
I/O
Port0, Port1.4–1.7, INT0, INT1
F-8
I/O
Port1.0–1.3
NOTE: Diagrams of circuit types C–D, and F-8 are presented below.
VDD
VDD
PULL-UP
ENABLE
DATA
OUT
DATA
OUTPUT
DISABLE
Figure 1-4. Pin Circuit Type C
OUTPUT
DISABLE
CIRCUIT
TYPE C
IN/OUT
Figure 1-5. Pin Circuit Type D
1-7
PRODUCT OVERVIEW
KS86C6104/P6104
VDD
PULL-UP
ENABLE
VDD
DATA
OUTPUT
DISABLE
CIRCUIT
TYPE C
ANALOG/
EXTERNAL
VREF INPUT
Figure 1-6. Pin Circuit Type F-8
1-8
IN/OUT
KS86C6104/P6104
PRODUCT OVERVIEW
Right Button
KS86P6104
1
CON_B
XIN
Button
2 3
P0.0/INT0
XOUT
Left Button
Button
1
VDD
2
3
P0.1/INT0
C3
VSS
C4
P1.7/INT1
V3.3
USB Cable
R1
2
5
4
3
2
1
D-
P1.3/CIN3
1
2
D+
P1.2/CIN2
3
R2
2
RESET
P1.1/CIN1
1
R3
2
P0.2/INT0
P1.0/CIN0
3
+
1
C2
Array 4
C1
+
1
5
4
3
2
1
Figure 1-7. USB Mouse Circuit Diagram
1-9
PRODUCT OVERVIEW
KS86C6104/P6104
NOTES
1-10
KS86C6104/P6104
13
ELECTRICAL DATA
ELECTRICAL DATA
OVERVIEW
In this section, the following KS86C6104/P6104 electrical characteristics are presented in tables and graphs:
— Absolute maximum ratings
— D.C. electrical characteristics
— I/O capacitance
— A.C. electrical characteristics
— Input timing for RESET
— Oscillator characteristics
— Operating voltage range
— Oscillation stabilization time
— Clock timing measurement points at XIN
— Data retention supply voltage in Stop mode
— Stop mode release timing when initiated by a RESET
— Stop mode release timing when initiated by an external interrupt
— Characteristic curves
— Comparator Electrical Characteristics
13-1
ELECTRICAL DATA
KS86C6104/P6104
Table 13-1. Absolute Maximum Ratings
(TA = 25°C)
Parameter
Symbol
Conditions
Supply voltage
VDD
–
Input voltage
VIN
Output voltage
Output current high
Output current low
Rating
Unit
– 0.3 to + 6.5
V
All in ports
– 0.3 to VDD + 0.3
V
VO
All output ports
– 0.3 to VDD + 0.3
V
I OH
One I/O pin active
– 18
All I/O pins active
– 60
One I/O pin active
+ 30
Total pin current for ports 0, 1
+ 100
I OL
mA
mA
Operating
temperature
TA
–
– 40 to +85
°C
Storage
temperature
TSTG
–
– 65 to + 150
°C
13-2
KS86C6104/P6104
ELECTRICAL DATA
Table 13-2. D.C. Electrical Characteristics
(TA = – 40°C to + 85°C, VDD = 4.0 V to 5.25 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
VIH1
All input pins except VIH2, D+, D–
0.8 VDD
–
VDD
V
VIH2
XIN
VIL1
All input pins except VIL2, D+, D–
–
–
0.2 VDD
VIL2
XIN
–
–
0.4
Output high voltage
VOH
VDD = 4.5 V – 5.5 V
IOH = – 200 µA
All output ports except D+, D–
VDD – 1.0
–
–
V
Output low voltage
VOL
VDD = 4.5 V – 5.5 V
IOL = 2 mA
All output ports except D+, D–
–
–
0.4
V
Input high leakage
current
ILIH1
VIN = VDD
All inputs except ILIH2
except D+, D–
–
–
3
µA
ILIH2
VIN = VDD
XIN, XOUT
–
–
20
ILIL1
VIN = 0 V
All inputs except ILIL2
except D+, D–
–
–
–3
ILIL2
VIN = 0 V
XOUT, XIN
–
–
– 20
Output high leakage
current
ILOH
VOUT = VDD
All output pins except D+, D–
–
–
3
µA
Output low leakage
current
ILOL
VOUT = 0 V
All output pins except D+, D–
–
–
–3
µA
Pull-up resistors
RL1
VIN = 0 V; VDD = 5.0 V,
25
50
100
KΩ
RL2
VIN = 0 V; VDD = 5.0 V,
RESET only
100
220
400
IDD1
Normal operation mode
6-MHz CPU clock
–
6.5
15
mA
IDD2
Idle mode;
6-MHz CPU clock
–
4
8
mA
IDD3
Stop mode;
oscillator stop
–
150
300
µA
Input highvoltage
Input low voltage
Input low leakage
current
Supply current (note)
VDD – 0.5
VDD
V
µA
NOTES:
1. Supply current does not include current drawn through internal pull-up resistors or external output current load.
2. This parameter is guaranteed, but not tested (include D+, D–).
3. Only in 4.2 V to 5.25 V, D+ and D– satisfy the USB spec 1.0.
13-3
ELECTRICAL DATA
KS86C6104/P6104
Table 13-3. Input/Output Capacitance
(TA = – 40°C to + 85°C, VDD = 0 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Input
capacitance
CIN
f = 1 MHz; unmeasured pins
are connected to VSS
–
–
10
pF
Output
capacitance
COUT
Min
Typ
Max
Unit
100
–
200
ns
I/o capacitance
CIO
Table 13-4. A.C. Electrical Characteristics
(TA = – 40°C to + 85°C, VDD = 4.0 V to 5.25 V)
Parameter
Noise filter
Symbol
Conditions
tNF1H, tNF1L P1 (RC delay)
RESET input
low width
tNF2
RESET only (RC delay)
–
800
–
tRSL
Input
10
–
–
t NF1L
t NF1H
t NF2
0.8 V DD
0.5 V DD
0.2 V DD
t RSL
RESET
0.5VDD
Figure 13-1. Input Timing for RESET
13-4
µs
KS86C6104/P6104
ELECTRICAL DATA
Table 13-5. Oscillator Characteristics
(TA = – 40°C + 85°C)
Oscillator
Main crystal Main
ceramic
(fOSC)
Clock Circuit
Test Condition
Min
Typ
Max
Unit
Oscillation frequency
VDD = 4.0 V – 5.25 V
–
6.0
–
MHz
Oscillation frequency
VDD = 4.0 V – 5.25 V
–
6.0
–
Test Condition
Min
Typ
Max
Unit
VDD = 4.5 V to 5.5 V, fOSC > 6.0 MHz
(Oscillation stabilization occurs when VDD is equal to
the minimum oscillator voltage range.)
–
–
10
ms
tWAIT stop mode release time by a reset
–
216/fOSC
–
tWAIT stop mode release time by an interrupt
–
–
–
XIN
C1
C2
XOUT
External clock
XIN
XOUT
Table 13-6. Oscillation Stabilization Time
(TA = – 40°C + 85°C, VDD = 4.0 V to 5.25 V)
Oscillator
Main crystal
Main ceramic
Oscillator
stabilization wait
time
NOTE: The oscillator stabilization wait time, tWAIT, when it is released by an interrupt, is determined by the setting in the
basic timer control register, BTCON.
13-5
ELECTRICAL DATA
KS86C6104/P6104
1 / f OSC
tXL
tXH
XIN
VDD – 0.5 V
0.4 V
Figure 13-2. Clock Timing Measurement Points at XIN
Table 13-7. Data Retention Supply Voltage in Stop Mode
(TA = 0°C to + 70°C)
Parameter
Symbol
Conditions
Data retention
supply voltage
VDDDR
Stop mode
Data retention
supply current
IDDDR
Stop mode; VDDDR = 2.0 V
13-6
Min
Typ
Max
Unit
2.0
–
6
V
–
–
5
µA
KS86C6104/P6104
ELECTRICAL DATA
∼
INTERNAL
RESET
STOP MODE
IDLE MODE
(BASIC TIMER
ACTIVE)
∼
DATA RETENTION MODE
VDD
NORMAL
OPERATING
MODE
VDDDR
EXECUTION OF
STOP
RESET
0.5 V DD
t WAIT
∼
Figure 13-3. Stop Mode Release Timing When Initiated by a RESET
IDLE MODE
(BASIC TIMER
ACTIVE)
STOP MODE
∼
DATA RETENTION MODE
VDD
NORMAL
OPERATING
MODE
VDDDR
EXTERNAL
INTERRUPT
EXECUTION OF
STOP INSTRUCTION
0.8 VDD
0.2 VDD
tWAIT
Figure 13-4. Stop Mode Release Timing When Initiated by an External Interrupt
13-7
ELECTRICAL DATA
KS86C6104/P6104
Table 13-8. Comparator Electrical Characteristics
(TA = – 40°C to + 85°C, VDD = 4.0 V to 5.25 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Conversion time (1)
tCON
–
–
4 × 24
or
4 × 27
–
FCPU
Comparator input
voltage
VICN
–
VSS
–
VDD
V
Comparator input
impedance
RCN
–
2
1000
–
MΩ
Comparator
reference voltage
VREF
–
1.8
–
VDD
V
Comparator input
current
ICIN
VDD = 5 V
–3
–
3
µA
Reference input
current
IREF
VDD = 5 V
–3
–
3
µA
Comparator block
ICOM
VDD = 5.5 V
–
1
2
mA
VDD = 4.5 V
0.5
1
mA
VDD = 5 V
(when power down mode)
100
500
nA
current (2)
NOTES:
1. Conversion time is the time required from the moment a conversion operation starts until it ends.
2. ICOM is an operating current during conversion.
13-8
KS86C6104/P6104
ELECTRICAL DATA
Table 13-9. Low Speed Source Electrical Characteristics (USB)
(TA = – 40°C to + 85°C, Voltage Regulator Output V33out = 2.8 V to 3.5 V, typ 3,3 V)
Parameter
Symbol
Conditions
Min
Max
Unit
ns
Transition Time:
Rise Time
Tr
CL = 50 pF
CL = 350 pF
75
–
–
300
Fall Time
Tf
CL = 50 pF
CL = 350 pF
75
–
–
300
Rise/Fall Time Matching
Trfm
(Tr/Tf) CL = 50 pF
70
130
%
Output Signal Crossover Voltage
Vcrs
CL = 50 pF
1.3
2.0
V
2.8
3.5
V
Voltage Regulator Output Voltage
Test
Point
V33OUT with V33OUT to GND 0.1 µF
capacitor
2.8V
S/W
90%
R2
90%
MEASUREMENT
POINTS
10%
10%
D.U.T
R1
CL
Tr
R1 = 15 K Ω
R2 = 1.5 K Ω
CL = 50pF-350pF
Tf
DM: S/W ON
DP: S/W OFF
Figure 13-5. USB Data Signal Rise and Fall Time
3.3 V
DP
MAX: 2.0 V
Vcrs
MIN: 1.3 V
DM
0V
Figure 13-6. USB Output Signal Crossover Point Voltage
13-9
ELECTRICAL DATA
KS86C6104/P6104
NOTES
13-10
KS86C6104/P6104 MICROCONTROLLER
14
MECHANICAL DATA
MECHANICAL DATA
OVERVIEW
This section contains the following information about the device package:
— Package dimensions in millimeters
— Pad diagram
#11
1.52 ± 0.1
2.54
0.25 +0.1
5.08MAX
0.46 ± 0.1
3.30 ± 0.3
26.40 ± 0.2
3.25 ± 0.2
#10
26.80 MAX
(1.77)
– 0.05
7.62
20-DIP-300A
#1
0-15°
0.51MIN
6.40 ± 0.2
#20
NOTE: Dimensions are in millimeters.
Figure 14-1. 20-DIP0300A Package Dimensions
14-1
MECHANICAL DATA
KS86C6104/P6104 MICROCONTROLLER
0-8°
#12
15.34 ± 0.2
0.38 ± 0.1
1.27
0.05MIN
15.74 MAX
(0.69)
+0.10
0.15 - 0.05
2.30 ± 0.2
#1
0.10 MAX
NOTE: Dimensions are in millimeters.
Figure 14-2. 24-SOP-375 Package Dimensions
14-2
0.85 ±0.20
24-SOP-375
9.53
7.50 ± 0.2
#13
2.70MAX
10.30 ± 0.3
#24
KS86C6104/P6104
15
KS86P6104 OTP
KS86P6104 OTP
OVERVIEW
The KS86P6104 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the
KS86C6104 microcontroller. It has an on-chip OTP ROM instead of masked ROM. The EPROM is accessed by
serial data format.
The KS86P6104 is fully compatible with the KS86C6104, both in function and in pin configuration. Because of its
simple programming requirements, the KS86P6104 is ideal for use as an evaluation chip for the KS86C6104.
VSS /VSS
1
20
VDD /VDD
Xout
2
19
P1.0/CIN0/SCLK
Xin
3
18
P1.1/CIN1/SDAT
TEST/TEST
4
17
P1.2/CIN2
P0.0/INT0
5
KS86P6104
16
P1.3/CIN3
P0.1/INT0
6
(TOP VIEW)
15
P1.4/INT1
/RESET
7
14
P1.5/INT1
P0.2/INT0
8
13
3.3Vout
P1.7/INT1
9
12
D+
P1.6/INT1
10
11
D-
RESET
Figure 15-1. KS86P6104 Pin Assignments (20-DIP Package)
15-1
KS86P6104 OTP
KS86C6104/P6104
VSS/V SS
1
24
VDD/ VDD
Xout
2
23
P1.0/CIN0/ SCLK
Xin
3
22
P1.1/CIN1/ SDAT
NC
4
21
NC
TEST/TEST
5
20
P1.2/CIN2
P0.0/INT0
6
KS86P6104
19
P1.3/CIN3
P0.1/INT0
7
(TOP VIEW)
18
P1.4/INT1
8
17
P1.5/INT1
9
16
NC
P0.2/INT0
10
15
3.3V out
P1.7/INT1
11
14
D+
P1.6/INT1
12
13
D-
RESET
/RESET
NC
Figure 15-2. KS86P6104 Pin Assignments (24-SOP Package)
15-2
KS86C6104/P6104
KS86P6104 OTP
Table 15-1. Descriptions of Pins Used to Read/Write the EPROM
Main Chip
During Programming
Pin Name
Pin Name
Pin No.
(20 DIP)
I/O
Function
P1.0 (Pin 18)
SDAT
18
I/O
Serial Data Pin (Output when reading, Input
when writing) Input and Push-pull Output Port
can be assigned
P1.1 (Pin 19)
SCLK
19
I/O
Serial Clock Pin (Input Only Pin)
TEST
VPP (TEST)
4
I
0V : OTP write and test mode
5V : Operating mode
RESET
RESET
7
I
Chip Initialization and EPROM Cell Writing
Power Supply Pin (Indicates OTP Mode
Entering) When writing 12.5V is applied and
when reading.
VDD/VSS
VDD/VSS
20/1
I
Logic Power Supply Pin.
Table 15-2. Comparison of KS86P6104 and KS86C6104 Features
Characteristic
KS86P6104
KS86C6104
Program Memory
4 K byte EPROM
4 K byte mask ROM
Operating Voltage (VDD)
4.0 V to 5.25 V
4.0 V to 5.25 V
OTP Programming Mode
VDD = 5 V, VPP (RESET)=12.5V
Pin Configuration
20 DIP/24 SOP
20 DIP/24 SOP
EPROM Programmability
User Program 1 time
Programmed at the factory
15-3
KS86P6104 OTP
KS86C6104/P6104
OPERATING MODE CHARACTERISTICS
When 12.5 V is supplied to the VPP (RESET) pin of the KS86P6104, the EPROM programming mode is entered.
The operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in
Table 14-3 below.
Table 15-3. Operating Mode Selection Criteria
VDD
5V
VPP
(RESET)
REG/
Address
(A15-A0)
R/W
MEM
Mode
5V
0
0000H
1
EPROM read
12.5 V
0
0000H
0
EPROM program
12.5 V
0
0000H
1
EPROM verify
12.5 V
1
0E3FH
0
EPROM read protection
NOTE: "0" means Low level; "1" means High level.
Table 15-4. D.C. Electrical Characteristics
(TA = – 40°C to + 85°C, VDD = 4.0 V to 5.25 V)
Parameter
Symbol
Supply Current (note)
IDD1
Normal mode;
6 MHz CPU clock
IDD2
Idle mode;
6 MHz CPU clock
IDD3
Stop mode;
oscillator stop
NOTE:
15-4
Conditions
Min
Typ
Max
Unit
–
6.5
15
mA
4
8
150
300
µA
Supply current does not include current drawn through internal pull-up resistors or external output current loads.
KS86C6104/P6104
KS86P6104 OTP
START
Address= First Location
VDD =5V, V PP=12.5V
x=0
Program One 1ms Pulse
Increment X
YES
x = 10
NO
FAIL
Verify Byte
Verify 1 Byte
Last Address
FAIL
NO
Increment Address
VDD = VPP= 5 V
FAIL
Compare All Byte
PASS
Device Failed
Device Passed
Figure 15-3. OTP Programming Algorithm
15-5
KS86P6104 OTP
KS86C6104/P6104
NOTES
15-6