STP16NS25 STP16NS25FP N-CHANNEL 250V - 0.23Ω - 16A TO-220 / TO-220FP MESH OVERLAY™ MOSFET TYPE STP16NS25 STP16NS25FP ■ ■ ■ VDSS RDS(on) ID 250 V 250 V < 0.28 Ω < 0.28 Ω 16 A 16 A TYPICAL RDS(on) = 0.23 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED 3 3 1 2 1 TO-220 DESCRIPTION Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performance. The new patented STrip layout coupled with the Company’s proprietary edge termination structure, makes it suitable in coverters for lighting applications. 2 TO-220FP INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-DC CONVERTERS FOR TELECOM, INDUSTRIAL, AND LIGHTING EQUIPMENT ■ IDEAL FOR MONITOR’s B+ FUNCTION ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value STP16NS25 VDS VDGR VGS Unit STP16NS25FP Drain-source Voltage (VGS = 0) 250 V Drain-gate Voltage (RGS = 20 kΩ) 250 V Gate- source Voltage ± 20 V ID Drain Current (continuos) at TC = 25°C 16 16(*) A ID Drain Current (continuos) at TC = 100°C 11 11(*) A Drain Current (pulsed) 64 64(*) A Total Dissipation at TC = 25°C 140 40 W 1 0.33 W/°C IDM (l) PTOT Derating Factor dv/dt (1) Peak Diode Recovery voltage slope VISO Insulation Withstand Voltage (DC) Tstg Storage Temperature Tj Max. Operating Junction Temperature (•)Pulse width limited by safe operating area May 2002 5 - V/ns 2500 –65 to 150 V °C (1) ISD≤ 16A, di/dt≤300 A/µs, VDD≤ V(BR)DSS , Tj≤TjMAX (*) Limited only by maximum temperature allowed 1/9 STP16NS25 - STP16NS25FP THERMAL DATA TO-220 TO-220FP °C/W 0.9 3 °C/W Rthj-case Thermal Resistance Junction-case Max Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Maximum Lead Temperature For Soldering Purpose 300 °C Tl AVALANCHE CHARACTERISTICS Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 16 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 600 mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Test Conditions Min. Typ. Max. 250 Unit Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 V Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating 1 µA VDS = Max Rating, TC = 125 °C 10 µA Gate-body Leakage Current (VDS = 0) VGS = ± 20 V ±100 nA ON (1) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 8 A Min. Typ. Max. Unit 2 3 4 V 0.23 0.28 Ω Typ. Max. Unit DYNAMIC Symbol gfs (1) 2/9 Parameter Forward Transconductance Test Conditions VDS > ID(on) x RDS(on)max, ID = 8 A VDS = 25V, f = 1 MHz, VGS = 0 Min. 15 S 1270 pF Ciss Input Capacitance Coss Output Capacitance 190 pF Crss Reverse Transfer Capacitance 74 pF STP16NS25 - STP16NS25FP ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Parameter Turn-on Delay Time Rise Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge Test Conditions Min. VDD = 125 V, ID = 8 A RG = 4.7Ω VGS = 10 V (see test circuit, Figure 3) VDD = 200V, ID = 16 A, VGS = 10V Typ. Max. Unit 14.5 ns 26 ns 59 83 nC 7.9 nC 22.3 nC SWITCHING OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit td(Voff) tf Turn-off- Delay Time Fall Time VDD = 125V, ID = 8 A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 3) 72 32 ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time Vclamp = 200V, ID = 16 A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 5) 24 28 56 ns ns ns SOURCE DRAIN DIODE Symbol ISD Parameter Test Conditions Min. Typ. Max. Unit Source-drain Current 16 A ISDM (2) Source-drain Current (pulsed) 64 A VSD (1) Forward On Voltage ISD = 16 A, VGS = 0 1.5 V trr Reverse Recovery Time Qrr Reverse Recovery Charge ISD = 16 A, di/dt = 100A/µs VDD = 30V, Tj = 150°C (see test circuit, Figure 5) IRRM Reverse Recovery Current 270 ns 1.5 µC 11.4 A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area for TO-220 Safe Operating Area for TO-220FP 3/9 STP16NS25 - STP16NS25FP Thermal Impedance for TO-220 Thermal Impedance for TO-220FP Output Characteristics Transfer Characteristics Transconductance 4/9 Static Drain-source On Resistance STP16NS25 - STP16NS25FP Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 STP16NS25 - STP16NS25FP Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STP16NS25 - STP16NS25FP TO-220 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 D1 0.107 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 DIA. 3.75 3.85 0.147 0.151 D1 C D A E L4 H2 G G1 F1 L2 F2 F Dia. L5 L9 L7 L6 L4 P011C 7/9 STP16NS25 - STP16NS25FP TO-220FP MECHANICAL DATA mm DIM. MIN. A 4.4 inch TYP. MAX. MIN. 4.6 0.173 TYP. MAX. 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 28.6 30.6 1.126 1.204 L4 9.8 10.6 0.385 0.417 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 B D A E L3 L3 L6 F2 H G G1 ¯ F F1 L7 1 2 3 L2 8/9 L4 STP16NS25 - STP16NS25FP Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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