STS3DNE60L ® N - CHANNEL 60V - 0.065Ω - 3A SO-8 STripFET POWER MOSFET PRELIMINARY DATA TYPE STS3DNE60L ■ ■ ■ V DSS R DS(on) ID 60 V < 0.08 Ω 3A TYPICAL RDS(on) = 0.065 Ω STANDARD OUTLINE FOR EASY AUTOMATED SURFACE MOUNT ASSEMBLY LOW THRESHOLD DRIVE DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique " Single Feature Size " strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. SO-8 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS DC MOTOR DRIVE ■ DC-DC CONVERTERS ■ BATTERY MANAGMENT IN NOMADIC EQUIPMENT ■ POWER MANAGEMENT IN PORTABLE/DESKTOP PCs ■ ABSOLUTE MAXIMUM RATINGS Symbol VDS V DGR V GS ID IDM (•) P tot Parameter Value Unit Drain-source Voltage (V GS = 0) 60 V Drain- gate Voltage (R GS = 20 kΩ) 60 V ± 20 V 3 A 1.9 A 12 A 2 1.6 W W Gate-source Voltage o Drain Current (continuous) at Tc = 25 C Single Operation Drain Current (continuous) at T c = 100 o C Single Operation Drain Current (pulsed) o Total Dissipation at T c = 25 C Dual Operation Total Dissipation at T c = 25 o C Sinlge Operation (•) Pulse width limited by safe operating area May 1999 1/5 STS3DNE60L THERMAL DATA R thj-amb Tj Tstg o 78 62.5 175 -55 to 150 *Thermal Resistance Junction-ambient Single Operation Dual Operation Maximum Operating Junction Temperature Storage Temperature o C/W C/W o C o C (*) Mounted on FR-4 board (t ≤ 10sec) ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbol V (BR)DSS Parameter Drain-source Breakdown Voltage Test Conditions I D = 250 µA Zero Gate Voltage V DS = Max Rating Drain Current (V GS = 0) V DS = Max Rating IGSS Gate-body Leakage Current (V DS = 0) Typ. Max. 60 V GS = 0 I DSS Min. Unit V T c = 125 o C V GS = ± 20 V 1 10 µA µA ± 100 nA Max. Unit ON (∗) Symbol Parameter Test Conditions V GS(th) Gate Threshold Voltage V DS = V GS R DS(on) Static Drain-source On Resistance I D(on) I D = 250 µA V GS = 10 V V GS = 4.5 V Min. 1 I D = 1.5 A I D = 1.5 A On State Drain Current V DS > I D(on) x R DS(on)max V GS = 10 V Typ. 1.7 2.5 V 0.065 0.08 0.08 0.1 Ω Ω 3 A DYNAMIC Symbol g fs (∗) C iss C oss C rss 2/5 Parameter Test Conditions Forward Transconductance V DS > I D(on) x R DS(on)max Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25 V f = 1 MHz I D = 1.5 A V GS = 0 V Min. Typ. Max. Unit 5 S 815 125 40 pF pF pF STS3DNE60L ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions t d(on) tr Turn-on Delay Time Rise Time V DD = 30 V I D = 10 A V GS = 5 V R G = 4.7 Ω (Resistive Load, see fig. 3) Qg Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD = 24 V I D = 3 A V GS = 4.5 V Min. Typ. Max. 20 45 Unit ns ns 13.5 8 3.5 18 nC nC nC Typ. Max. Unit SWITCHING OFF Symbol Parameter Test Conditions Min. t d(of f) tf Turn-off Delay Time Fall Time V DD = 30 V I D = 10 A V GS = 5 V R G = 4.7 Ω (Resistive Load, see fig. 3) 40 10 ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time V clamp = 48 V I D = 20 A V GS = 5 V R G = 4.7 Ω (Inductive Load, see fig. 5) 10 25 42 ns ns ns SOURCE DRAIN DIODE Symbol Parameter Test Conditions ISD I SDM (•) Source-drain Current Source-drain Current (pulsed) V SD (∗) Forward On Voltage I SD = 3 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 20 A di/dt = 100 A/µs V DD = 30 V T j = 150 o C (see test circuit, fig. 5) t rr Q rr I RRM Min. Typ. V GS = 0 Max. Unit 3 12 A A 1.2 V 65 ns 130 nC 4 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area 3/5 STS3DNE60L SO-8 MECHANICAL DATA mm DIM. MIN. TYP. A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.25 a2 MAX. 0.003 0.009 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.019 5.0 0.188 0.196 6.2 0.228 c1 45 (typ.) D 4.8 E 5.8 0.244 e 1.27 0.050 e3 3.81 0.150 F 3.8 4.0 0.14 0.157 L 0.4 1.27 0.015 0.050 M S 0.6 0.023 8 (max.) 0016023 4/5 STS3DNE60L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics © 1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com . 5/5