EMIF10-LCD02F3 10 line EMI filter and ESD protection for LCD and cameras Main product characteristics: Where EMI filtering in ESD sensitive equipment is required : ■ LCD for Mobile phones ■ Computers and printers ■ Communication systems ■ MCU Boards Flip-Chip (24 bumps) Description Pin Configuration (bump side) The EMIF10-LCD02F3 is a 10 lines highly integrated devices designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interferences. The EMIF10 flip chip packaging means the package size is equal to the die size. This filter includes ESD protection circuitry, which prevents damage to the application when subjected to ESD surges up 15kV. Benefits ■ Lead free package ■ EMI symmetrical (I/O) low-pass filter ■ High efficiency in EMI filtering ■ 400 µm pitch ■ Compatible with high speed data rate ■ Very low PCB space consuming: < 4mm2 ■ Very thin package: 0.60 mm 5 4 3 2 1 O1 O2 GND I1 I2 A O3 O4 I3 I4 B O5 O6 GND I5 I6 C O7 O8 GND I7 I8 D O9 O10 GND I9 I10 E Basic Cell Configuration Low-pass Filter ■ High efficiency in ESD suppression ■ High reliability offered by monolithic integration ■ High reducing of parasitic elements through integration and wafer level packaging GND Part Number Marking EMIF10-LCD02F3 GY GND GND Ri/o = 70Ω Cline = 30pF Complies with the following standards: IEC61000-4-2: Level 4 Order Code Output Input 15 kV (air discharge) 8 kV ( contact discharge) on inputs and outputs MIL STD 833E - Method 3015-6 Class 3 July 2005 Rev 1 1/8 www.st.com 8 EMIF10-LCD02F3 1 Electrical characteristics (Tamb = 25°C) Table 1. Absolute Maximum Ratings Symbol Tj Parameter Value Unit 125 °C Junction temperature Top Operating temperature range -40 to + 85 °C Tstg Storage temperature range -55 to +150 °C 1 Electrical characteristics (Tamb = 25°C) Symbol Parameter I VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage IPP Peak pulse current RI/O Series resistance between Input & Output Cline Input capacitance per line IF VF VCL VBR VRM Symbol 2/8 V IRM IR Test conditions IPP Min. Typ. Max. Unit 6 8 10 V 200 nA VBR IR = 1 mA IRM VRM = 3V 50 RI/O Tolerance ± 20% 70 Cline Vline = 0V, VOSE = 30 mV, F =1 MHz Ω 30 pF EMIF10-LCD02F3 Figure 1. 1 Electrical characteristics (Tamb = 25°C) S21(dB) all lines attenuation Figure 2. measurement and Aplac simulation Analog cross talk measurements 0.00 dB -10.00 -20.00 -30.00 -40.00 -50.00 -60.00 -70.00 -80.00 -90.00 -100.00 100.0k 1.0M 10.0M 100.0M 1.0G f/Hz Xtalk 1/2 Figure 3. ESD response to IEC61000-4-2 (+15kV air discharge) on one input and on one output ESD response to IEC61000-4-2 (-15kV air discharge) on one input and on one output Input 10V/d Input 10V/d Output 10V/d Output 10V/d 100ns/d Figure 5. Figure 4. 100ns/d Line capacitance versus applied voltage Cline (pF) 30 25 20 15 10 5 Vline (V) 0 0 1 2 3 4 5 6 3/8 EMIF10-LCD02F3 2 Aplac model 2 Aplac model Figure 6. Device structure (one cell) Lbump Rbump Rline Rbump Lbump O1 I1 MODEL = D1 MODEL = D2 bulk bulk MODEL = D3 Cbump Figure 7. Rbump Rbump Rbump Rbump Cbump Lbump Cbump Lbump Cbump Lbump Lbump Rgnd Rgnd Rgnd Rgnd Lgnd Lgnd Lgnd Lgnd Aplac model variables aplacvar Rline 70 aplacvar C_d1 15p aplacvar C_d2 15p aplacvar C_d3 600p aplacvar Ls 950pH aplacvar Rs 150m aplacvar Lbump 50pH aplacvar Rbump 20m aplacvar Cbump 150f aplacvar Lgnd 50pH aplacvar Rgnd 100m aplacvar Rsub 10m 4/8 Diode D1 BV=7 IBV=1m CJO=C_d1 M=0.28 RS=0.1 VJ=0.6 TT=100n Diode D2 BV=7 IBV=1m CJO=C_d2 M=0.28 RS=0.1 VJ=0.6 TT=100n Diode D3 BV=7 IBV=1m CJO=C_d3 M=0.28 RS=0.01 VJ=0.6 TT=100n EMIF10-LCD02F3 3 3 Ordering information scheme Ordering information scheme EMIF yy - xxx zz F3 EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version Package F = Flip-Chip 3 = Lead free Pitch = 400µm, Bump = 255µm 5/8 EMIF10-LCD02F3 4 Package information 4 Package information Figure 8. Mechanical data 185µm ± 10 Figure 9. Solder mask opening: 300µm minimium Solder stencil opening : 220µm recommended 6/8 605µm ± 55 185µm ± 10 1.97mm ± 30µm Foot print recommendations Copper pad Diameter: 220µm recommended 260µm maximum 255µm± 40 1.97mm ± 30µm 400µm ± 40 400µm ± 40 Figure 10. Marking Dot, ST logo xx = marking z = packaging location yww = datecode (y = year ww = week) E x x z y ww EMIF10-LCD02F3 5 5 Flip-chip tape and reel specifications Flip-chip tape and reel specifications Dot identifying Pin A1 location 3.5 +/- 0.1 ST E xxz yww 4 +/- 0.1 User direction of unreeling All dimensions in mm 7 ST E xxz yww ST E xxz yww 8 +/- 0.3 0.73 +/- 0.05 6 1.75 +/- 0.1 Ø 1.5 +/- 0.1 4 +/- 0.1 Ordering information Part Number Marking Package Weight Base qty Delivery mode EMIF10-LCD02F3 GY Flip-Chip 5.0 mg 5000 Tape & reel (7”) Revision history Date Revision 11-Jul-2005 1 Changes Initial release. 7/8 EMIF10-LCD02F3 7 Revision history Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. 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