FAIRCHILD FDMQ86530L

FDMQ86530L
N-Channel PowerTrench® MOSFET
60 V, 8 A, 17.5 mΩ
Features
General Description
This quad MOSFET solution provides ten-fold improvement in
power dissipation over diode bridge.
„ Max rDS(on) = 17.5 mΩ at VGS = 10 V, ID = 8 A
„ Max rDS(on) = 23 mΩ at VGS = 6 V, ID = 7 A
„ Max rDS(on) = 25 mΩ at VGS = 4.5 V, ID = 6.5 A
„ Substantial efficiency benefit in PD solutions
Application
„ RoHS Compliant
„ Active bridge
Bottom
Top
G4
D1/D4
D3/S4
G3
S3
S3
Pin 1
G1
D1/D4
S1/D2
G2
S2
S2
D1/D4
D3/
S4
S1/
D2
G1
G4
D1/D4
S1/D2
D1/D4
Q1
Q4
G2
G3
S2
S2
D3/S4
S3
Q2
Q3
S3
MLP 4.5x5
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current -Continuous
TC = 25 °C
-Continuous
TA = 25 °C
ID
TJ, TSTG
Units
V
±20
V
8
(Note 1a)
-Pulsed
PD
Ratings
60
8
A
50
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
22
(Note 1a)
Operating and Storage Junction Temperature Range
1.9
-55 to +150
W
°C
Thermal Characteristics
RθJA
Thermal Resistance, Junction to Ambient
(Note 1a)
65
RθJA
Thermal Resistance, Junction to Ambient
(Note 1b)
135
°C/W
Package Marking and Ordering Information
Device Marking
FDMQ86530L
Device
FDMQ86530L
©2012 Fairchild Semiconductor Corporation
FDMQ86530L Rev. C
Package
MLP 4.5x5
1
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com
FDMQ86530L Dual N-Channel PowerTrench® MOSFET
August 2012
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = 48 V, VGS = 0 V
1
μA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
±100
nA
3
V
60
V
27
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
-6
rDS(on)
Static Drain to Source On Resistance
gFS
Forward Transconductance
1
1.8
mV/°C
VGS = 10 V, ID = 8 A
12
17.5
VGS = 6 V, ID = 7 A
15
23
VGS = 4.5 V, ID = 6.5 A
20
25
VGS = 10 V, ID = 8 A, TJ = 125 °C
18
26
VDS = 5 V, ID = 8 A
28
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = 30 V, VGS = 0 V,
f = 1 MHz
1725
2295
pF
299
400
pF
10
15
pF
Switching Characteristics
td(on)
Turn-On Delay Time
8.8
18
ns
tr
Rise Time
3.8
10
ns
td(off)
Turn-Off Delay Time
22
35
ns
tf
Fall Time
2.8
10
ns
nC
VDD = 30 V, ID = 8 A,
VGS = 10 V, RGEN = 6 Ω
Qg
Total Gate Charge
VGS = 0 V to 10 V
23
33
Qg
Total Gate Charge
11
16
Qgs
Gate to Source Charge
VGS = 0 V to 4.5 V VDD = 30 V,
ID = 8 A
Qgd
Gate to Drain “Miller” Charge
nC
5.1
nC
2.3
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 8 A
(Note 2)
0.8
1.3
VGS = 0 V, IS = 1.6 A
(Note 2)
0.7
1.2
IF = 8 A, di/dt = 100 A/μs
V
27
43
ns
12
22
nC
Notes:
1. RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a. 65 °C/W when mounted on a 1 in2
pad of 2 oz copper. the board
designed Q1+Q3 or Q2+Q4.
b. 135 °C/W when mounted on a
minimum pad of 2 oz copper.
the board designed Q1+Q3 or
Q2+Q4.
SS
SF
DS
DF
G
SS
SF
DS
DF
G
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
©2012 Fairchild Semiconductor Corporation
FDMQ86530L Rev. C
2
www.fairchildsemi.com
FDMQ86530L Dual N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
VGS = 10 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
50
VGS = 4.5 V
VGS = 6 V
40
VGS = 5 V
VGS = 4 V
30
20
VGS = 3.5 V
10
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0.0
0.5
1.0
5
VGS = 3.5 V
3
VGS = 4.5 V
VGS = 5 V
2
1
VGS = 6 V
0
1.5
0
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
rDS(on), DRAIN TO
1.4
1.2
1.0
0.8
0.6
-75
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID = 8 A
VGS = 10 V
40
50
ID = 8 A
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
40
30
TJ = 125 oC
20
10
TJ = 25 oC
0
-50
2
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
IS, REVERSE DRAIN CURRENT (A)
VDS = 5 V
30
TJ = 150 oC
TJ = 25
TJ = -55
2
3
oC
oC
4
10
VGS = 0 V
10
1
TJ = 150 oC
TJ = 25 oC
0.1
TJ = -55 oC
0.01
0.001
0.0
5
VGS, GATE TO SOURCE VOLTAGE (V)
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
©2012 Fairchild Semiconductor Corporation
FDMQ86530L Rev. C
8
60
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
10
6
Figure 4. On-Resistance vs Gate to
Source Voltage
50
20
4
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On- Resistance
vs Junction Temperature
ID, DRAIN CURRENT (A)
30
50
1.6
1
20
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.8
0
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 10 V
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics
40
VGS = 4 V
4
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
3
www.fairchildsemi.com
FDMQ86530L Dual N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
ID = 8 A
Ciss
VDD = 20 V
8
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
10000
10
VDD = 30 V
6
VDD = 40 V
4
1000
Coss
100
Crss
10
2
0
f = 1 MHz
VGS = 0 V
0
5
10
15
20
1
0.1
25
1
Figure 7. Gate Charge Characteristics
3000
P(PK), PEAK TRANSIENT POWER (W)
ID, DRAIN CURRENT (A)
60
Figure 8. Capacitance vs Drain
to Source Voltage
70
10
1
1 ms
THIS AREA IS
LIMITED BY rDS(on)
0.1
10 ms
100 ms
SINGLE PULSE
TJ = MAX RATED
RθJA = 135 oC/W
1s
10 s
DERIVED FROM
TEST DATA
0.01
TA = 25 oC
0.005
0.01
0.1
1
DC
10
100 300
SINGLE PULSE
RθJA = 135 oC/W
1000
TA = 25 oC
100
10
1
0.5 -4
10
-3
10
VDS, DRAIN to SOURCE VOLTAGE (V)
2
1
0.1
-2
10
-1
10
1
1000
Figure 10. Single Pulse Maximum
Power Dissipation
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
0.01
t2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
o
RθJA = 135 C/W
1E-3
1E-4 -4
10
100
10
t, PULSE WIDTH (sec)
Figure 9. Forward Bias Safe
Operating Area
NORMALIZED THERMAL
IMPEDANCE, ZθJA
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
-3
10
-2
10
-1
10
1
10
100
100
t, RECTANGULAR PULSE DURATION (sec)
Figure 11. Junction-to-Ambient Transient Thermal Response Curve
©2012 Fairchild Semiconductor Corporation
FDMQ86530L Rev. C
4
www.fairchildsemi.com
FDMQ86530L Dual N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
4.45
2.22
5.00
A
0.10 C
(0.40)
B
2X
1.78
12
(0.50)
2.17
7
(0.50)2X
1.00(2X)
2.50
4.50
(0.50)
4.80
PIN#1
IDENT AREA
2.40
(0.65)
0.10 C
TOP VIEW
1
2X
0.80
0.80 MAX
0.40 6
(12X)
RECOMMENDED LAND PATTERN
0.10 C
(0.20)
0.08 C
0.05
0.00
NOTES:
A. THIS MKT. DWG. DOES NOT FULLY
CONFORM TO JEDEC MO-229
REGISTRATION
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. LAND PATTERN RECOMMENDATION IS
BASED ON FSC DESIGN ONLY.
E. DRAWING FILENAME: MKT-MLP12FRev1.
C
SIDE VIEW
SEATING
PLANE
1
1.75
1.65
5.00 ? .10
4.35
4.25
2.15
2.05
(0.35)
6
PIN#1
IDENT
1.05 (2X)
0.95
4.50 ?
. 10
2.55
2.45
(0.50)
2.25
0.55
0.45
(0.50)2X
0.10
0.05
12
0.80
C A B
C
7
(0.50)
0.35(12X)
0.25
2.50
BOTTOM VIEW
©2012 Fairchild Semiconductor Corporation
FDMQ86530L Rev. C
5
www.fairchildsemi.com
FDMQ86530L Dual N-Channel PowerTrench® MOSFET
Dimensional Outline and Pad Layout
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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THEREIN, WHICH COVERS THESE PRODUCTS.
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As used here in:
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2.
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Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I61
©2012 Fairchild Semiconductor Corporation
FDMQ86530L Rev. C
6
www.fairchildsemi.com
FDMQ86530L Dual N-Channel PowerTrench® MOSFET
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