ESDALC6V1W5 Quad TRANSIL™ array for data protection Main applications Where transient overvoltage protection in ESD sensitive equipment is required, such as : ■ Computers ■ Printers ■ Communication systems ■ Cellular phones and accessories ■ Wireline and wireless telephone sets ■ Set top boxes Features ■ 4 Unidirectional Transil functions ■ Breakdown voltage: VBR = 6.1 V minimum ■ Low leakage current: < 1 µA ■ Low capacitance: 7.5 pF at 3 V ■ Very small PCB area < 4.2 mm2 typically SOT323-5L Order codes Part Number Marking ESDALC6V1W5 C61 ESDALC6V1W5 Functional diagram I/01 I/04 GND I/02 I/03 Description The ESDALCxxxWx are monolithic suppressors designed to protect components connected to data and transmission lines against ESD. Complies with the following standards These devices clamp the voltage just above the logic level supply for positive transients, and to a diode drop below ground for negative transients. IEC61000-4-2 Benefits MIL STD 883E - Method 3015-7 Class 3 ■ High ESD protection level: up to 25 kV ■ High integration Level 4 15 kV (air discharge) 8 kV(contact discharge) 25 kV HBM (Human Body Model) TM: TRANSIL is a trademark of STMicroelectronics January 2006 Rev 5 1/7 www.st.com 7 ESDALC6V1W5 1 Characteristics 1 Characteristics Table 1. Absolute Ratings (Tamb = 25°C) Symbol PPP Tj Tstg Parameter Value Unit Peak pulse power (8/20 µs) 25 W Junction temperature 150 °C -55 to +150 °C 260 °C -40 to +150 °C Storage temperature range TL Maximum lead temperature for soldering during 10s Top Operating temperature range(1) 1. The values of the operating parameters versus temperature are given through curves and αT parameter. 1.1 Electrical Characteristics (Tamb = 25°C) Symbol Parameter VRM Stand-off voltage VBR Breakdown voltage VCL Clamping voltage IRM Leakage current IPP Peak pulse current IR Reverse leakage current IF Forward current αT Voltage temperature coefficient VF Forward voltage drop C Capacitance Rd Dynamic resistance I IF VF VCL VBR ESDALC6V1W5 Slope: 1/Rd IRM @ VRM Rd αT typ.(1) max.(2) C typ. max. V V mA µA V Ω 10-4/°C pF 6.1 7.2 1 1 3 1.1 6 7.5 2. VBR = aT* (Tamb - 25 °C) * VBR (25 °C) max. IPP min. 1. Square pulse lpp = 15 A, tp = 2.5 µs 2/7 V IRM VBR@ IR Part Numbers VRM 3V bias ESDALC6V1W5 Figure 1. 1.1 1 Characteristics Peak power dissipation versus initial junction temperature Figure 2. Peak pulse power versus exponential pulse duration (Tj initial = 25°C) Ppp(W) Ppp[Tj initial] / Ppp [Tj initial = 25°C] 100 Tj initial = 25°C 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 tp(µs) Tj(°C) 0.0 10 0 25 Figure 3. 50 75 100 125 150 175 1 10 Clamping voltage versus peak pulse Figure 4. current (Tj initial = 25°C, rectangular waveform, tp = 2.5 µs) Ipp(A) 100 Capacitance versus reverse applied voltage (typical values) C(pF) 100.0 14 13 F=1MHz Vosc=30mVRMS Tj=25°C 12 11 10 9 10.0 8 7 6 5 4 3 2 1.0 tp=2.5µs Tj initial =25°C Vcl(V) 1 0 0.1 0 Figure 5. 10 20 30 40 50 60 VR(V) 0.0 0.5 Relative variation of leakage current Figure 6. versus junction temperature (typical values) 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Peak forward voltage drop versus peak forward current (typical values) I FM (A) IR [Tj] / IR [Tj=25°C] 1.E+00 100 1.E-01 10 1.E-02 VFM(V) Tj(°C) 1 25 50 75 1.E-03 100 125 150 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 3/7 ESDALC6V1W5 2 Ordering information scheme Figure 7. 2 ESD response to IEC61000-4-2 (air discharge 15 kV, positive surge) Ordering information scheme ESDA ESD Array Low capacitance Breakdown Voltage 6V1 = 6.1 Volts min Package W5 = SOT323-5L 4/7 LC 6V1 W5 ESDALC6V1W5 3 Package mechanical data 3 Package mechanical data 3.1 SOT323-5L package DIMENSIONS A REF. Millimeters Inches E Min. Max. Min. Max. A 0.8 1.1 0.031 0.043 A1 0 0.1 0 0.004 A2 0.8 1 0.031 0.039 b 0.15 0.3 0.006 0.012 c 0.1 0.18 0.004 0.007 D 1.8 2.2 0.071 0.086 E 1.15 1.35 0.045 0.053 e b D e A1 A2 Q1 c e HE Figure 8. 0.65 Typ. 0.025 Typ. HE 1.8 2.4 0.071 0.094 Q1 0.1 0.4 0.004 0.016 Footprint dimensions 0.3 1.0 2.9 1.0 0.35 Dimensions in mm In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 5/7 ESDALC6V1W5 4 Ordering information 4 5 Ordering information Part Number Marking Package Weight Base qty Delivery mode ESDALC6V1W5 C61 SOT323-5L 5.4 mg 3000 Tape & reel Revision history Date Revision Jun-2002 4A 10-Jan-2006 6/7 5 Changes Previous issue Reformatted to current template. Figure 5: Range of Tj extended to 150 °C. Figure 6: Peak forward voltage drop versus peak forward current (typical values) added. ESDALC6V1W5 5 Revision history Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners © 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 7/7