EMIF03-SIM02C2 IPAD™ 3 line EMI filter including ESD protection Main product characteristics Where EMI filtering in ESD sensitive equipment is required: ■ SIM Interface (Subscriber Identify Module) ■ UIM Interface (Universal Identify Module) Description The EMIF03-SIM02C2 is a highly integrated device designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interference. The EMIF03 Flip-Chip packaging means the package size is equal to the die size. This filter includes an ESD protection circuitry which prevents the device from destruction when subjected to ESD surges up 15kV. Coated Flip-Chip package (8 bumps) Pin configuration (Bump side) Benefits 3 2 RST in RST ext 1 A ■ EMI symmetrical (I/O) low-pass filter ■ High efficiency in EMI filtering ■ Lead free coated package CLK in Gnd CLK ext B ■ Very low PCB space consuming: – 1.42mm x 1.42mm Data in VCC Data ext C ■ Very thin package: 0.65 mm ■ High efficiency in ESD suppression ■ High reliability offered by monolithic integration Complies with following standards: ■ High reducing of parasitic elements through integration and wafer level packaging IEC 61000-4-2 Level 4 on external and VCC pins: 15 kV (air discharge) 8 kV (contact discharge Level 1 on internal pins: 2 kV (air discharge) 2 kV (contact discharge MIL STD 883G - Method 3015-7 Class 3 March 2007 Rev 2 1/8 www.st.com Characteristics 1 EMIF03-SIM02C2 Characteristics Figure 1. Basic cell configuration VCC 100 Ω RST in RST ext R1 47 Ω CLK in CLK ext R2 100 Ω Data ext Data in R3 Cline = 20pF max. GND Table 1. Absolute ratings (limiting values) Symbol Parameter Value Unit Internal pins (A3, B3, C3): ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge External pins (A2, B1, C2, C1): ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge 15 8 Tj Maximum junction temperature 125 °C Top Operating temperature range -40 to +85 °C Tstg Storage temperature range -55 to +150 °C VPP Table 2. Symbol 2 2 kV Electrical characteristics (Tamb = 25° C) Parameters I 2/8 VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage Rd Dynamic impedance IPP Peak pulse current RI/O Series resistance between input and output Cline Input capacitance per line IF VF VCL VBR VRM IRM IR IPP V EMIF03-SIM02C2 Characteristics Symbol Test conditions VBR IR = 1 mA IRM VRM = 3 V Min 6 Rd Max Unit 20 V 0.2 µA Ω 1.5 R1, R3 Tolerance ± 20% 100 R2 Tolerance ± 20% 47 Cline Figure 2. Typ VR = 0 V 20 S21 (dB) attenuation measurement Figure 3. (A2-A3 line) EMIF03-SIM02C2_FREQ-MEAS_PM428 Aplac 7.70 User: ST Microelectronics Sep 22 2004 pF S21 (dB) attenuation measurement (B1-B3 line) EMIF03-SIM02C2_FREQ-MEAS_PM428 Aplac 7.70 User: ST Microelectronics Sep 22 2004 0.00 0.00 dB dB -10.00 -10.00 -20.00 -20.00 -30.00 -30.00 -40.00 -40.00 100.0k 1.0M 10.0M 100.0M 1.0G 100.0k 1.0M 10.0M f/Hz Figure 4. 100.0M 1.0G f/Hz A2/A3 Line B1/B3 line S21 (dB) attenuation measurement Figure 5. (C1-C3 line) EMIF03-SIM02C2_FREQ-MEAS_PM428 Aplac 7.70 User: ST Microelectronics Sep 22 2004 Analog crosstalk measurements EMIF03-SIM02C2_FREQ-MEAS_PM428 Aplac 7.70 User: ST Microelectronics Sep 22 2004 0.00 0.00 dB -10.00 dB -20.00 -10.00 -30.00 -40.00 -20.00 -50.00 -60.00 -70.00 -30.00 -80.00 -90.00 -40.00 -100.00 100.0k 1.0M 10.0M 100.0M f/Hz C1/C3 line 1.0G 100.0k 1.0M 10.0M 100.0M 1.0G f/Hz Xtalk A2/B3 3/8 Characteristics Figure 6. EMIF03-SIM02C2 Voltages when IEC 61000-4-2 (+15 kV air discharge) applied to external pin Figure 7. Voltages when IEC 61000-4-2 (-15 kV air discharge) applied to external pin Vexternal : 10V/d Vexternal : 5V/d Vinternal : 10V/d Vinternal : 5V/d 100ns/d Figure 8. 100ns/d Line capacitance versus reverse applied voltage (typical) C(pF) 20.00 16.00 12.00 8.00 4.00 VR(V) 0.00 0 Figure 9. 1 2 3 4 5 Aplac model LbumpRbump 100 Rbump Lbump a2 Cbump Rsub bulk Lbump Rbump a3 Rsub Cbump bulk 47 Rbump Lbump b1 b3 Cbump Rsub bulk LbumpRbump Rsub Cbump bulk 100 Rbump Lbump c1 c3 Rsub Cbump bulk Dext2 Dint1 Dint1 Dext1 Dext1 0.25 0.28 bulk Rsub Cbump Dint2 0.25 0.29 0.31 0.29 Bulk Lbump Ls 100m Rbump a2 100m Ls a3 Lgnd Port1 50 4/8 Cgnd Rgnd Port2 50 EMIF03-SIM02C2 Ordering information scheme Figure 10. Aplac parameters Ls 950pH Rs 150m Cext1 15pF Cint1 4.5pF Cext2 14pF Cint2 4pF Rbump 20m Lbump 50pH Cbump 0.15pF Rgnd 500m Lgnd 50pH Cgnd 0.15pF Rsub 100m 2 Model Dint1 BV=15 CJO=Cint1 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.001m VJ=0.6 TT=50n Model Dext1 BV=15 CJO=Cext1 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.001m VJ=0.6 TT=50n Model Dint2 BV=15 CJO=Cint2 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.001m VJ=0.6 TT=50n Model Dext2 BV=15 CJO=Cext2 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.001m VJ=0.6 TT=50n Ordering information scheme EMIF yy - xxx zz Cx EMI Filter Number of lines Information 3 letters = application 2 digits = version Package C = Coated Flip-Chip x = 2: Leadfree, Pitch = 500 µm, Bump = 315 µm 5/8 Package information 3 EMIF03-SIM02C2 Package information ● Epoxy meets UL94, V0 Figure 11. Flip-Chip Dimensions 500µm ± 50 695µm ± 65 1.42mm ± 50µm 500µm ± 50 315µm ± 50 1.42mm ± 50µm Figure 12. Marking Figure 13. Footprint recommendation Dot, ST logo xx = marking z = manufacturing location yww = datecode (y = year ww = week) Copper pad Diameter: 250 µm recommended, 300 µm max E Solder stencil opening: 330 µm x x z y ww 6/8 Solder mask opening recommendation: 340 µm min for 315 µm copper pad diameter EMIF03-SIM02C2 Ordering information Figure 14. Flip-Chip tape and reel specification Dot identifying Pin A1 location 1.75 +/- 0.1 Ø 1.5 +/- 0.1 4 +/- 0.1 3.5 +/- 0.1 ST E xxz yww ST E xxz yww ST E xxz yww 8 +/- 0.3 0.78 +/- 0.05 4 +/- 0.1 User direction of unreeling All dimensions in mm In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 4 5 Ordering information Ordering code Marking Package Weight Base qty Delivery mode EMIF03-SIM02C2 GJ Flip-Chip 3.04 mg 5000 7” Tape and reel Revision history Date Revision Changes 07-Feb-2007 1 Initial release. 21-Mar-2007 2 Updated weight in Ordering information. 7/8 EMIF03-SIM02C2 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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