STMICROELECTRONICS VND5004ATR-E

VND5004A-E
VND5004ASP30-E
Double 4mΩ high side driver with analog current sense
for automotive applications
Features
Max transient supply voltage
VCC
41V
Operating voltage range
VCC
4.5 to 27V
Max On-State resistance (per ch.)
RON
4 mΩ
Current limitation (typ)
ILIMH
100A
Off state supply current
IS
2 µA(1)
PQFN - 12x12 Power lead-less
MultiPowerSO-30
1. Typical value with all loads connected
■
Application
General
– Inrush current active management by
power limitation
– Very low stand-by current
– 3.0V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
European directive
All types of resistive, inductive and capacitive
loads
■
Suitable for power management applications
Description
■
Diagnostic functions
– Proportional load current sense
– Current sense disable
– Thermal shutdown indication
■
Protection
– Undervoltage shut-down
– Overvoltage clamp
– Load current limitation
– Thermal shut down
– Self limiting of fast thermal transients
– Protection against loss of ground and loss of VCC
– Reverse battery protection with self switch
on of the PowerMOS (see Application
schematic on page 18)
– Electrostatic discharge protection
Table 1.
■
The VND5004ATR-E and VND5004ASP30-E are
devices made using STMicroelectronics VIPower
technology. They are intended for driving resistive
or inductive loads with one side connected to
ground. Active VCC pin voltage clamp and load
dump protection circuit protect the devices
against transients on the Vcc pin (see ISO7637
transient compatibility table). These devices
integrate an analog current sense which delivers
a current proportional to the load current
(according to a known ratio) when CS_DIS is
driven low or left open. When CS_DIS is driven
high, the CURRENT SENSE pin is high
impedance. Output current limitation protects the
devices in overload condition. In case of long
duration overload, the devicesa limit the
dissipated power to a safe level up to thermal
shut-down intervention. Thermal shut-down with
automatic restart allows the device to recover
normal operation as soon as a fault condition
disappears.
Devices summary
Order codes
Package
Tube
Tape and Reel
Tray
PQFN-12x12 Power lead-less
-
VND5004ATR-E
VND5004A-E
MultiPowerSO-30
VND5004ASP30-E
VND5004ASP30TR-E
-
December 2007
Rev 5
1/34
www.st.com
34
Contents
VND5004A-E / VND5004ASP30-E
Contents
1
Block diagram and pin configurations . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
4
5
6
2/34
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.1
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 19
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1
MultiPowerSO-30 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.2
PQFN - 12x12 Power lead-less thermal data . . . . . . . . . . . . . . . . . . . . . . 23
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.2
MultiPowerSO-30 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.3
PQFN - 12x12 Power lead-less mechanical data . . . . . . . . . . . . . . . . . . . 28
5.4
MultiPowerSO-30 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.5
PQFN - 12x12 Power lead-less packing information . . . . . . . . . . . . . . . . 31
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
VND5004A-E / VND5004ASP30-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Devices summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and n.c. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current sense (8V<VCC<16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Thermal parameters for MultiPowerSO-30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Thermal parameters for PQFN - 12x12 Power lead-less . . . . . . . . . . . . . . . . . . . . . . . . . . 25
MultiPowerSO-30 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
PQFN - 12x12 Power lead-less mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3/34
List of figures
VND5004A-E / VND5004ASP30-E
List of figures
Figure 1.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2.
Configuration diagram (not in scale) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3.
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4.
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 5.
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 6.
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7.
Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8.
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9.
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 12. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 13. On state resistance vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 14. On state resistance vs. VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 15. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 16. Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 17. ILIMH vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 18. Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 19. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 20. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 21. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 22. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 23. Maximum turn off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 24. MultiPowerSO-30 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 25. Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON) . . . . . . . 20
Figure 26. MultiPowerSO-30 thermal impedance junction ambient single pulse (one channel ON) . . 21
Figure 27. Thermal fitting model of a double channel HSD in MultiPowerSO-30 . . . . . . . . . . . . . . . . 21
Figure 28. 12x12 Power lead-less package PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 29. Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON) . . . . . . . 23
Figure 30. PQFN - 12x12 Power lead-less package thermal impedance junction ambient single pulse
(one channel ON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Figure 31. Thermal fitting model of a double channel HSD in PQFN - 12x12 Power lead-less . . . . . 24
Figure 32. MultiPowerSO-30 outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 33. PQFN - 12x12 Power lead-less outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 34. MultiPowerSO-30 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 35. MultiPowerSO-30 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 36. PQFN - 12x12 Power lead-less tray shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 37. PQFN - 12x12 Power lead-less tape and reel shipment (suffix “TR”). . . . . . . . . . . . . . . . . 32
4/34
VND5004A-E / VND5004ASP30-E
1
Block diagram and pin configurations
Block diagram and pin configurations
Figure 1.
Block diagram
VCC
Under
voltage
VCC
clamp
PwCLAMP
DRIVER
OUTPUT1
GND
ILIM
Reverse
battery
protection
Overtemp.
IOUT1
PwrLIM
K
CS_DIS
INPUT1
LOGIC
CURRENT
SENSE1
PwCLAMP
DRIVER
OUTPUT2
ILIM
INPUT2
Overtemp.
PwrLIM
CS_DIS
Table 2.
IOUT2
CS_DIS
K
CURRENT
SENSE2
Pin functions
Name
VCC
OUTPUT1,2
GND
INPUT1,2
Function
Battery connection
Power output
Ground connection
Voltage controlled input pin with hysteresis, CMOS compatible. Controls
output switch state
CURRENT SENSE1,2 Analog current sense pin, delivers a current proportional to the load current
CS_DIS
Active high CMOS compatible pin, to disable the current sense pins
5/34
Block diagram and pin configurations
Figure 2.
Configuration diagram (not in scale)
PQFN -12x12 Power
lead - less
(bottom view)
VCC
NC
FOR TEST ONLY
NC
NC
GND
CS_DIS
CURRENT SENSE 2
CURRENT SENSE 1
INPUT 2
INPUT 1
NC
FOR TEST ONLY
NC
VCC
Table 3.
12
11
10
9
8
7
6
5
4
3
2
1
1 NC
2 NC
3 NC
4 GND
5 CS_DIS
6 CURRENT SENSE 2
7 CURRENT SENSE 1
8 INPUT 2
9 INPUT 1
10 NC
11 NC
12 NC
13 FOR TEST ONLY
14 VCC
15 OUTPUT 1
16 OUTPUT 2
15
13
14
16
1
30
VCC
Heat Slug1
15
16
VCC
OUTPUT 2
OUTPUT 2
OUTPUT 2
OUTPUT 2
OUTPUT 2
OUTPUT 2
MultiPowerSO-30
NC
(top view)
OUTPUT 1
OUTPUT 1
OUTPUT 1
OUTPUT 1
OUTPUT 1
OUTPUT 1
VCC
Suggested connections for unused and n.c. pins
Connection /
Pin
Current
Sense
N.C.
Output
Input
CS_DIS
For test
only
Floating
N.R.(1)
X
X
X
X
X
To ground
Through 1kΩ
resistor
X
N.R.
Through 10kΩ
resistor
Through 10kΩ
resistor
N.R.
1. Not recommended.
6/34
VND5004A-E / VND5004ASP30-E
VND5004A-E / VND5004ASP30-E
2
Electrical specifications
Electrical specifications
Figure 3.
Current and voltage conventions
IS
VCC
ICSD
VCSD
IIN1,2
VCC
IOUT1,2
CS_DIS
OUTPUT1,2
VOUT1,2
INPUT1,2
CURRENT
SENSE1,2
ISENSE1,2
VSENSE1,2
GND
VIN1,2
IGND
2.1
Absolute maximum ratings
Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in this section for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality documents.
Table 4.
Absolute maximum ratings
Symbol
Value
Unit
DC supply voltage
27
V
Transient supply voltage (T<400ms, Rload>0.5Ω)
41
V
-VCC
Reverse DC supply voltage
16
V
IOUT
DC output current
Internally limited
A
70
A
DC input current
-1 to 10
mA
DC current sense disable input current
-1 to 10
mA
Vcc-41
+Vcc
V
V
VCC
VCCPK
- IOUT
IIN
ICSD
Parameter
Reverse DC output current
VCSENSE Current sense maximum voltage (Vcc>0V)
EMAX
Maximum switching energy (single pulse)
(L=0.3mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IOUT = IlimL(Typ.) )
342
mJ
VESD
Electrostatic discharge (Human Body Model: R=1.5kΩ;
C=100pF)
2000
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
7/34
Electrical specifications
Table 4.
VND5004A-E / VND5004ASP30-E
Absolute maximum ratings (continued)
Symbol
Tj
TSTG
2.2
Parameter
Value
Unit
Junction operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Thermal data
Table 5.
Thermal data
Value
Symbol
Parameter
Unit
MultiPowerSO-30
12x12 PLLP
Rthj-case
Thermal resistance junction-case (MAX)
(with one channel ON)
0.35
0.35
°C/W
Rthj-amb
Thermal resistance junction-ambient (MAX)
58(1)
39(2)
°C/W
1. PCB FR4 area 58mmX58mm , PCB thickness 2mm, Cu thickness 35 µm, minimum pad layout.
2. PCB FR4 area 78mmX78mm , PCB thickness 2mm, Cu thickness 35 µm, minimum pad layout.
8/34
VND5004A-E / VND5004ASP30-E
2.3
Electrical specifications
Electrical characteristics
Values specified in this section are for 8V<VCC<24V, -40°C<Tj<150 °C, unless otherwise
stated.
Table 6.
Power section
Symbol
Parameter
VCC
Operating supply
voltage
VUSD
VUSDhyst
Test conditions
Min. Typ. Max. Unit
4.5
13
27
V
Undervoltage shutdown
3.5
4.5
V
Undervoltage shut-down
hysteresis
0.5
V
IOUT=15A; Tj=25°C
IOUT=15A; Tj=150°C
IOUT=15A; VCC=5V; Tj=25°C
4
8
6
mΩ
mΩ
mΩ
Rdson in reverse battery
condition
VCC=-13V; IOUT=-15A; Tj=25°C
4
mΩ
VCC clamp voltage
ICC=20 mA; IOUT1,2=0A
46
52
V
IS
Supply current
Off state; VCC=13V; Tj=25°C;
VIN=VOUT=VSENSE=VCSD=0V
On state; VCC=13V; VIN=5V; IOUT=0A
2(2)
3.5
5(2)
6
µA
mA
IL(off)
Off-state output
current(1)
VIN=VOUT=0V; VCC=13V; Tj=25°C
VIN=VOUT=0V; VCC=13V; Tj=125°C
0.01
3
5
µA
Max.
Unit
RON
RON REV
Vclamp
On-state
resistance(1)
41
0
0
1. For each channel.
2. PowerMOS leakage included.
Table 7.
Symbol
Switching (VCC = 13V; Tj = 25°C)
Parameter
Test conditions
Min.
Typ.
td(on)
Turn-on delay time
RL=0.87Ω (see Figure 5.)
25
µs
td(off)
Turn-on delay time
RL=0.87Ω (see Figure 5.)
35
µs
(dVOUT/dt)on
Turn-on voltage slope RL=0.87Ω
See
Figure
16.
V/ µs
(dVOUT/dt)off
Turn-off voltage slope RL=0.87Ω
See
Figure
18.
V/ µs
WON
Switching energy
losses during twon
RL=0.87Ω (see Figure 5.)
5.4
mJ
WOFF
Switching energy
losses during twoff
RL=0.87Ω (see Figure 5.)
2.3
mJ
9/34
Electrical specifications
Table 8.
VND5004A-E / VND5004ASP30-E
Logic input
Symbol
Parameter
Test conditions
VIL1,2
Input low level voltage
IIL1,2
Low level input current
VIH1,2
Input high level voltage
IIH1,2
High level input current VIN=2.1V
Input clamp voltage
VCSDL
CS_DIS low level
voltage
ICSDL
Low level CS_DIS
current
VCSDH
CS_DIS high level
voltage
ICSDH
High level CS_DIS
current
VCSD(hyst)
CS_DIS hysteresis
voltage
Unit
0.9
V
1
µA
2.1
V
7
V
V
0.9
V
-0.7
1
µA
2.1
V
VCSD=2.1V
10
0.25
CS_DIS clamp voltage
7
-0.7
V
V
Protection and diagnostics(1)
IlimH
Short circuit current
VCC=13V
5V<VCC<24V
IlimL
Short circuit current
during thermal
cycling
VCC=13V; TR<Tj<TTSD
TTSD
Shutdown
temperature
TR
Reset temperature
TRS
Thermal reset of
STATUS
Test conditions
Typ.
Max.
Unit
70
100
140
140
A
A
40
150
175
TRS+1
TRS+5
A
200
135
Thermal hysteresis
(TTSD-TR)
Turn-off output
voltage clamp
Min.
IOUT=2A; VIN=0; L=6mH
°C
°C
°C
7
°C
VCC-27 VCC-30 VCC-33
V
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
10/34
µA
V
5.5
ICSD=1mA
ICSD=-1mA
µA
V
5.5
VCSD=0.9V
Parameter
VDEMAG
Max.
10
IIN=1mA
IIN=-1mA
Symbol
THYST
Typ.
0.25
VICL1,2
Table 9.
VIN=0.9V
Input hysteresis
voltage
VI(hyst)1,2
VCSCL
Min.
VND5004A-E / VND5004ASP30-E
Table 10.
Symbol
Electrical specifications
Current sense (8V<VCC<16V)
Parameter
Test conditions
Min.
Typ.
Max. Unit
K1
IOUT/ISENSE
IOUT=15A; VSENSE=4V; VCSD=0V;
Tj=-40°C
Tj=25°C...150°C
11530 16000 19340
12730 16000 19270
K2
IOUT/ISENSE
IOUT=30A; VSENSE=4V; VCSD=0V;
Tj=-40°C
Tj=25°C...150°C
13430 16150 17880
14500 16150 17880
ISENSE0
Analog sense
current
IOUT=0A; VSENSE=0V;
VCSD=5V; VIN=0V; Tj=-40°C to 150°C
VCSD=0V; VIN=5V; Tj=-40°C to 150°C
0
0
VSENSE
Max analog sense
output voltage
IOUT=45A; VCSD=0V; RSENSE=3.9kΩ
5
VSENSEH
Analog sense
output voltage in
overtemperature
condition
VCC=13V; RSENSE=3.9kΩ
9
V
ISENSEH
Analog sense
output current in
overtemperature
condition
Vcc=13V; VSENSE=5V
8
mA
Delay response
time from falling
tDSENSE1H
edge of CS_DIS
pin
VSENSE<4V, 5A<Iout<30A
ISENSE=90% of ISENSE max
(see Figure 4.)
50
100
µs
Delay response
time from rising
tDSENSE1L
edge of CS_DIS
pin
VSENSE<4V, 5A<Iout<30A
ISENSE=10% of ISENSE max
(see Figure 4.)
5
20
µs
Delay response
tDSENSE2H time from rising
edge of INPUT pin
VSENSE<4V, 5A<Iout<30A
ISENSE=90% of ISENSE max
(see Figure 4.)
270
600
µs
Delay response
tDSENSE2L time from falling
edge of INPUT pin
VSENSE<4V, 5A<Iout<30A
ISENSE=10% of ISENSE max
(see Figure 4.)
100
250
µs
Figure 4.
5
400
µA
µA
V
Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
tDSENSE2H
tDSENSE1L
tDSENSE1H
tDSENSE2L
11/34
Electrical specifications
Table 11.
VND5004A-E / VND5004ASP30-E
Truth table
INPUTn
OUTPUTn
SENSEn (VCSD=0V)(1)
(see Figure 3.)
Normal operation
L
H
L
H
0
Nominal
Overtemperature
L
H
L
L
0
VSENSEH
Undervoltage
L
H
L
L
0
0
Short circuit to GND
(Rsc ≤10 mΩ)
L
H
H
L
L
L
0
0 if Tj < TTSD
VSENSEH if Tj > TTSD
Short circuit to VCC
L
H
H
H
0
< Nominal
Negative output voltage clamp
L
L
0
Conditions
1. If VCSD is high, the SENSE output is at a high impedance. Its potential depends on leakage currents and
the external circuit.
Figure 5.
Switching characteristics
VOUT
tWoff
tWon
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
tr
10%
tf
t
INPUT
td(on)
td(off)
t
12/34
VND5004A-E / VND5004ASP30-E
Table 12.
ISO 7637-2:
2004(E)
Electrical specifications
Electrical transient requirements
Test levels(1)
Number of
pulses or
test times
Burst cycle/pulse
repetition time
Delays and
Impedance
Test pulse
III
IV
1
-75 V
-100 V
5000
pulses
0.5 s
5s
2 ms, 10 Ω
2a
+37 V
+50 V
5000
pulses
0.2 s
5s
50 µs, 2 Ω
3a
-100 V
-150 V
1h
90 ms
100 ms
0.1 µs, 50 Ω
3b
+75 V
+100 V
1h
90 ms
100 ms
0.1 µs, 50 Ω
4
-6 V
-7 V
1 pulse
100 ms, 0.01 Ω
5b(2)
+65 V
+87 V
1 pulse
400 ms, 2 Ω
Test level results(1)
ISO 7637-2:
2004(E)
Test pulse
III
IV
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
C
C
5b
(2) (3)
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
3. Suppressed load dump (pulse 5b) is withstood with a minimum load connected as specified in Table 4.:
Absolute maximum ratings.
Class
Contents
C
All functions of the device are performed as designed after exposure to disturbance.
E
One or more functions of the device are not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
13/34
Electrical specifications
Figure 6.
VND5004A-E / VND5004ASP30-E
Waveforms
NORMAL OPERATION
INPUTn
CS_DIS
LOAD CURRENTn
SENSE CURRENTn
UNDERVOLTAGE
VUSDhyst
VCC
VUSD
INPUTn
CS_DIS
LOAD CURRENTn
SENSE CURRENTn
OUTPUT SHORT TO VCC
INPUTn
CS_DIS
LOAD VOLTAGEn
LOAD CURRENTn
SENSE CURRENTn
<Nominal
<Nominal
OVERLOAD OPERATION
Tj
TR TTSD
TRS
INPUTn
CS_DIS
ILIMH
ILIML
LOAD CURRENTn
VSENSEH
SENSE CURRENTn
current power
limitation limitation
thermal cycling
SHORTED LOAD
14/34
NORMAL LOAD
VND5004A-E / VND5004ASP30-E
2.4
Electrical specifications
Electrical characteristics curves
Figure 7.
Off state output current
Figure 8.
Iloff (uA)
High level input current
Iih (uA)
6
5
5.4
4.5
Off State
Vcc=13V
Vin=Vout=0V
4.8
4.2
Vin=2.1V
4
3.5
3.6
3
3
2.5
2.4
2
1.8
1.5
1.2
1
0.6
0.5
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C )
Figure 9.
50
75
100
125
150
175
100
125
150
175
Tc (°C )
Input clamp voltage
Figure 10. Input low level
Vicl (V)
Vil (V)
7
2
1.8
6.75
Iin=1mA
1.6
6.5
1.4
6.25
1.2
1
6
0.8
5.75
0.6
5.5
0.4
5.25
0.2
5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C )
50
75
Tc (°C )
Figure 11. Input high level
Figure 12. Input hysteresis voltage
Vih (V)
Vihyst (V)
4
1
0.9
3.5
0.8
3
0.7
2.5
0.6
2
0.5
0.4
1.5
0.3
1
0.2
0.5
0.1
0
0
-50
-25
0
25
50
75
Tc (°C )
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C )
15/34
Electrical specifications
VND5004A-E / VND5004ASP30-E
Figure 13. On state resistance vs. Tcase
Ron (mOhm)
Figure 14. On state resistance vs. VCC
Ron (mOhm)
6
6
5.4
5.4
Iout=15A
Vcc=13V
4.8
Tc=150°C
4.8
Tc=125°C
4.2
4.2
3.6
3.6
3
3
2.4
2.4
1.8
Tc=25°C
Tc=-40°C
1.8
-50
-25
0
25
50
75
100
125
150
175
0
4
8
12
16
Tc (°C )
20
24
28
Vcc
Figure 15. Undervoltage shutdown
Figure 16. Turn-On voltage slope
Vusd (V)
(dVout/dt)on (V/ms)
16
500
450
14
Vcc=13V
RI=0.87Ohm
400
12
350
10
300
8
250
200
6
150
4
100
2
50
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Figure 17. ILIMH vs. Tcase
75
100
125
150
175
Figure 18. Turn-Off voltage slope
Ilimh (A)
(dVout/dt)off (V/ms)
150
500
140
450
Vcc=13V
130
Vcc=13V
RI=0.87Ohm
400
120
350
110
300
100
250
90
200
80
150
70
100
60
50
50
0
-50
-25
0
25
50
75
Tc (°C )
16/34
50
Tc (°C )
Tc (°C )
100
125
150
175
-50
-25
0
25
50
75
Tc (°C )
100
125
150
175
VND5004A-E / VND5004ASP30-E
Electrical specifications
Figure 19. CS_DIS high level voltage
Figure 20. CS_DIS clamp voltage
Vcsdh (V)
Vcsdcl (V)
4
8
3.5
7.5
3
7
2.5
6.5
2
6
1.5
5.5
1
5
0.5
4.5
0
4
-50
-25
0
25
50
75
100
125
150
175
Tc (°C )
-50
-25
0
25
50
75
100
125
150
175
Tc (°C )
Figure 21. CS_DIS low level voltage
Vcsdl (V)
4
3.5
3
2.5
2
1.5
1
0.5
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C )
17/34
Application information
3
VND5004A-E / VND5004ASP30-E
Application information
Figure 22. Application schematic
+5V
VCC
20V
Rprot
CS_DIS
Dld
µC
Rprot
Rprot
INPUT
OUTPUT
CURRENT SENSE
45V
RSENSE
GND
Cext
3.1
MCU I/Os protection
When negative transients are present on the VCC line, the control pins will be pulled
negative to approximately -1.5V.
ST suggests the insertion of resistors (Rprot) in the lines to prevent the µC I/Os pins from
latching up.
The values of these resistors provide a compromise between the leakage current of the µC,
the current required by the HSD I/Os (input levels compatibility) and the latch-up limit of the
µC I/Os.
-VCCpeak/Ilatchup ≤Rprot ≤(VOHµC-VIH) / IIHmax
Calculation example:
For VCCpeak= - 1.5V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
75Ω ≤Rprot ≤240kΩ.
Recommended values: Rprot =10kΩ, CEXT=10nF
3.2
Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
VCCPK max rating. The same applies if the device will be subject to transients on the VCC
line that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
18/34
VND5004A-E / VND5004ASP30-E
3.3
Application information
Maximum demagnetization energy (VCC = 13.5V)
Figure 23. Maximum turn off current versus inductance
100
A
B
C
I (A)
10
1
1
L (mH)
10
100
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with RL = 0 Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves A and B.
19/34
Package and PC board thermal data
VND5004A-E / VND5004ASP30-E
4
Package and PC board thermal data
4.1
MultiPowerSO-30 thermal data
Figure 24. MultiPowerSO-30 PC board
Note:
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4
area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35µm (front and back side),
Copper areas: from minimum pad lay-out to 16cm2).
Figure 25. Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON)
RTHj_amb(°C/W)
60
55
50
45
40
35
0
1
2
3
PCB Cu heatsink area (cm^2)
20/34
4
5
VND5004A-E / VND5004ASP30-E
Package and PC board thermal data
Figure 26. MultiPowerSO-30 thermal impedance junction ambient single pulse (one
channel ON)
ZTH (°C/W)
1000
100
Footprint
4 cm2
10
1
0.1
0.01
0.0001
0.001
0.01
0.1
1
Time (s)
10
100
1000
Figure 27. Thermal fitting model of a double channel HSD in MultiPowerSO-30 (a)
a. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
21/34
Package and PC board thermal data
VND5004A-E / VND5004ASP30-E
Equation 1: pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ)
where δ = t p ⁄ T
Table 13.
22/34
Thermal parameters for MultiPowerSO-30
Area/island (cm2)
Footprint
R1 (°C/W)
0.05
R2 (°C/W)
0.3
R3 (°C/W)
0.5
R4 (°C/W)
1.3
R5 (°C/W)
14
R6 (°C/W)
44.7
R7 (°C/W)
0.05
R8 (°C/W)
0.3
C1 (W.s/°C)
0.005
C2 (W.s/°C)
0.008
C3 (W.s/°C)
0.01
C4 (W.s/°C)
0.3
C5 (W.s/°C)
0.6
C6 (W.s/°C)
5
C7 (W.s/°C)
0.005
C8 (W.s/°C)
0.008
4
23.7
11
VND5004A-E / VND5004ASP30-E
4.2
Package and PC board thermal data
PQFN - 12x12 Power lead-less thermal data
Figure 28. 12x12 Power lead-less package PC board
Note:
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4
area= 78mm x 78mm, PCB thickness=2mm, Cu thickness=35µm (front and back side),
Copper areas: minimum pad lay-out).
Figure 29. Rthj-amb Vs. PCB copper area in open box free air condition (one channel
ON)
50
45
40
35
30
25
20
0
5
10
15
20
PCB Cu heatsink area (cm^2)
23/34
Package and PC board thermal data
VND5004A-E / VND5004ASP30-E
Figure 30. PQFN - 12x12 Power lead-less package thermal impedance junction
ambient single pulse (one channel ON)
100
Footprint
4 cm2
8 cm2
16 cm2
°C/W
10
1
0,1
0,001
0,01
0,1
time (s)
1
10
100
1000
Figure 31. Thermal fitting model of a double channel HSD in PQFN - 12x12 Power leadless(b)
b. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
24/34
VND5004A-E / VND5004ASP30-E
Package and PC board thermal data
Equation 2: pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ)
where δ = t p ⁄ T
Table 14.
Thermal parameters for PQFN - 12x12 Power lead-less
Area/island (cm2)
Footprint
R1 (°C/W)
0.3
R2 (°C/W)
0.15
R3 (°C/W)
4.2
R4 (°C/W)
4
8
16
9.6
9.4
9.2
9
R5 (°C/W)
15.1
10.5
8.5
5.5
R6 (°C/W)
16.7
12
9
6
R7 (°C/W)
0.3
R8 (°C/W)
0.15
C1 (W.s/°C)
0.021
C2 (W.s/°C)
0.015
C3 (W.s/°C)
0.2
C4 (W.s/°C)
1.9
2.2
2.32
2.45
C5 (W.s/°C)
2.45
7.3
13.7
20
C6 (W.s/°C)
11.85
22
25
30
C7 (W.s/°C)
0.021
C8 (W.s/°C)
0.015
25/34
Package and packing information
VND5004A-E / VND5004ASP30-E
5
Package and packing information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. ECOPACK® packages are lead-free. The category of Second Level Interconnect
is marked on the package and on the inner box label, in compliance with JEDEC Standard
JESD97. The maximum ratings related to soldering conditions are also marked on the inner
box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com.
5.2
MultiPowerSO-30 mechanical data
Figure 32. MultiPowerSO-30 outline
26/34
VND5004A-E / VND5004ASP30-E
Table 15.
Package and packing information
MultiPowerSO-30 mechanical data
Millimeters
Symbol
Min.
Typ.
A
Max.
2.35
A2
1.85
2.25
A3
0
0.1
B
0.42
0.58
C
0.23
0.32
D
17.1
E
18.85
E1
15.9
“e”
1
17.2
19.15
16
F6
14.3
F7
5.45
F8
0.73
L
0.8
N
S
17.3
16.1
1.15
10 Deg
0 Deg
7 Deg
27/34
Package and packing information
5.3
PQFN - 12x12 Power lead-less mechanical data
Figure 33. PQFN - 12x12 Power lead-less outline
28/34
VND5004A-E / VND5004ASP30-E
VND5004A-E / VND5004ASP30-E
Table 16.
Package and packing information
PQFN - 12x12 Power lead-less mechanical data
Millimeters
Symbol
Min.
Typ.
Max.
A
2
2.2
A1
0
0.05
b
0.35
0.47
C
0.50
D
11.90
12.10
Dh1
4.65
4.95
Dh2
10.45
10.65
Dh3
4.80
5
Dh4
4.80
5
E
11.90
12.10
Eh1
2.15
2.45
Eh2
5.15
5.45
Eh3
1.70
2
e1
0.90
e2
3.45
e3
1.10
f
0.50
f1
0.60
L
0.75
0.95
L1
1.65
1.90
L2
0.76
0.78
M
11.10
11.30
N
11.10
11.30
v
0.1
w
0.05
y
0.05
y1
0.1
29/34
Package and packing information
5.4
VND5004A-E / VND5004ASP30-E
MultiPowerSO-30 packing information
The devices can be packed in tube or tape and reel shipments (see the Devices summary
on page 1 for packaging quantities).
Figure 34. MultiPowerSO-30 tube shipment (no suffix)
Tube dimension
Dimension
A
mm
29
435
532
3.82
23.6
0.8
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
C
B
A
B
C (± 0.13)
Figure 35. MultiPowerSO-30 tape and reel shipment (suffix “TR”)
Reel dimension
Dimension
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
D (min)
G (+ 2 / -0)
N (min)
T (max)
mm
1000
1000
330
1.5
13
20.2
32
100
38.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Description
Dimension
mm
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.1)
K (max)
32
4
24
1.5
2
14.2
2.2
End
Start
Top
cover
tape
No components
Components
No components
500 mm min
500 mm min
Empty components pockets
User direction of feed
30/34
VND5004A-E / VND5004ASP30-E
5.5
Package and packing information
PQFN - 12x12 Power lead-less packing information
The devices can be packed in tray or tape and reel shipments (see the Devices summary on
page 1 for packaging quantities).
Figure 36. PQFN - 12x12 Power lead-less tray shipment (no suffix)
Tray information
Parameter
Base Q.ty
Bulk Q.ty
189
945
31/34
Package and packing information
VND5004A-E / VND5004ASP30-E
Figure 37. PQFN - 12x12 Power lead-less tape and reel shipment (suffix “TR”)
Tape dimensions
Dimension
mm
A0 ± 0.1
12.30
B0 ± 0.1
12.30
K0 ± 0.1
2.15
F ± 0.1
11.50
E ± 0.1
1.75
W ± 0.3
24
P2 ± 0.1
2
P0 ± 0.1
4
P1 ± 0.1
16
T ± 0.05
D
D1 (min)
0.30
1.50
1.50
Reel dimensions
Dimension
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
D (min)
G (+ 2 / -0)
N (min)
T (max)
32/34
mm
1500
1500
330
1.5
13
20.2
32
100
38.4
VND5004A-E / VND5004ASP30-E
6
Revision history
Revision history
Table 17.
Document revision history
Date
Revision
Changes
15-Sep-2003
1
Initial release.
21-Jun-2004
2
MultiPowerSO-30 package insertion.
22-Mar-2006
3
Major general update
02-Jul-2007
4
Document converted into new ST corporate template.
Contents and lists of tables and figures added.
Section 3.3: Maximum demagnetization energy (VCC = 13.5V)
added.
Section 5: Package and packing information updated
10-Dec-2007
5
Table 12: Electrical transient requirements - added note 3.
33/34
VND5004A-E / VND5004ASP30-E
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