OPA357 OPA2357 SBOS235C − MARCH 2002− REVISED MAY 2004 250MHz, Rail-to-Rail I/O, CMOS Operational Amplifier with Shutdown FEATURES DESCRIPTION D D D D D D D The OPA357 series of high-speed, voltage-feedback CMOS operational amplifiers are designed for video and other applications requiring wide bandwidth. They are unity-gain stable and can drive large output currents. Differential gain is 0.02% and differential phase is 0.09°. Quiescent current is only 4.9mA per channel. The OPA357 series op amps are optimized for operation on single or dual supplies as low as 2.5V (±1.25V) and up to 5.5V (±2.75V). Common-mode input range extends beyond the supplies. The output swing is within 100mV of the rails, supporting wide dynamic range. For applications requiring the full 100mA continuous output current, the single SO-8 PowerPAD version is available. The single version (OPA357), comes in the miniature SOT23-6 and SO-8 PowerPAD packages. The dual version (OPA2357) is offered in the MSOP-10 package. The dual version features completely independent circuitry for lowest crosstalk and freedom from interaction. All are specified over the extended −40°C to +125°C temperature range. D D D D D D UNITY-GAIN BANDWIDTH: 250MHz WIDE BANDWIDTH: 100MHz GBW HIGH SLEW RATE: 150V/ms LOW NOISE: 6.5nV/√Hz RAIL-TO-RAIL I/O HIGH OUTPUT CURRENT: > 100mA EXCELLENT VIDEO PERFORMANCE: Diff Gain: 0.02%, Diff Phase: 0.095 0.1dB Gain Flatness: 40MHz LOW INPUT BIAS CURRENT: 3pA QUIESCENT CURRENT: 4.9mA THERMAL SHUTDOWN SUPPLY RANGE: 2.5V to 5.5V SHUTDOWN IQ < 6mA MicroSIZE AND PowerPAD PACKAGES APPLICATIONS D D D D D D D D D D VIDEO PROCESSING ULTRASOUND OPTICAL NETWORKING, TUNABLE LASERS PHOTODIODE TRANSIMPEDANCE AMPS ACTIVE FILTERS HIGH-SPEED INTEGRATORS ANALOG-TO-DIGITAL (A/D) CONVERTER INPUT BUFFERS DIGITAL-TO-ANALOG (D/A) CONVERTER OUTPUT AMPLIFIERS BARCODE SCANNERS COMMUNICATIONS OPAx357 RELATED PRODUCTS FEATURES PRODUCT Non-Shutdown Version of OPA357 Family OPAx354 200MHz GBW, Rail-to-Rail Output, CMOS, Shutdown OPAx355 200MHz GBW, Rail-to-Rail Output, CMOS OPAx356 38MHz GBW, Rail-to-Rail Input/Output, CMOS OPAx350/3 75MHz BW G = 2, Rail-to-Rail Output OPAx631 150MHz BW G = 2, Rail-to-Rail Output OPAx634 100MHz BW, Differential Input/Output, 3.3V Supply THS412x V+ −VIN VOUT OPA357 +VIN V− Enable Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright 2002-2004, Texas Instruments Incorporated ! ! www.ti.com "#$ %"#$ www.ti.com SBOS235C − MARCH 2002− REVISED MAY 2004 ELECTROSTATIC DISCHARGE SENSITIVITY ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage, V+ to V− . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5V Signal Input Terminals Voltage(2) . . . (V−) − (0.5V) to (V+) + (0.5V) Current(2) . . . . . . . . . . . . . . . . . . . . . 10mA This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. Enable Input . . . . . . . . . . . . . . . . . . . . (V−) − (0.5V) to (V+) + (0.5V) Output Short-Circuit(3) . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous Operating Temperature . . . . . . . . . . . . . . . . . . . . . . −55°C to +150°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . . . . . . . +300°C ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. (2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails should be current limited to 10mA or less. (3) Short-circuit to ground, one amplifier per package. PACKAGE/ORDERING INFORMATION(1) PRODUCT PACKAGE−LEAD PACKAGE DESIGNATOR(1) SPECIFIED TEMPERATURE RANGE PACKAGE MARKING ORDERING NUMBER TRANSPORT MEDIA, QUANTITY OPA357 SO-8 PowerPAD DDA −40°C to +125°C OPA357A OPA357AIDDA OPA357AIDDAR Rails, 97 Tape and Reel, 2500 OPA357 SOT23-6 DBV −40°C to +125°C OADI OPA357AIDBVT OPA357AIDBVR Tape and Reel, 250 Tape and Reel, 3000 OPA2357 MSOP-10 DGS −40°C to +125°C BBG OPA2357AIDGST OPA2357AIDGSR Tape and Reel, 250 Tape and Reel, 2500 ″ ″ ″ ″ ″ ″ ″ ″ ″ ″ ″ ″ ″ ″ ″ (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet. PIN CONFIGURATION Top View OPA357 1 V− 2 +In OADI Out 3 OPA357 6 V+ 5 Enable OPA2357 NC (2 ) 1 8 Enable Out A 1 −In 2 7 V+ −In A 2 10 V+ 9 Out B 8 −In B A 4 −In +In 3 6 Out +In A 3 B V− 4 5 NC (2 ) V− 4 7 +In B Enable A 5 6 Enable B SOT23(1) SO PowerPAD(3) MSOP−10 NOTES: (1) Pin 1 of the SOT23-6 is determined by orienting the package marking as indicated in the diagram. (2) NC means no internal connection. (3) PowerPAD should be connected to V− or left floating. 2 "#$ %"#$ www.ti.com SBOS235C − MARCH 2002− REVISED MAY 2004 ELECTRICAL CHARACTERISTICS: VS = +2.7V to +5.5V Single-Supply Boldface limits apply over the temperature range, TA = −40°C to +125°C. All specifications at TA = +25°C, RF = 0Ω , RL = 1kΩ connected to VS/2, unless otherwise noted. OPA357AI OPA2357AI PARAMETER CONDITIONS MIN TYP MAX UNITS OFFSET VOLTAGE Input Offset Voltage VOS vs Temperature dVOS/dT vs Power Supply PSRR ±2 VS = +5V Specified Temperature Range Specified Temperature Range +4 VS = +2.7V to +5.5V, VCM = (VS/2) − 0.15V Specified Temperature Range ±200 ±8 mV +10 mV µV/°C ±800 µV/V ±900 µV/V 3 ±50 pA ±1 ±50 pA INPUT BIAS CURRENT Input Bias Current Input Offset Current IB IOS NOISE Input Voltage Noise Density Current Noise Density en in f = 1MHz 6.5 nV/√Hz f = 1MHz 50 fA/√Hz INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection Ratio VCM CMRR (V−) − (0.1) VS = +5.5V, −0.1V < VCM < +3.5V Specified Temperature Range 66 VS = +5.5V, −0.1V < VCM < +5.6V Specified Temperature Range 56 (V+) + (0.1V) 80 V dB 64 dB 68 dB 55 dB INPUT IMPEDANCE 1013 || 2 1013 || 2 Differential Common-Mode OPEN-LOOP GAIN AOL Specified Temperature Range VS = +5V, +0.3V < VO < +4.7V VS = +5V, +0.4V < VO < +4.6V 94 Ω || pF Ω || pF 110 dB 90 dB FREQUENCY RESPONSE Small-Signal Bandwidth f−3dB f−3dB G = +1, VO = 100mVPP, RF = 25Ω 250 MHz G = +2, VO = 100mVPP 90 MHz GBW G = +10 100 MHz f0.1dB SR G = +2, VO = 100mVPP 40 MHz VS = +5V, G = +1, 4V Step VS = +5V, G = +1, 2V Step 150 V/µs 130 V/µs VS = +3V, G = +1, 2V Step G = +1, VO = 200mVPP, 10% to 90% 110 V/µs 2 ns G = 1, VO = 2VPP, 10% to 90% 11 ns VS = +5V, G = +1, 2V Output Step 30 ns 60 ns VIN S Gain = VS 5 ns 2nd-Harmonic G = +1, f = 1MHz, VO = 2VPP, RL = 200Ω, VCM = 1.5V −75 dBc 3rd-Harmonic G = +1, f = 1MHz, VO = 2VPP, RL = 200Ω, VCM = 1.5V −83 dBc Differential Gain Error NTSC, RL = 150Ω 0.02 % Differential Phase Error NTSC, RL = 150Ω 0.09 degrees f = 5MHz −100 dB VS = +5V, RL = 1kΩ, AOL > 94dB VS = +5V, RL = 1kΩ, AOL > 90dB VS = +5V 0.1 Gain-Bandwidth Product Bandwidth for 0.1dB Gain Flatness Slew Rate Rise-and-Fall Time Settling Time, 0.1% 0.01% Overload Recovery Time Harmonic Distortion Channel-to-Channel Crosstalk, OPA2357 OUTPUT Voltage Output Swing from Rail Specified Temperature Range Output Current(1)(2), Single, Dual IO VS = +3V f < 100kHz Closed-Loop Output Impedance Open-Loop Output Resistance RO 0.3 0.4 100 V V mA 50 mV 0.05 Ω 35 Ω (1) See typical characteristics Output Voltage Swing vs Output Current. (2) Specified by design. 3 "#$ %"#$ www.ti.com SBOS235C − MARCH 2002− REVISED MAY 2004 ELECTRICAL CHARACTERISTICS: VS = +2.7V to +5.5V Single-Supply (continued) Boldface limits apply over the temperature range, TA = −40°C to +125°C. All specifications at TA = +25°C, RF = 0Ω , RL = 1kΩ connected to VS/2, unless otherwise noted. OPA357AI OPA2357AI PARAMETER CONDITIONS MIN TYP MAX UNITS 5.5 V 6 mA 7.5 mA 0.8 V POWER SUPPLY Specified Voltage Range VS 2.7 Operating Voltage Range Quiescent Current (per amplifier) 2.5 to 5.5 IQ VS = +5V, Enabled, IO = 0 Specified Temperature Range 4.9 V ENABLE/SHUTDOWN FUNCTION Disabled (logic−LOW Threshold) Enabled (logic−HIGH Threshold) 2 Logic Input Current Logic LOW V 200 nA Turn-On Time 100 ns Turn-Off Time 30 ns 74 dB Off Isolation G = +1, 5MHz, RL = 10Ω Quiescent Current (per amplifier) 3.4 6 µA THERMAL SHUTDOWN Junction Temperature TJ Shutdown +160 °C Reset from Shutdown +140 °C TEMPERATURE RANGE Specified Range −40 +125 °C Operating Range −55 +150 °C Storage Range −65 +150 Thermal Resistance qJA SOT23-6 150 °C/W SO-8 PowerPAD 65 °C/W MSOP-10 150 °C/W (1) See typical characteristics Output Voltage Swing vs Output Current. (2) Specified by design. 4 °C °C/W "#$ %"#$ www.ti.com SBOS235C − MARCH 2002− REVISED MAY 2004 TYPICAL CHARACTERISTICS At TA = +25°C, VS = 5V, G = +1, RF = 0Ω, RL = 1kΩ, and connected to VS/2, unless otherwise noted. INVERTING SMALL−SIGNAL FREQUENCY RESPONSE NONINVERTING SMALL−SIGNAL FREQUENCY RESPONSE 3 VO = 0.1VPP, RF = 604Ω 0 Normalized Gain (dB) 0 Normalized Gain (dB) 3 G = +1 RF = 25Ω VO = 0.1VPP G = +2, RF = 604Ω −3 G = +5, RF = 604Ω −6 G = +10, RF = 604Ω −9 −3 G = −1 −6 G = −5 G = −2 −9 G = −10 −12 −12 −15 100k 1M 10M Frequency (Hz) 100M −15 100k 1G 10M Frequency (Hz) 100M 1G NONINVERTING LARGE−SIGNAL STEP RESPONSE Output Voltage (40mV/div) Output Voltage (500mV/div) NONINVERTING SMALL−SIGNAL STEP RESPONSE 1M Time (20ns/div) Time (20ns/div) 0.1dB GAIN FLATNESS 0.5 LARGE−SIGNAL DISABLE/ENABLE RESPONSE 4.5 3.5 2.5 1.5 0.5 Disabled Normalized Gain (dB) Enabled Disable Voltage (V) Output Voltage (400mV/div) 0.4 VO = 0.1VPP 0.3 G = +1 RF = 25Ω 0.2 0.1 0 −0.1 −0.2 G = +2 RF = 604Ω −0.3 −0.4 VOUT fIN = 5MHz −0.5 100k Time (200ns/div) 1M 10M Frequency (Hz) 100M 1G 5 "#$ %"#$ www.ti.com SBOS235C − MARCH 2002− REVISED MAY 2004 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = 5V, G = +1, RF = 0Ω, RL = 1kΩ, and connected to VS/2, unless otherwise noted. HARMONIC DISTORTION vs OUTPUT VOLTAGE HARMONIC DISTORTION vs NONINVERTING GAIN −50 G = −1 f = 1MHz RL = 200Ω −60 −70 2nd−Harmonic −80 −90 0 1 2 Output Voltage (VPP) 3 −70 2nd−Harmonic −80 −90 3rd−Harmonic 3rd−Harmonic −100 VO = 2VPP f = 1MHz RL = 200Ω −60 Harmonic Distortion (dBc) Harmonic Distortion (dBc) −50 −100 4 1 10 Gain (V/V) HARMONIC DISTORTION vs INVERTING GAIN HARMONIC DISTORTION vs FREQUENCY −50 VO = 2VPP f = 1MHz R L = 200Ω −60 Harmonic Distortion (dBc) Harmonic Distortion (dBc) −50 −70 2nd−Harmonic −80 −90 −60 G = +1 VO = 2VPP RL = 200Ω VCM = 1.5V −70 2nd−Harmonic −80 3rd−Harmonic −90 3rd−Harmonic −100 1 10 −100 100k 1M Frequency (Hz) Gain (V/V) INPUT VOLTAGE AND CURRENT NOISE SPECTRAL DENSITY vs FREQUENCY HARMONIC DISTORTION vs LOAD RESISTANCE −60 10k G = +1 VO = 2VPP f = 1MHz VCM = 1.5V −70 Voltage Noise (nV/√Hz), Current Noise (fA/√Hz) Harmonic Distortion (dBc) −50 2nd−Harmonic −80 3rd−Harmonic −90 −100 1k Voltage Noise Current Noise 100 10 1 100 1k RL (Ω) 6 10M 10 100 1k 10k 100k Frequency (Hz) 1M 10M 100M "#$ %"#$ www.ti.com SBOS235C − MARCH 2002− REVISED MAY 2004 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = 5V, G = +1, RF = 0Ω, RL = 1kΩ, and connected to VS/2, unless otherwise noted. FREQUENCY RESPONSE FOR VARIOUS RL FREQUENCY RESPONSE FOR VARIOUS CL 3 9 RL = 10kΩ −3 −6 Normalized Gain (dB) Normalized Gain (dB) 0 G = +1 RF = 0Ω VO = 0.1VPP CL = 0pF G = +1 VO = 0.1VPP RS = 0Ω 6 RL = 1kΩ RL = 100Ω −9 RL = 50Ω 3 0 −3 CL = 47pF −6 −9 −12 CL = 5.6pF −12 −15 100k 1M 10M Frequency (Hz) 100M −15 100k 1G RECOMMENDED RS vs CAPACITIVE LOAD 1M 10M Frequency (Hz) 100M 1G FREQUENCY RESPONSE vs CAPACITIVE LOAD 160 3 For 0.1dB Flatness G = +1, VO = 0.1VPP 0 Normalized Gain (dB) 140 120 100 RS (Ω) CL = 100pF 80 60 VIN 40 RS VO OPA357 CL 0 1k 10 100 Capacitive Load (pF) CL = 47pF, RS = 140 Ω −3 CL = 100pF, RS = 120Ω −6 −9 VIN RS VO OPA357 −12 1kΩ 20 1 CL = 5.6pF, RS = 0Ω CL −15 100k 1M COMMON−MODE REJECTION RATIO AND POWER−SUPPLY REJECTION RATIO vs FREQUENCY 1kΩ 10M Frequency (Hz) 1G 100M OPEN−LOOP GAIN AND PHASE 180 100 160 Open−Loop Phase (degrees) Open−Loop Gain (dB) CMRR CMRR, PSRR (dB) 80 PSRR+ 60 PSRR− 40 20 140 120 Phase 100 80 60 40 Gain 20 0 −20 −40 0 10k 100k 1M 10M Frequency (Hz) 100M 1G 10 100 1k 10k 100k 1M Frequency (Hz) 10M 100M 1G 7 "#$ %"#$ www.ti.com SBOS235C − MARCH 2002− REVISED MAY 2004 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = 5V, G = +1, RF = 0Ω, RL = 1kΩ, and connected to VS/2, unless otherwise noted. COMPOSITE VIDEO DIFFERENTIAL GAIN AND PHASE INPUT BIAS CURRENT vs TEMPERATURE 10k 0.8 Input Bias Current (pA) dG/dP (%/degrees) 0.7 0.6 0.5 dP 0.4 0.3 0.2 0.1 1k 100 10 dG 1 0 1 2 3 −55 4 −35 −15 5 Number of 150Ω Loads OUTPUT VOLTAGE SWING vs OUTPUT CURRENT FOR VS = 3V 25 45 65 Temperature (_C) 85 105 125 135 SUPPLY CURRENT vs TEMPERATURE 7 3 Supply Current (mA) Output Voltage (V) 6 2 +125_ C +25_ C −55_ C 1 VS = 5V 5 4 VS = 2.5V 3 2 1 0 0 0 20 40 60 80 100 −55 120 −35 −15 5 Output Current (mA) OUTPUT VOLTAGE SWING vs OUTPUT CURRENT FOR VS = 5V 105 125 135 SHUTDOWN CURRENT vs TEMPERATURE VS = 5.5V 4 Shutdown Current (µA) 4 Output Voltage (V) 85 4.5 5 3 −55_C +25_ C +125_ C 2 1 3.5 3 VS = 5V 2.5 2 1.5 1 0 VS = 2.5V VS = 3V 0.5 0 0 25 50 75 100 125 Output Current (mA) 8 25 45 65 Temperature (_ C) 150 175 200 −55 −35 −15 5 25 45 65 Temperature (_C) 85 105 125 135 "#$ %"#$ www.ti.com SBOS235C − MARCH 2002− REVISED MAY 2004 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = 5V, G = +1, RF = 0Ω, RL = 1kΩ, and connected to VS/2, unless otherwise noted. CLOSED−LOOP OUTPUT IMPEDANCE vs FREQUENCY DISABLE FEEDTHROUGH vs FREQUENCY 0 Output Impedance (Ω) VDISABLE = 0 RL = 10Ω −20 Feedthrough (dB) 100 −40 −60 Forward Reverse −80 10 1 0.1 OPA357 −100 ZO −120 100k 1M 10M Frequency (Hz) 100M 0.01 100k 1G 1M MAXIMUM OUTPUT VOLTAGE vs FREQUENCY 100M 1G OUTPUT SETTLING TIME TO 0.1% 6 0.5 VS = 5.5V 0.4 5 4 VO = 2VPP 0.3 Maximum Output Voltage without Slew−Rate Induced Distortion Output Error (%) Output Voltage (VPP) 10M Frequency (Hz) 3 VS = 2.7V 2 0.2 0.1 0 −0.1 −0.2 −0.3 1 −0.4 −0.5 0 1 10 Frequency (MHz) 0 100 10 20 30 40 50 60 70 80 90 100 Time (ns) OPEN−LOOP GAIN vs TEMPERATURE OFFSET VOLTAGE PRODUCTION DISTRIBUTION 120 Population Open−Loop Gain (dB) RL = 1kΩ 110 100 90 80 70 −55 −35 −15 5 25 45 65 Temperature (_ C) 85 105 125 135 −8 −7 −6 −5 −4 −3 −2 −1 0 1 2 3 Offset Voltage (mV) 4 5 6 7 8 9 "#$ %"#$ www.ti.com SBOS235C − MARCH 2002− REVISED MAY 2004 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = 5V, G = +1, RF = 0Ω, RL = 1kΩ, and connected to VS/2, unless otherwise noted. COMMON−MODE REJECTION RATIO AND POWER−SUPPLY REJECTION RATIO vs TEMPERATURE CHANNEL−TO−CHANNEL CROSSTALK 0 Crosstalk, Input−Referred (dB) 100 CMRR, PSRR (dB) 90 Common−Mode Rejection Ratio 80 Power−Supply Rejection Ratio 70 60 50 −55 −35 −15 5 25 45 65 Temperature (_ C) 10 85 105 125 135 −20 −40 −60 OPA2357 −80 −100 −120 100k 1M 10M Frequency (Hz) 100M 1G "#$ %"#$ www.ti.com SBOS235C − MARCH 2002− REVISED MAY 2004 APPLICATIONS INFORMATION The OPA357 is a CMOS, rail-to-rail I/O, high-speed, voltage-feedback operational amplifier designed for video, high-speed, and other applications. It is available as a single or dual op amp. The amplifier features a 100MHz gain bandwidth, and 150V/µs slew rate, but it is unity-gain stable and can be operated as a +1V/V voltage follower. OPERATING VOLTAGE The OPA357 is specified over a power-supply range of +2.7V to +5.5V (±1.35V to ±2.75V). However, the supply voltage may range from +2.5V to +5.5V (±1.25V to ±2.75V). Supply voltages higher than 7.5V (absolute maximum) can permanently damage the amplifier. Parameters that vary over supply voltage or temperature are shown in the Typical Characteristics section of this data sheet. ENABLE FUNCTION The OPA357’s Enable function is implemented using a Schmitt trigger. The amplifier is enabled by applying a TTL HIGH voltage level (referenced to V−) to the Enable pin. Conversely, a TTL LOW voltage level (referenced to V−) will disable the amplifier, reducing its supply current from 4.9mA to only 3.4µA per amplifier. Independent Enable pins are available for each channel (dual version), providing maximum design flexibility. For portable battery-operated applications, this feature can be used to greatly reduce the average current and thereby extend battery life. The Enable input can be modeled as a CMOS input gate with a 100kΩ pull-up resistor to V+. This pin should be connected to a valid high or low voltage or driven, not left open circuit. The enable time is 100ns and the disable time is only 30ns. This allows the OPA357 to be operated as a gated amplifier, or to have its output multiplexed onto a common output bus. When disabled, the output assumes a high-impedance state. RAIL-TO-RAIL INPUT The specified input common-mode voltage range of the OPA357 extends 100mV beyond the supply rails. This is achieved with a complementary input stagean N-channel input differential pair in parallel with a P-channel differential pair, as shown in Figure 1. The N-channel pair is active for input voltages close to the positive rail, typically (V+) − 1.2V to 100mV above the positive supply, while the P-channel pair is on for inputs from 100mV below the negative supply to approximately (V+) − 1.2V. There is a small transition region, typically (V+) − 1.5V to (V+) − 0.9V, in which both pairs are on. This 600mV transition region can vary ±500mV with process variation. Thus, the transition region (both input stages on) can range from (V+) − 2.0V to (V+) − 1.5V on the low end, up to (V+) − 0.9V to (V+) − 0.4V on the high end. A double-folded cascode adds the signal from the two input pairs and presents a differential signal to the class AB output stage. V+ Reference Current VIN+ VIN− VBIAS1 Class AB Control Circuitry VO VBIAS2 V− (Ground) Figure 1. Simplified Schematic 11 "#$ %"#$ www.ti.com SBOS235C − MARCH 2002− REVISED MAY 2004 RAIL-TO-RAIL OUTPUT A class AB output stage with common-source transistors is used to achieve rail-to-rail output. For high-impedance loads (> 200Ω), the output voltage swing is typically 100mV from the supply rails. With 10Ω loads, a useful output swing can be achieved while maintaining high open-loop gain. See the typical characteristic curve Output Voltage Swing vs Output Current. R2 10kΩ C1 200pF +5V 1µF R1 100kΩ R 5 = 1Ω OUTPUT DRIVE OPA2357 The OPA357’s output stage can supply a continuous output current of ±100mA and still provide approximately 2.7V of output swing on a 5V supply, as shown in Figure 2. For maximum reliability, it is not recommended to run a continuous DC current in excess of ±100mA. Refer to the typical characteristic curve Output Voltage Swing vs Output Current. For supplying continuous output currents greater than ±100mA, the OPA357 may be operated in parallel as shown in Figure 3. R3 100kΩ + − 2V In = 200mA Out, as Shown R 6 = 1Ω RSHUNT 1Ω OPA2357 R4 10kΩ The OPA357 will provide peak currents up to 200mA, which corresponds to the typical short-circuit current. Therefore, an on-chip thermal shutdown circuit is provided to protect the OPA357 from dangerously high junction temperatures. At 160°C, the protection circuit will shut down the amplifier. Normal operation will resume when the junction temperature cools to below 140°C. Laser Diode Figure 3. Parallel Operation VIDEO R2 1kΩ + − C1 50pF V1 5V The OPA357 output stage is capable of driving standard back-terminated 75Ω video cables, as shown in Figure 4. By back-terminating a transmission line, it does not exhibit a capacitive load to its driver. A properly back-terminated 75Ω cable does not appear as capacitance; it presents only a 150Ω resistive load to the OPA357 output. 1µF R1 10kΩ V+ +5V OPA357 + VIN R3 10kΩ Video In V− R4 1kΩ − 1V In = 100mA Out, as Shown 75Ω 75Ω RSHUNT OPA357 +2.5V To enable, connect to V+ or drive with logic. 604Ω 604Ω Laser Diode Video Output +2.5V Figure 2. Laser Diode Driver 12 Figure 4. Single-Supply Video Line Driver "#$ %"#$ www.ti.com SBOS235C − MARCH 2002− REVISED MAY 2004 The OPA357 can be used as an amplifier for RGB graphic signals, which have a voltage of zero at the video black level, by offsetting and AC-coupling the signal. See Figure 5. 604Ω +3V + V+ 10nF 604Ω 75Ω 1/2 OPA2357 R1 Red(1) 1µF Red 75Ω R2 V+ R1 Green(1) R2 604Ω 75Ω 1/2 OPA2357 Green 75Ω 604Ω NOTE: (1) Source video signal offset 300mV above ground to accomodate op amp swing−to−ground capability. 604Ω +3V + V+ 1µF 10nF 604Ω 75Ω Blue(1) R1 OPA357 Blue 75Ω R2 Figure 5. RGB Cable Driver 13 "#$ %"#$ www.ti.com SBOS235C − MARCH 2002− REVISED MAY 2004 WIDEBAND VIDEO MULTIPLEXING inputs to source onto a single line. This simple Wired-OR Video Multiplexer can be easily implemented using the OPA357; see Figure 6. One common application for video speed amplifiers which include an enable pin is to wire multiple amplifier outputs together, then select which one of several possible video +2.5V + 49.9Ω Signal #1 1µF 10nF 1µF 10nF A O PA357 + −2.5V 1kΩ 49.9Ω VOUT 1kΩ 49.9Ω +2.5V + 49.9Ω Signal #2 1µF 10nF 1µF 10nF B O PA357 + −2.5V 1kΩ 1kΩ HCO4 BON Select AON Figure 6. Multiplexed Output 14 "#$ %"#$ www.ti.com SBOS235C − MARCH 2002− REVISED MAY 2004 DRIVING ANALOG−TO−DIGITAL CONVERTERS The OPA357 series op amps offer 60ns of settling time to 0.01%, making them a good choice for driving high- and medium-speed sampling A/D converters and reference circuits. The OPA357 series provide an effective means of buffering the A/D converter’s input capacitance and resulting charge injection while providing signal gain. See Figure 7 for the OPA357 driving an A/D converter. With the OPA357 in an inverting configuration, a capacitor across the feedback resistor can be used to filter high-frequency noise in the signal; see Figure 7. CAPACITIVE LOAD AND STABILITY The OPA357 series op amps can drive a wide range of capacitive loads. However, all op amps under certain conditions may become unstable. Op amp configuration, gain, and load value are just a few of the factors to consider when determining stability. An op amp in unity-gain configuration is most susceptible to the effects of capacitive loading. The capacitive load reacts with the op amp’s output resistance, along with any additional load resistance, to create a pole in the small-signal response that degrades the phase margin. Refer to the typical characteristic curve Frequency Response for Various CL for details. The OPA357’s topology enhances its ability to drive capacitive loads. In unity gain, these op amps perform well with large capacitive loads. Refer to the typical characteristic curves Recommended RS vs Capacitive Load and Frequency Response vs Capacitive Load for details. One method of improving capacitive load drive in the unity-gain configuration is to insert a 10Ω to 20Ω resistor in series with the output, as shown in Figure 8. This significantly reduces ringing with large capacitive loadssee the typical characteristic curve Frequency Response vs Capacitive Load. However, if there is a resistive load in parallel with the capacitive load, RS creates a voltage divider. This introduces a DC error at the output and slightly reduces output swing. This error may be insignificant. For instance, with RL = 10kΩ and RS = 20Ω, there is only about a 0.2% error at the output. +5V 330pF 5kΩ 5kΩ VIN VREF V+ 5kΩ ADS7818, ADS7861, or ADS7864 12−Bit A/D Converter +In OPA357 +2.5V 0.1µF −In GND VIN = 0V to −5V for 0V to 5V output. NOTE: A/D Converter Input = 0V to VREF Figure 7. The OPA357 in Inverting Configuration Driving an A/D Converter V+ RS VOUT OPA357 VIN RL CL To enable, connect to V+ or drive with logic. Figure 8. Series Resistor in Unity-Gain Configuration Improves Capacitive Load Drive 15 "#$ %"#$ www.ti.com SBOS235C − MARCH 2002− REVISED MAY 2004 WIDEBAND TRANSIMPEDANCE AMPLIFIER PCB LAYOUT Wide bandwidth, low input bias current, and low input voltage and current noise make the OPA357 an ideal wideband photodiode transimpedance amplifier for low-voltage single-supply applications. Low-voltage noise is important because photodiode capacitance causes the effective noise gain of the circuit to increase at high frequency. Good high-frequency printed circuit board (PCB) layout techniques should be employed for the OPA357. Generous use of ground planes, short and direct signal traces, and a suitable bypass capacitor located at the V+ pin will assure clean, stable operation. Large areas of copper also provides a means of dissipating heat that is generated in normal operation. The key elements to a transimpedance design, as shown in Figure 9, are the expected diode capacitance (including the parasitic input common-mode and differential-mode input capacitance (2 + 2)pF for the OPA357), the desired transimpedance gain (RF), and the Gain Bandwidth Product (GBP) for the OPA357 (100MHz). With these 3 variables set, the feedback capacitor value (CF) may be set to control the frequency response. Sockets are definitely not recommended for use with any high-speed amplifier. CF <1pF (prevents gain peaking) POWER DISSIPATION RF 10MΩ +V λ CD OPA357 VOUT To enable, connect to V+ or drive with logic. Figure 9. Transimpedance Amplifier To achieve a maximally flat 2nd-order Butterworth frequency response, the feedback pole should be set to: 1 + 2pR FCF GBP Ǹ4pR C F D (1) Typical surface-mount resistors have a parasitic capacitance of around 0.2pF that must be deducted from the calculated feedback capacitance value. Bandwidth is calculated by: f *3dB + GBP Hz Ǹ2pR C F D (2) For even higher transimpedance bandwidth, the high-speed CMOS OPA355 (200MHz GBW) or the OPA655 (400MHz GBW) may be used. 16 A 10nF ceramic bypass capacitor is the minimum recommended value; adding a 1µF or larger tantalum capacitor in parallel can be beneficial when driving a low-resistance load. Providing adequate bypass capacitance is essential to achieving very low harmonic and intermodulation distortion. Besides the regular SOT23-6 and MSOP-10, the single and dual versions of the OPA357 also come in an SO-8 PowerPAD. The SO-8 PowerPAD is a standard-size SO-8 package where the exposed leadframe on the bottom of the package is soldered directly to the PCB to create an extremely low thermal resistance. This will enhance the OPA357’s power dissipation capability significantly and eliminates the use of bulky heatsinks and slugs traditionally used in thermal packages. This package can be easily mounted using standard PCB assembly techniques. NOTE: Since the SO-8 PowerPAD is pin-compatible with standard SO-8 packages, the OPA357 can directly replace operational amplifiers in existing sockets. Soldering the PowerPAD to the PCB is always recommended, even with applications that have low power dissipation. This provides the necessary thermal and mechanical connection between the leadframe die pad and the PCB. For resistive loads, the maximum power dissipation occurs at a DC output voltage of one-half the power-supply voltage. Dissipation with AC signals is lower. Application Bulletin AB-039 (SBOA022), Power Amplifier Stress and Power Handling Limitations, explains how to calculate or measure power dissipation with unusual signals and loads, and can be found at www.ti.com. Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heat sink. For reliable operation, junction temperature should be limited to 150°C, maximum. To estimate the margin of safety in a complete design, increase the ambient temperature until the thermal protection is triggered at 160°C. The thermal protection should trigger more than 35°C above the maximum expected ambient condition of your application. "#$ %"#$ www.ti.com SBOS235C − MARCH 2002− REVISED MAY 2004 PowerPAD THERMALLY ENHANCED PACKAGE The OPA357 uses the SO-8 PowerPAD package, a thermally enhanced, standard size IC package designed to eliminate the use of bulky heatsinks and slugs traditionally used in thermal packages. This package can be easily mounted using standard PCB assembly techniques. The PowerPAD package is designed so that the leadframe die pad (or thermal pad) is exposed on the bottom of the IC, as shown in Figure 10. This provides an extremely low thermal resistance (qJC) path between the die and the exterior of the package. The thermal pad on the bottom of the IC is then soldered directly to the PCB, using the PCB as a heatsink. In addition, plated-through holes (vias) provide a low thermal resistance heat flow path to the back side of the PCB. PowerPAD ASSEMBLY PROCESS 1. The PowerPAD must be connected to the device’s most negative supply voltage, which will be ground in single-supply applications, and V− in split−supply applications. 2. Prepare the PCB with a top-side etch pattern, as shown in Figure 11. The exact land design may vary based on the specific assembly process requirements. There should be etch for the leads as well as etch for the thermal land. Thermal Land (Copper) Minimum Size 4.8mm x 3.8mm (189 mils x 150 mils) OPTIONAL: Additional 4 vias outside of thermal pad area but under the package. REQUIRED: Thermal pad area 2.286mm x 2.286mm (90 mils x 90 mils) with 5 vias (via diameter = 13 mils) Leadframe (Copper Alloy) IC (Silicon) Mold Compound (Plastic) Die Attach (Epoxy) Leadframe Die Pad Exposed at Base of the Package (Copper Alloy) Figure 10. Section View of a PowerPAD Package Figure 11. 8-Pin PowerPAD PCB Etch and Via Pattern 3. Place the recommended number of plated-through holes (or thermal vias) in the area of the thermal pad. These holes should be 13 mils in diameter. They are kept small so that solder wicking through the holes is not a problem during reflow. The minimum recommended number of holes for the SO-8 PowerPAD package is 5, as shown in Figure 11. 4. It is recommended, but not required, to place a small number of additional holes under the package and outside the thermal pad area. These holes provide additional heat paths between the copper thermal land and the ground plane. They may be larger because they are not in the area to be soldered, so wicking is not a problem. This is illustrated in Figure 11. 17 "#$ %"#$ www.ti.com SBOS235C − MARCH 2002− REVISED MAY 2004 5. Connect all holes, including those within the thermal pad area and outside the pad area, to the internal ground plane or other internal copper plane for single-supply applications, and to V− for split-supply applications. 6. When laying out these holes, do not use the typical web or spoke via connection methodology, as shown in Figure 12. Web connections have a high thermal resistance connection that is useful for slowing the heat transfer during soldering operations. This makes soldering the vias that have ground plane connections easier. However, in this application, low thermal resistance is desired for the most efficient heat transfer. Therefore, the holes under the PowerPAD package should make their connection to the internal ground plane with a complete connection around the entire circumference of the plated-through hole. Solid Via RECOMMENDED Web or Spoke Via NOT RECOMMENDED (due to poor heat conduction) Figure 12. Internal ESD Protection 18 7. The top-side solder mask should leave the pad connections and the thermal pad area exposed. The thermal pad area should leave the 13 mil holes exposed. The larger holes outside the thermal pad area may be covered with solder mask. 8. Apply solder paste to the exposed thermal pad area and all of the package terminals. 9. With these preparatory steps in place, the PowerPAD IC is simply placed in position and run through the solder reflow operation as any standard surface-mount component. This results in a part that is properly installed. For detailed information on the PowerPAD package including thermal modeling considerations and repair procedures, please see Technical Brief SLMA002, PowerPAD Thermally Enhanced Package, located at www.ti.com. PACKAGE OPTION ADDENDUM www.ti.com 10-May-2004 PACKAGING INFORMATION ORDERABLE DEVICE STATUS(1) PACKAGE TYPE PACKAGE DRAWING PINS PACKAGE QTY OPA2357AIDGSR ACTIVE VSSOP DGS 10 2500 OPA2357AIDGST ACTIVE VSSOP DGS 10 250 OPA357AIDBVR ACTIVE SOP DBV 6 3000 OPA357AIDBVT ACTIVE SOP DBV 6 250 OPA357AIDDA ACTIVE HSOP DDA 8 100 OPA357AIDDAR ACTIVE HSOP DDA 8 2500 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. 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