TS3A4751 www.ti.com .............................................................................................................................................................. SCDS227D – JULY 2006 – REVISED JULY 2008 0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY QUAD SPST ANALOG SWITCH FEATURES 1 COM1 2 13 IN1 NO2 3 12 IN4 11 NO4 IN2 5 10 COM4 IN3 6 9 COM3 GND 7 8 NO3 COM2 IN2 IN3 4 5 6 COM1 NO2 2 7 GND 8 NO3 9 11 10 IN1 NO4 14 COM4 COM3 Exposed Center Pad 12 5 IN2 IN3 V+ 1 13 4 COM2 GND NO1 6 2 3 NO2 7 COM1 1 NO3 IN4 Exposed Center Pad 3 9 NO4 COM4 COM3 11 10 IN1 IN4 RGY PACKAGE (BOTTOM VIEW) 8 14 APPLICATIONS If the exposed center pad is used, it must be connected as a secondary ground or left electrically open. NO2 COM2 IN2 3 4 5 NO1 COM1 8 2 COM3 NO3 9 RUC PACKAGE (BOTTOM VIEW) 1 NO4 COM4 11 10 RUC PACKAGE (TOP VIEW) 12 11 10 9 8 NO4 COM4 COM3 NO3 GND IN4 IN3 7 5 6 13 IN2 14 IN1 4 V+ IN3 COM2 GND 6 2 7 14 3 13 V+ NO2 IN1 COM1 Power Routing Battery Powered Systems Audio and Video Signal Routing Low-Voltage Data-Acquisition Systems Communications Circuits PCMCIA Cards Cellular Phones Modems Hard Drives V+ 12 13 V+ NO1 • • • • • • • • • 14 RGY PACKAGE (TOP VIEW) IN4 • • NO1 1 COM2 4 12 • • • PW PACKAGE (TOP VIEW) 1 • • Low ON-State Resistance (rON) – 0.9 Ω Max (3-V Supply) – 1.5 Ω Max (1.8-V Supply) rON Flatness: 0.4 Ω Max (3-V) rON Matching – 0.05 Ω Max (3-V Supply) – 0.25 Ω Max (1.8-V Supply) 1.6-V to 3.6-V Single-Supply Operation 1.8-V CMOS Logic Compatible (3-V Supply) High Current-Handling Capacity (100 mA Continuous) Fast Switching: tON = 14 ns, tOFF = 9 ns ESD Protection Exceeds JESD-22 – 4000-V Human Body Model (A114-A) – 300-V Machine Model (A115-A) – 1000-V Charged Device Model (C101) NO1 • DESCRIPTION/ORDERING INFORMATION The TS3A4751 is a low ON-state resistance (ron), low-voltage, quad, single-pole/single-throw (SPST) analog switch that operates from a single 1.6-V to 3.6-V supply. This device has fast switching speeds, handles rail-to-rail analog signals, and consumes very low quiescent power. The digital input is 1.8-V CMOS compatible when using a 3-V supply. The TS3A4751 has four normally open (NO) switches. The TS3A4751 is available in a 14-pin thin shrink small-outline package (TSSOP) and in space-saving 14-pin SON (RGY) and micro QFN (RUC) packages. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006–2008, Texas Instruments Incorporated TS3A4751 SCDS227D – JULY 2006 – REVISED JULY 2008 .............................................................................................................................................................. www.ti.com ORDERING INFORMATION PACKAGE (1) (2) TA –40°C to 85°C (1) (2) ORDERABLE PART NUMBER TOP-SIDE MARKING SON – RGY Reel of 2000 TS3A4751RGYR YC751 micro QFN – RUC Reel of 2000 TS3A4751RUCR 3M TSSOP – PW Reel of 2000 TS3A4751PWR YC751 Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. FUNCTION TABLE IN NO TO COM, COM TO NO L OFF H ON ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) V+ Supply voltage range referenced to GND VNO VCOM VIN Analog and digital voltage range INO ICOM On-state switch current I+ IGND Continuous current through V+ or GND (2) VNO, VCOM = 0 to V+ Peak current pulsed at 1 ms, 10% duty cycle TA Operating temperature range TJ Junction temperature Tstg Storage temperature range (1) (2) MIN MAX –0.3 4 V –0.3 V+ + 0.3 V –100 100 mA ±100 mA ±200 mA 85 °C 150 °C 150 °C COM, VI/O –40 –65 UNIT Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Signals on COM or NO exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current rating. PACKAGE THERMAL IMPEDANCE UNIT PW package θJA (1) 2 Package thermal impedance (1) 88 RGY package 91.6 RUC package 216.7 °C/W The package thermal impedance is measured in accordance with JESD 51-7. Submit Documentation Feedback Copyright © 2006–2008, Texas Instruments Incorporated Product Folder Link(s): TS3A4751 TS3A4751 www.ti.com .............................................................................................................................................................. SCDS227D – JULY 2006 – REVISED JULY 2008 ELECTRICAL CHARACTERISTICS FOR 3-V SUPPLY (1) (2) V+ = 2.7 V to 3.6 V, TA = –40°C to 85°C, VIH = 1.4 V, VIL = 0.5 V (unless otherwise noted). PARAMETER SYMBOL TEST CONDITIONS TA MIN TYP (3) MAX UNIT Analog Switch Analog signal range VCOM, VNO ON-state resistance ron V+ = 2.7 V, ICOM = –100 mA, VNO = 1.5 V 25°C Δron V+ = 2.7 V, ICOM = –100 mA, VNO = 1.5 V 25°C ron(flat) V+ = 2.7 V, ICOM = –100 mA, VNO = 1 V, 1.5 V, 2 V 25°C ON-state resistance match between channels (4) ON-state resistance flatness (5) 0 V+ 0.7 Full 1.1 0.03 Full 0.05 0.15 0.23 Full 0.4 0.5 NO OFF leakage current (6) INO(OFF) V+ = 3.6 V, VCOM = 0.3 V, 3 V, VNO = 3 V, 0.3 V 25°C –2 Full –18 COM OFF leakage current (6) ICOM(OFF) V+ = 3.6 V, VCOM = 0.3 V, 3 V, VNO = 3 V, 0.3 V 25°C –2 Full –18 COM ON leakage current (6) ICOM(ON) V+ = 3.6 V, VCOM = 0.3 V, 3 V, VNO = 0.3 V, 3 V, or floating 25°C –2.5 Full 0.9 1 2 18 1 2 18 0.01 –5 2.5 5 V Ω Ω Ω nA nA nA Dynamic Turn-on time tON VNO = 1.5 V, RL = 50 Ω, CL = 35 pF, See Figure 14 25°C Turn-off time tOFF VNO = 1.5 V, RL = 50 Ω, CL = 35 pF, See Figure 14 25°C Charge injection QC VGEN = 0, RGEN = 0, CL = 1 nF, See Figure 15 25°C 3 pC CNO(OFF) f = 1 MHz, See Figure 16 25°C 23 pF COM OFF capacitance CCOM(OFF) f = 1 MHz, See Figure 16 25°C 20 pF COM ON capacitance CCOM(ON) f = 1 MHz, See Figure 16 25°C 43 pF 25°C 125 MHz NO OFF capacitance Bandwidth BW RL = 50 Ω, Switch ON OFF isolation (7) OISO RL = 50 Ω, CL = 5 pF, See Figure 17 f = 10 MHz Crosstalk XTALK RL = 50 Ω, CL = 5 pF, See Figure 17 f = 10 MHz Total harmonic distortion THD f = 20 Hz to 20 kHz, VCOM = 2 VP-P RL = 32 Ω f = 1 MHz f = 1 MHz RL = 600 Ω 5 Full 14 15 4 Full 9 10 –40 25°C –73 dB –95 0.04 25°C ns dB –62 25°C ns % 0.003 Digital Control Inputs (IN1–IN4) Input logic high VIH Full Input logic low VIL Full Input leakage current IIN VI = 0 or V+ 1.4 25°C Full V 0.5 0.5 –20 1 20 V nA Supply Power-supply range Positive-supply current (1) (2) (3) (4) (5) (6) (7) V+ I+ 1.6 V+ = 3.6 V, VIN = 0 or V+ 3.6 25°C 0.075 Full 0.75 V µA The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum. Parts are tested at 85°C and specified by design and correlation over the full temperature range. Typical values are at V+ = 3 V, TA = 25°C. Δron = ron(max) – ron(min) Flatness is defined as the difference between the maximum and minimum value of ron as measured over the specified analog signal ranges. Leakage parameters are 100% tested at the maximum-rated hot operating temperature and specified by correlation at TA = 25°C. OFF isolation = 20log10 (VCOM/VNO), VCOM = output, VNO = input to OFF switch Submit Documentation Feedback Copyright © 2006–2008, Texas Instruments Incorporated Product Folder Link(s): TS3A4751 3 TS3A4751 SCDS227D – JULY 2006 – REVISED JULY 2008 .............................................................................................................................................................. www.ti.com ELECTRICAL CHARACTERISTICS FOR 1.8-V SUPPLY (1) (2) V+ = 1.65 V to 1.95 V, TA = –40°C to 85°C, VIH = 1 V, VIL = 0.4 V (unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS TA MIN TYP (3) MAX UNIT Analog Switch Analog signal range VCOM, VNO ON-state resistance ron V+ = 1.8 V, ICOM = –10 mA, VNO = 0.9 V 25°C Δron V+ = 1.8 V, ICOM = –10 mA, VNO = 0.9 V 25°C ron(flat) V+ = 1.8 V, ICOM = –10 mA, 0 ≤ VNO ≤ V+ 25°C ON-state resistance match between channels (4) ON-state resistance flatness (5) 0 V+ 1 Full 1.5 2 0.09 Full 0.15 0.25 0.7 Full 0.9 1.5 NO OFF leakage current (6) INO(OFF) V+ = 1.95 V, VCOM = 0.15 V, 1.65 V, VNO = 1.8 V, 0.15 V 25°C –1 Full –10 COM OFF leakage current (6) ICOM(OFF) V+ = 1.95 V, VCOM = 0.15 V, 1.65 V, VNO = 1.65 V, 0.15 V 25°C –1 Full –10 COM ON leakage current (6) ICOM(ON) V+ = 1.95 V, VCOM = 0.15 V, 1.65 V, VNO = 0.15 V, 1.65 V, or floating 25°C –1 Full –3 0.5 1 10 0.5 1 10 0.01 1 3 V Ω Ω Ω nA nA nA Dynamic Turn-on time tON VNO = 1.5 V, RL = 50 Ω, CL = 35 pF, See Figure 14 25°C Turn-off time tOFF VNO = 1.5 V, RL = 50 Ω, CL = 35 pF, See Figure 14 25°C Charge injection QC VGEN = 0, RGEN = 0, CL = 1 nF, See Figure 15 25°C 3.2 pC CNO(OFF) f = 1 MHz, See Figure 16 25°C 23 pF COM OFF capacitance CCOM(OFF) f = 1 MHz, See Figure 16 25°C 20 pF COM ON capacitance CCOM(ON) f = 1 MHz, See Figure 16 25°C 43 pF 25°C 123 MHz NO OFF capacitance 6 Full 20 5 Full Bandwidth BW RL = 50 Ω, Switch ON OFF isolation (7) OISO RL = 50 Ω, CL = 5 pF, See Figure 17 f = 10 MHz Crosstalk XTALK RL = 50 Ω, CL = 5 pF, See Figure 17 f = 10 MHz Total harmonic distortion THD f = 20 Hz to 20 kHz, VCOM = 2 VP-P RL = 32 Ω f = 100 MHz f = 100 MHz RL = 600 Ω 18 10 12 –61 25°C –95 dB –73 0.14 25°C ns dB –36 25°C ns % 0.013 Digital Control Inputs (IN1–IN4) Input logic high VIH Full Input logic low VIL Full Input leakage current IIN VI = 0 or V+ 1 25°C Full V 0.4 0.1 –10 5 10 V nA Supply Power-supply range Positive-supply current (1) (2) (3) (4) (5) (6) (7) 4 V+ I+ 1.6 VI = 0 or V+ 3.6 25°C 0.05 Full 0.5 V µA The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum. Parts are tested at 85°C and specified by design and correlation over the full temperature range. Typical values are at TA = 25°C. Δron = ron(max) – ron(min) Flatness is defined as the difference between the maximum and minimum value of ron as measured over the specified analog signal ranges. Leakage parameters are 100% tested at the maximum-rated hot operating temperature and specified by correlation at TA = 25°C. OFF isolation = 20log10 (VCOM/VNO), VCOM = output, VNO = input to OFF switch Submit Documentation Feedback Copyright © 2006–2008, Texas Instruments Incorporated Product Folder Link(s): TS3A4751 TS3A4751 www.ti.com .............................................................................................................................................................. SCDS227D – JULY 2006 – REVISED JULY 2008 TYPICAL PERFORMANCE 1.6 1.6 1.4 1.4 1.2 255C 1.2 V+ = 1.8 V 1.0 ron (W) 1.0 ron (Ω) 855C 0.8 0.6 V+ = 2.7 V 0.8 0.4 0.4 0.2 0.2 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 –405C 0.6 0.0 0.0 255C Inc/com (pA) ron (W) 2.0 NC/NO (OFF) –405C 100.00 COM (ON) 10.00 1.00 0.5 1.0 1.5 VCOM (V) 2.0 2.5 −40°C 3.0 Figure 4. ION 25°C 85°C TA (°C) and IOFF vs Temperature (V+ = 3.6 V) 8 35 30 7 V+ = 3 V 6 tON/tOFF (ns) 25 QC (pC) 1.5 1000.00 855C Figure 3. ron vs VCOM (V+ = 2.7 V) 20 15 V+ = 1.8 V 10 5 0 0.0 1.0 VCOM (V) Figure 2. ron vs VCOM (V+ = 1.8 V) VCOM (V) Figure 1. ron vs VCOM 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0.0 0.5 5 tON 4 3 tOFF 2 1 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 1.6 VCOM (V) 2.0 2.4 2.8 3.2 3.6 4.0 V+ (V) Figure 5. QC vs VCOM Figure 6. tON and tOFF vs Supply Voltage Copyright © 2006–2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TS3A4751 5 TS3A4751 SCDS227D – JULY 2006 – REVISED JULY 2008 .............................................................................................................................................................. www.ti.com TYPICAL PERFORMANCE (continued) 7 1000.000 tON = 1.8 V 855C 100.000 5 255C 10.000 ICC (nA) tON/tOFF (ns) 6 4 3 tOFF = 1.8 V tON = 3 V tOFF = 3 V 2 1.000 –405C 0.100 1 0.010 0 −40°C 25°C TA (°C) 0.001 0.0 85°C 0.5 1.0 1.5 2.0 2.5 3.0 3.5 V+ (V) Figure 7. tON and tOFF vs Temperature Figure 8. ICC vs V+ 0 0 −2 −10 −20 Attenuation (dB) Gain (dB) −4 −6 −8 −10 −12 −30 −40 −50 −60 −70 −80 −14 −90 0.1 1 10 Frequency (MHz) 100 1000 0.1 Figure 9. Gain vs Frequency (V+ = 3 V) 1 10 Frequency (MHz) 100 1000 Figure 10. OFF Isolation vs Frequency (V+ = 3 V) 0.042 0.0040 0.0036 0.041 0.0032 0.0028 THD (%) THD (%) 0.040 0.039 0.038 0.0024 0.0020 0.0016 0.0012 0.0008 0.037 0.0004 0.036 0 10 1K 10K 100K Frequency (kHz) Figure 11. Total Harmonic Distortion vs Frequency (RL = 32 Ω) 6 100 0.0000 0 10 100 1K Frequency (kHz) 10K 100K Figure 12. Total Harmonic Distortion vs Frequency (RL = 600 Ω) Submit Documentation Feedback Copyright © 2006–2008, Texas Instruments Incorporated Product Folder Link(s): TS3A4751 TS3A4751 www.ti.com .............................................................................................................................................................. SCDS227D – JULY 2006 – REVISED JULY 2008 TYPICAL PERFORMANCE (continued) 0 Attenuation (dB) −20 −40 −60 −80 −100 −120 0 0.1 1 10 100 1000 Frequency (MHz) Figure 13. Crosstalk vs Frequency (V+ = 3 V) PIN DESCRIPTION PIN NO. NAME 1, 3, 8, 11 NO1, NO2, NO3, NO4 Normally open DESCRIPTION 2, 4, 9, 10 COM1, COM2, COM3, COM4 Common 7 GND 13, 5, 6, 12 IN1, IN2, IN3, IN4 14 V+ Ground Logic control inputs Positive supply voltage Submit Documentation Feedback Copyright © 2006–2008, Texas Instruments Incorporated Product Folder Link(s): TS3A4751 7 TS3A4751 SCDS227D – JULY 2006 – REVISED JULY 2008 .............................................................................................................................................................. www.ti.com APPLICATION INFORMATION Proper power-supply sequencing is recommended for all CMOS devices. Do not exceed the absolute maximum ratings because stresses beyond the listed ratings can cause permanent damage to the devices. Always sequence V+ on first, followed by NO or COM. Although it is not required, power-supply bypassing improves noise margin and prevents switching noise propagation from the V+ supply to other components. A 0.1-µF capacitor, connected from V+ to GND, is adequate for most applications. Logic Inputs The TS3A4751 logic inputs can be driven up to 3.6 V, regardless of the supply voltage. For example, with a 1.8-V supply, IN may be driven low to GND and high to 3.6 V. Driving IN rail to rail minimizes power consumption. Analog Signal Levels Analog signals that range over the entire supply voltage (V+ to GND) can be passed with very little change in ron (see Typical Operating Characteristics). The switches are bidirectional, so NO and COM can be used as either inputs or outputs. Layout High-speed switches require proper layout and design procedures for optimum performance. Reduce stray inductance and capacitance by keeping traces short and wide. Ensure that bypass capacitors are as close to the device as possible. Use large ground planes where possible. 8 Submit Documentation Feedback Copyright © 2006–2008, Texas Instruments Incorporated Product Folder Link(s): TS3A4751 TS3A4751 www.ti.com .............................................................................................................................................................. SCDS227D – JULY 2006 – REVISED JULY 2008 TEST CIRCUITS/TIMING DIAGRAMS V+ V+ IN NO VIH + 0.5 V VNO IN VNO VCOM 35 pF a 50 W 50% 50% 0 VCOM COM GND tR < 5 ns tF < 5 ns 90% 90% 0 tON tOFF Figure 14. Switching Times V+ V+ RGEN NO VGEN VI IN GND a VI VO COM CL 1000 pF V+ 0 VO DVO Figure 15. Charge Injection (QC) Submit Documentation Feedback Copyright © 2006–2008, Texas Instruments Incorporated Product Folder Link(s): TS3A4751 9 TS3A4751 SCDS227D – JULY 2006 – REVISED JULY 2008 .............................................................................................................................................................. www.ti.com V+ V+ NO 1-MHz Capacitance Analyzer As Required IN COM GND Figure 16. NO and COM Capacitance V+ 0.1 mF Network Analyzer V+ VI 50 W 50 W Meas Ref NO (1) VO V+ IN COM GND Measurements are standardized against short at socket terminals. OFF isolation is measured between COM and OFF terminals on each switch. Bandwidth is measured between COM and ON terminals on each switch. Signal direction through switch is reversed; worst values are recorded. 50 W 50 W OFF isolation = 20 log VO/VI (1) Add 50-W termination for OFF isolation Figure 17. OFF Isolation, Bandwidth, and Crosstalk 10 Submit Documentation Feedback Copyright © 2006–2008, Texas Instruments Incorporated Product Folder Link(s): TS3A4751 TS3A4751 www.ti.com .............................................................................................................................................................. SCDS227D – JULY 2006 – REVISED JULY 2008 VI = V+/2 fSOURCE = 20 Hz to 20 kHz Channel ON: COM to NO VSOURCE = V+ P-P CL = 50 pF RL = 600 W V+/2 Audio Analyzer NO Signal Source 600 W COM CL(A) IN 600 W -V+/2 A. CL includes probe and jig capacitance. Figure 18. Total Harmonic Distortion (THD) Submit Documentation Feedback Copyright © 2006–2008, Texas Instruments Incorporated Product Folder Link(s): TS3A4751 11 PACKAGE OPTION ADDENDUM www.ti.com 21-Dec-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TS3A4751PWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS3A4751PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS3A4751RGYR ACTIVE VQFN RGY 14 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TS3A4751RGYRG4 ACTIVE VQFN RGY 14 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TS3A4751RUCR ACTIVE QFN RUC 14 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 31-Jul-2010 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TS3A4751PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TS3A4751RGYR VQFN RGY 14 3000 330.0 12.4 3.75 3.75 1.15 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 31-Jul-2010 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TS3A4751PWR TS3A4751RGYR TSSOP PW 14 2000 346.0 346.0 29.0 VQFN RGY 14 3000 346.0 346.0 29.0 Pack Materials-Page 2 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. 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