Preliminary Preliminary Product Description Stanford Microdevices’ SHF-0186 is a high performance GaAs Heterostructure FET housed in a low-cost surface-mount plastic package. HFET technology improves breakdown voltage while minimizing Schottky leakage current for higher power added efficiency and improved linearity. Output power at 1dB compression for the SHF-0186 is +28 dBm when biased for Class AB operation at 8V and 100mA. The +40 dBm third order intercept makes it ideal for high dynamic range, high intercept point requirements. It is well suited for use in both analog and digital wireless communication infrastructure and subscriber equipment including cellular PCS, CDPD, wireless data, and pagers. Gain vs. Frequency VDS=8V, IDQ=100mA GMax(dB) 20 Gmax S21 -10 0 2 4 6 8 10 Applications • Analog and Digital Wireless System • Cellular PCS, CDPD, Wireless Data, Pagers • AN-020 Contains detailed application circuits 12 Frequency (GHz) Symbol Product Features • Patented AlGaAs/GaAs Heterostructure FET • +28 dBm P1dB Typical • +40 dBm Output IP3 Typical • High Drain Efficiency: Up to 46% at Class AB • 17 dB Gain at 900 MHz (Application circuit) • 15 dB Gain at 1900 MHz (Application circuit) • Gmax Guaranteed at 12 GHz 30 0 DC-12 GHz, 0.5 Watt AlGaAs/GaAs HFET Technology 40 10 SHF-0186 Device Characteristics, T = 25ºC VDS = 8V, IDQ = 100 mA Units Min. Typ. 4.0 23.4 20.1 5.0 13.7 18.0 15.2 Maximum Available Gain f = 900 MHz, ZS=ZS*, ZL=ZL* f = 1960 MHz, ZS=ZS*, ZL=ZL* f = 12000 MHz, ZS=ZS*, ZL=ZL* dB S 21 Insertion Power Gain f = 900 MHz, ZS=ZL= 50 Ohms f = 1960 MHz, ZS=ZL= 50 Ohms dB S 21 Gain f = 900 MHz, ZS=ZSOPT, ZL=ZLOPT f = 1960 MHz, ZS=ZSOPT, ZL=ZLOPT dB 17.9 14.6 P 1dB Output 1 dB compression point f = 900 MHz, ZS=ZSOPT, ZL=ZLOPT f = 1960 MHz, ZS=ZSOPT, ZL=ZLOPT dB m 28.0 28.8 OIP3 Output Third Order Intercept Point f = 900 MHz, ZS=ZSOPT, ZL=ZLOPT f = 1960 MHz, ZS=ZSOPT, ZL=ZLOPT dB m 40.9 40.4 IDSS Saturated Drain Current VDS = 3V, VGS = 0V mA 300 gm Transconductance VDS = 3V, VGS = 0V mS 175 VP Pinch-Off Voltage VDS = 3V, IDQ = 1mA V GMAX -2.7 Max. -1.9 -1.0 V bgs Gate-to-Source Breakdown Voltage, Igs = 1.2mA V -20 -17 V bgd Gate-to-Drain Breakdown Voltage, Igd = 1.2mA V -20 -17 Rth Thermal Resistance (junction to lead) ºC/W 66 The information provided herein is believed to be reliable at press time. Stanford Microdevices assumes no responsibility for inaccuracies or omissions. Stanford Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Stanford Microdevices does not authorize or warrant any Stanford Microdevices product for use in life-support devices and/or systems. Copyright 2000 Stanford Microdevices, Inc. All worldwide rights reserved. 522 Almanor Ave., Sunnyvale, CA 94085 Phone: (800) SMI-MMIC 1 http://www.stanfordmicro.com EDS-101574 Rev A Preliminary SHF-0186 DC-12 GHz 0.5 Watt AlGaAs/GaAs HFET Absolute Maximum Ratings Operation of this device above any one of these parameters may cause permanent damage. Parameter Bias Conditions should also satisfy the following expression: IDSVDS (max) < (TJ - TL)/RTH Symbol Value Unit Drain-to-Source Voltage V DS +12 V Gate-to-Source Voltage VGS -5 to 0 V RF Input Power PIN 200 mW Operating Temperature TOP -45 to +85 C Storage Temperature Range Tstor -65 to +175 C TJ +175 C Operating Junction Temperature Typical Performance - Engineering Application Circuits (See AN-020) Freq (MHz ) VDS (V) IDQ (mA) P 1d B (dBm) OIP3* (dBm) Gain (dB) S11 (dB) S 22 (dB) NF (dB) ZSOPT ZLOPT Mag Ð Ang Mag Ð Ang 945 8 100 28.0 41.0 17.9 -19.4 -9.62 3.1 .45 Ð 40 .02 Ð 50 1960 8 100 28.8 39.5 14.6 -15.8 -5.31 2.5 .50 Ð 105 .16 Ð -168 2140 8 100 28.7 39.0 14.5 -12.3 -7.02 3.0 .50 Ð 120 .18 Ð 170 2450 8 100 28.5 39.5 14.0 -14.7 -5.28 2.9 .60 Ð 130 .08 Ð 130 * 15dBm per tone Data above represents typical performance of the application circuits noted in Application Note AN-020. Refer to the application note for additional RF data, PCB layouts, and BOMs for each application circuit. The application note also includes biasing instructions and other key issues to be considered. For the latest application notes please visit our site at www.stanfordmicro.com or call your local sales representative. D G S ZLOPT ZSOPT 522 Almanor Ave., Sunnyvale, CA 94085 Phone: (800) SMI-MMIC 2 http://www.stanfordmicro.com EDS-101574 Rev A Preliminary SHF-0186 DC-12 GHz 0.5 Watt AlGaAs/GaAs HFET De-embedded S-Parameters (ZS=ZL=50 Ohms, VDS=8V, IDQ=100mA, 25° C) Insertion Gain & Isolation 0 Gain (dB) S12 20 -20 Gmax 10 -30 S21 0 -40 -10 -50 0 2 4 6 8 10 20 Isolation (dB) -10 30 Insertion Gain vs Temperature 25 15 Gain (dB) 40 T = -40, 25, 85°C 10 5 0 -5 -10 0 12 2 4 6 8 Frequency (GHz) S11 vs Frequency Frequency (GHz) S22 vs Frequency 1.0 1.0 0.5 2.0 6 GHz 10 2.0 0.5 10 GHz 10 GHz 13 GHz 0.2 0.2 5.0 5.0 13 GHz 6 GHz 3 GHz 0.0 0.2 0.5 1.0 2.0 5.0 0.0 inf 0.2 0.5 1.0 2.0 5.0 inf 3 GHz 2 GHz 0.2 2 GHz 1 GHz 0.5 1 GHz 0.2 5.0 5.0 2.0 0.5 2.0 1.0 1.0 DC-IV Curves (VGS = -2 to 0V, 0.2V steps) 350 VGS = 0V 300 IDS (mA) 250 200 150 100 50 VGS = -2V 0 0 1 2 3 4 5 6 7 8 VDS (Volts) Note: S-parameters are de-embedded to the device leads. The data represents typical performace of the device. Measured s-parameter data files can be downloaded using a link found on the SHF-0186 device page from our web site at www.stanfordmicro.com. 522 Almanor Ave., Sunnyvale, CA 94085 Phone: (800) SMI-MMIC 3 http://www.stanfordmicro.com EDS-101574 Rev A Preliminary SHF-0186 DC-12 GHz 0.5 Watt AlGaAs/GaAs HFET Part Number Ordering Information Caution: ESD sensitive Appropriate precautions in handling, packaging and testing devices must be observed. Pin # Function 1 Gate 2 GND & Source 3 Drain 4 GND & Source Part Number Reel Siz e Devices/Reel SHF-0186 7" 1000 Description Gate pin. Connection to ground. Use via holes to reduce lead inductance. Place vias as close to ground leads as possible. Part Symbolization The part will be symbolized with an “H1” designator on the top surface of the package. Drain pin. Same as Pin 2 Package Dimensions H1 PCB Pad Layout H1 522 Almanor Ave., Sunnyvale, CA 94085 Phone: (800) SMI-MMIC 4 http://www.stanfordmicro.com EDS-101574 Rev A