Integrated Circuit Systems, Inc. ICS9250-22 Frequency Generator for P IV™ Pin Configuration GND MULTSEL0/REF MULTSEL1/REF VDDREF X1 X2 GNDREF PCICLK0 PCICLK1 VDDPCI PCICLK2 PCICLK3 GNDPCI PCICLK4 PCICLK5 VDDPCI PCICLK6 PCICLK7 GNDPCI PCICLK8 PCICLK9 VDDPCI SEL100/133 GND48 FS0/48MHz FS1/48MHz VDD48 PD# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 ICS9250-22 Recommended Application: P IV Chipset Support Output Features: • 4 Differential CPU Clock Pairs @ 3.3V • 2 - 3V MREF clocks for memory reference seeds, (separate single ended but 180 degrees out of phase) • 4 - 66MHz reference output • 10 - 3V 33MHz PCI clocks • 2 - 48MHz clocks • 2 - 14.318 reference output Features: • Support power management: Power Down Mode • Supports Spread Spectrum modulation: 0 to -0.5% down spread. • Uses external 14.318MHz crystal • Select logic for Differential Swing Control, Test mode, Tristate, Power down, Spread Spectrum, limited frequency select, selective clock enable. • External resistor for current reference • FS pins for frequency select Key Specifications: • 3V66 Output jitter <300ps • CPU Output Jitter <200ps • MREF Output jitter <250ps 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 VDDMREF 3VMREF 3VMREF_B GNDMREF SPREAD# CPUCLKST3 CPUCLKSC3 VDDCPU CPUCLKST2 CPUCLKSC2 GNDCPU CPUCLKST1 CPUCLKSC1 VDDCPU CPUCLKST0 CPUCLKSC0 GNDCPU I REF VDDA GNDA VDD3V66 3V66-3 3V66-2 GND3V66 GND3V66 3V66-1 3V66-0 VDD3V66 56-Pin 300mil SSOP & TSSOP Functionality SEL133/ 100 FS0 FS1 0 0 0 Active 100MHz 0 0 1 (Reserved) Block Diagram Function 0 1 0 (Reserved) 0 1 1 Tristate all outputs 1 0 0 Active 133MHz 1 0 1 (Reserved) 1 1 0 (Reserved) 1 1 1 Test Mode PLL2 X1 X2 2 XTAL OSC PLL1 Spread Spectrum 2 CPU DIVDER 4 4 3VMREF DIVDER Power Groups VDDREF, GNDREF= REF, X1, X2 VDDPCI, GNDPCI = PCICLK VDD48, GND48 = 48MHz, PLL2 VDD3V66, GND3V66=3V66 VDDCPU, GNDCPU = CPUCLK VDDMREF, GNDMREF=3VMREF, 3VMREF_B VDDA=VDD (core supply voltage 3.3V) GNDA=Ground for core supply 9250-22 Rev B 12/08/00 Third party brands and names are the property of their respective owners. PD# SPREAD# MULTSEL (1:0) SEL100/133 FS(1:0) REF CPUCLKST (3:0) CPUCLKSC (3:0) 3VMREF 3VMREF_B Control Logic 48MHz PCI DIVDER 10 PCICLK (9:0) Config. Reg. 3V66 DIVDER 4 3V66 (3:0) ICS reserves the right to make changes in the device data identified in this publication without further notice. ICS advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate. ICS9250-22 General Description The ICS9250-22 is a single chip clock solution. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9250-22 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. Pin Configuration PIN NUMBER PIN NAME TYPE 1, 7, 13, 19, 24, 32, 33, 37, 40, 46, 53 GND PWR 3, 2 REF/MULTSEL (1:0) IN 4, 10, 16, 22, 27, 29, 36, 38, 43, 49, 56 VDD PWR 5 X1 X2 Crystal Input 6 X2 21, 20, 18, 17, 15, 14, 12, 11, 9, 8 PCICLK (9:0) OUT 23 SEL100/133 IN CPU Frequency Select. Low=100MHz, High=133MHz FS (1:0) IN Frequency select pins 48MHz OUT 48MHz clock output 26, 25 DESCRIPTION Ground pins for 3.3V supply MULTSEL0 and MULTSEL1 inputs are sensed on power-up and then internally latched prior to the pin being used for output on 3V 14.318MHz clocks. 3.3V power supply 14.318MHz Crystal input X1 Crystal Output 14.318MHz Crystal output PCI clock outputs 28 PD# IN 35, 34, 31, 30 3V66 (3:0) OUT 66MHz reference clocks Invokes power-down mode. Active Low. 39 I REF OUT This pin establishes the reference current for the CPUCLK pairs. This pin takes a fixed precision resistor tied to ground in order to establish the appropriate current. 51, 48, 45, 42 CPUCLKST (3:0) OUT "True" clocks of differential pair CPU outputs. These are switched current outputs and external resistors are required for voltage bias. 50, 47, 44, 41 CPUCLKSC (3:0) OUT "Complementory" clocks of differential pair CPU outputs. These are switched current outputs and external resistors are required for voltage bias. 52 SPREAD# IN 54 3VMREF_B OUT 3V reference to memory clock driver (out of phase with 3Vmref) 55 3VMREF OUT 3V reference to memory clock driver Invokes Spread Spectrum functionality on the Differential host clocks, MRef/MRef_b clocks, 66MHz clocks, and 33MHz PCI clocks. Active Low Third party brands and names are the property of their respective owners. 2 ICS9250-22 Truth Table SEL 133/100 FS0 FS1 CPU MRef 3V66 PCI 48MHz REF 0 0 0 100MHz 50MHz 66MHz 33MHz 48MHz 14.318MHz 0 0 1 N/A N/A N/A N/A N/A N/A 0 1 0 N/A N/A N/A N/A N/A N/A 0 1 1 Tristate Tristate Tristate Tristate Tristate Tristate 1 0 0 133MHz 66MHz 66MHz 33MHz 48MHz 14.318MHz 1 0 1 N/A N/A N/A N/A N/A N/A 1 1 0 N/A N/A N/A N/A N/A N/A 1 1 1 TCLK/2 TCLK/4 TCLK TCLK/6 TCLK Group Offset Limits Group Offset CPU to 3V66 No Requirement Measurement Loads (lumped) Measure Points 30pF 1.5V CPU to PCI 3V66 to PCI 1.5 - 3.5ns 3V66 leads Third party brands and names are the property of their respective owners. 3 ICS9250-22 CPUCLK Buffer Configuration Conditions Iout Vdd = nominal (3.30V) Iout Vdd = 3.30 ± 5% Configuration All combinations of M0, M1 and Rr shown in table below All combinations of M0, M1 and Rr shown in table below Load Min Max Nominal test load for given configuration -7% I nominal +7% I nominal Nominal test load for given configuration -12% I nominal +12% I nominal CPUCLK Swing Select Functions MULTSEL0 MULTSEL1 Board Target Trace/Term Z 0 0 60 ohms 0 0 50 ohms 0 1 60 ohms 0 1 50 ohms 1 0 60 ohms 1 0 50 ohms 1 1 60 ohms 1 1 50 ohms 0 0 30 (DC equiv) 0 0 25 (DC equiv) 0 1 30 (DC equiv) 0 1 25 (DC equiv) 1 0 30 (DC equiv) 1 0 25 (DC equiv) 1 1 30 (DC equiv) 1 1 25 (DC equiv) Reference R, Iref= Vdd/(3*Rr) Rr = 475 1% Iref = 2.32mA Rr = 475 1% Iref = 2.32mA Rr = 475 1% Iref = 2.32mA Rr = 475 1% Iref = 2.32mA Rr = 475 1% Iref = 2.32mA Rr = 475 1% Iref = 2.32mA Rr = 475 1% Iref = 2.32mA Rr = 475 1% Iref = 2.32mA Rr = 221 1% Iref = 5mA Rr = 221 1% Iref = 5mA Rr = 221 1% Iref = 5mA Rr = 221 1% Iref = 5mA Rr = 221 1% Iref = 5mA Rr = 221 1% Iref = 5mA Rr = 221 1% Iref = 5mA Rr = 221 1% Iref = 5mA Third party brands and names are the property of their respective owners. 4 Output Current Voh @ Z, Iref=2.32mA Ioh = 5*Iref 0.71V @ 60 Ioh = 5*Iref 0.59V @ 50 Ioh = 6*Iref 0.85V /2 60 Ioh = 6*Iref 0.71V @ 50 Ioh = 4*Iref 0.56V @ 60 Ioh = 4*Iref 0.47V @ 50 Ioh = 7*Iref 0.99V @ 60 Ioh = 7*Iref 0.82V @ 50 Ioh = 5*Iref 0.75V @ 30 Ioh = 5*Iref 0.62V @ 20 Ioh = 6*Iref 0.90V @ 30 Ioh = 6*Iref 0.75V @ 20 Ioh = 4*Iref 0.60 @ 20 Ioh = 4*Iref 0.5V @ 20 Ioh = 7*Iref 1.05V @ 30 Ioh = 7*Iref 0.84V @ 20 ICS9250-22 Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ambient Operating Temperature . . . . . . . . . . . . . Case Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . 5.5 V GND –0.5 V to VDD +0.5 V 0°C to +70°C 115°C –65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. Electrical Characteristics - Input/Supply/Common Output Parameters TA = 0 - 70C; Supply Voltage VDD = 3.3 V +/-5% PARAMETER SYMBOL CONDITIONS Input High Voltage VIH Input Low Voltage VIL Input High Current IIH VIN = VDD VIN = 0 V; Inputs with no pull-up resistors IIL1 Input Low Current VIN = 0 V; Inputs with pull-up resistors IIL2 Operating Supply IDD3.3OP CL = 0 pF; Select @ 100 MHz Current CL = 0 pF; Input address to VDD or GND Powerdown Current IDD3.3PD Input Frequency Pin Inductance Input Capacitance1 1 Transition time 1 Settling time Clk Stabilization1 Delay1 1 Fi Lpin CIN COUT CINX VDD = 3.3 V Ttrans MIN 2 VSS-0.3 -5 -5 -200 TYP MAX VDD+0.3 0.8 5 130 35 250 60 14.318 UNITS V V µA µA mA mA 7 5 6 45 MHz nH pF pF pF To 1st crossing of target frequency 3 ms Ts From 1st crossing to 1% target frequency 3 ms TSTAB tPZH,tPZL tPHZ,tPLZ From VDD = 3.3 V to 1% target frequency Output enable delay (all outputs) Output disable delay (all outputs) 3 10 10 ms ns ns Logic Inputs Output pin capacitance X1 & X2 pins 27 Guaranteed by design, not 100% tested in production. Third party brands and names are the property of their respective owners. 5 1 1 ICS9250-22 Electrical Characteristics - CPU TA = 0 - 70C; VDD=3.3V +/-5%; CL = 10-20 pF (unless otherwise specified) PARAMETER SYMBOL CONDITIONS Output Impedance VO = VDD*(0.5) IOH = -1 mA IOL = 1 mA TYP MAX UNITS 714 Ω 714 RDSN2B VOH2B VOL2B IOH2B2 V OH@MIN = 1.0 V, V OH@MAX = 2.375 V -27 -27 Ω V V mA Output Low Current IOL2B2 30 mA Fall Time Duty Cycle 2 VO = VDD*(0.5) 1 MIN Output Impedance Output High Voltage Output Low Voltage Output High Current Rise Time 1 RDSP2B 1 tr2B 2 0.4 VOL @MIN = 1.2 V, VOL @MAX = 0.3 V 27 1 VOL = 20%, VOH = 80% 175 500 700 ps 1 VOH = 80%, VOL = 20% 175 500 700 1 VT = 50% 45 51 55 ps % 1 VT = 50% 110 150 ps VT = 50% 110 200 ps tf2B dt2B Skew tsk2B Jitter tjcyc-cyc1 Guaranteed by design, not 100% tested in production. IOWT can be varied and is selectable thru the MULTSEL pin. Electrical Characteristics - PCI TA = 0 - 70C; VDD=3.3V +/-5%; CL = 10-30 pF (unless otherwise specified) PARAMETER SYMBOL CONDITIONS Output Frequency FO1 Output Impedance 1 TYP VO = VDD*(0.5) 12 33 IOH = -1 mA 2.4 Output High Voltage VOH Output Low Voltage Output High Current IOL = 1 mA Skew VOL1 1 IOH IOL1 tr11 tf11 dt11 tsk11 Jitter tjcyc-cyc1 Output Low Current Rise Time Fall Time Duty Cycle 1 RDSP11 MIN MAX UNITS MHz 55 Ω V V OH@MIN = 1.0 V, V OH@MAX = 3.135 V -33 0.55 -33 V mA VOL @MIN = 1.95 V, VOL @MAX = 0.4 V 30 38 mA VOL = 0.4 V, VOH = 2.4 V 0.5 1.4 2 ns VOH = 2.4 V, VOL = 0.4 V 0.5 1.4 2 VT = 1.5 V 45 51 55 ns % VT = 1.5 V 270 500 ps VT = 1.5 V 115 500 ps Guaranteed by design, not 100% tested in production. Third party brands and names are the property of their respective owners. 6 ICS9250-22 Electrical Characteristics - MREF/MREF_B TA = 0 - 70C; VDD=3.3V +/-5%; CL = 10-20 pF (unless otherwise specified) PARAMETER SYMBOL CONDITIONS Output Frequency FO1 Output Impedance 1 TYP VO = VDD*(0.5) 12 33 IOH = -1 mA 2.4 Output High Voltage VOH Output Low Voltage Output High Current IOL = 1 mA Skew VOL1 1 IOH IOL1 tr11 tf11 dt11 tsk11 Jitter tjcyc-cyc1 Output Low Current Rise Time Fall Time Duty Cycle 1 RDSP11 MIN MAX UNITS MHz 55 Ω V V OH@MIN = 1.0 V, V OH@MAX = 3.135 V -33 0.55 -33 V mA VOL @MIN = 1.95 V, VOL @MAX = 0.4 V 30 38 mA VOL = 0.4 V, VOH = 2.4 V 0.4 1.4 1.6 ns VOH = 2.4 V, VOL = 0.4 V 0.4 1.4 1.6 VT = 1.5 V 45 51 55 ns % VT = 1.5 V 80 100 ps VT = 1.5 V 105 250 ps Guaranteed by design, not 100% tested in production. Electrical Characteristics - REF TA = 0 - 70C; VDD=3.3V +/-5%; CL = 10-20 pF (unless otherwise specified) PARAMETER SYMBOL CONDITIONS Output Frequency FO1 Output Impedance 1 TYP VO = VDD*(0.5) 20 48 IOH = -1 mA 2.4 Output High Voltage VOH Output Low Voltage Output High Current IOL = 1 mA Skew VOL1 1 IOH 1 IOL tr11 tf11 dt11 tsk11 Jitter tjcyc-cyc1 VT = 1.5 V Output Low Current Rise Time Fall Time Duty Cycle 1 RDSP11 MIN MAX UNITS MHz 60 Ω V 0.4 V OH@MIN = 1.0 V, V OH@MAX = 3.135 V -29 -23 V mA VOL @MIN = 1.95 V, VOL @MAX = 0.4 V 29 27 mA VOL = 0.4 V, VOH = 2.4 V 1 2 4 ns VOH = 2.4 V, VOL = 0.4 V 1 2 4 VT = 1.5 V 45 50 55 ns % N/A ps 205 1000 ps VT = 1.5 V Guaranteed by design, not 100% tested in production. Third party brands and names are the property of their respective owners. 7 ICS9250-22 Electrical Characteristics - 3V66 TA = 0 - 70C; VDD=3.3V +/-5%; CL = 10-30 pF (unless otherwise specified) PARAMETER SYMBOL CONDITIONS Output Frequency FO1 Output Impedance 1 TYP VO = VDD*(0.5) 12 33 IOH = -1 mA 2.4 MAX UNITS MHz 55 Ω V Output High Voltage VOH Output Low Voltage Output High Current IOL = 1 mA Skew VOL1 1 IOH 1 IOL tr11 tf11 dt11 tsk11 VT = 1.5 V 85 250 ps Jitter tjcyc-cyc1 VT = 1.5 V 80 300 ps Output Low Current Rise Time Fall Time Duty Cycle 1 RDSP11 MIN 0.55 V OH@MIN = 1.0 V, V OH@MAX = 3.135 V -33 -33 V mA VOL @MIN = 1.95 V, VOL @MAX = 0.4 V 30 38 mA VOL = 0.4 V, VOH = 2.4 V 0.5 1.3 2 ns VOH = 2.4 V, VOL = 0.4 V 0.5 1.3 2 VT = 1.5 V 45 51 55 ns % Guaranteed by design, not 100% tested in production. Electrical Characteristics - 48MHz TA = 0 - 70C; VDD=3.3V +/-5%; CL = 10-20 pF (unless otherwise specified) PARAMETER SYMBOL CONDITIONS Output Frequency FO1 Output Impedance 1 TYP VO = VDD*(0.5) 20 48 IOH = -1 mA 2.4 Output High Voltage VOH Output Low Voltage Output High Current IOL = 1 mA Skew VOL1 1 IOH IOL1 tr11 tf11 dt11 tsk11 Jitter tjcyc-cyc1 VT = 1.5 V Output Low Current Rise Time Fall Time Duty Cycle 1 RDSP11 MIN MAX UNITS MHz 60 Ω V 0.4 V OH@MIN = 1.0 V, V OH@MAX = 3.135 V -29 -23 V mA VOL @MIN = 1.95 V, VOL @MAX = 0.4 V 29 27 mA VOL = 0.4 V, VOH = 2.4 V 1 4 ns 2 VOH = 2.4 V, VOL = 0.4 V 1 2 4 VT = 1.5 V 45 54 55 ns % N/A ps 350 ps VT = 1.5 V 120 Guaranteed by design, not 100% tested in production. Third party brands and names are the property of their respective owners. 8 ICS9250-22 PD# Timing Diagram The power down selection is used to put the part into a very low power state without turning off the power to the part. PD# is an asynchronous active low input. This signal needs to be synchronized internal to the device prior to powering down the clock synthesizer. Internal clocks are not running after the device is put in power down. When PD# is active low all clocks need to be driven to a low value and held prior to turning off the VCOs and crystal. The power up latency needs to be less than 3 mS. The power down latency should be as short as possible but conforming to the sequence requirements shown below. PD# MREF MREF_BAR CPUCLKT CPUCLKC VCO Crystal Notes: 1. As shown, the outputs Stop Low on the next falling edge after PD# goes low. 2. PD# is an asynchronous input and metastable conditions may exist. This signal is synchronized inside this part. 3. The shaded sections on the VCO and the Crystal signals indicate an active clock. Third party brands and names are the property of their respective owners. 9 ICS9250-22 SYMBOL In Millimeters In Inches COMMON DIMENSIONS COMMON DIMENSIONS MIN MAX MIN MAX A 2.413 2.794 .095 .110 A1 0.203 0.406 .008 .016 b 0.203 0.343 .008 .0135 c D 0.127 0.254 SEE VARIATIONS .005 .010 SEE VARIATIONS E 10.033 10.668 .395 .420 E1 7.391 7.595 .291 .299 e 0.635 BASIC h 0.381 L 0.508 1.016 SEE VARIATIONS N α 0.635 0° 0.025 BASIC .015 .025 .020 .040 SEE VARIATIONS 8° 0° 8° MIN MAX MIN MAX 18.288 18.542 .720 .730 JEDEC MO-118 DOC# 10-0034 6/1/00 REV B VARIATIONS D mm. N 56 D (inch) Ordering Information ICS9250yF-22-T Example: ICS XXXX y F - PPP - T Designation for tape and reel packaging Pattern Number (2 or 3 digit number for parts with ROM code patterns) Package Type F=SSOP Revision Designator (will not correlate with datasheet revision) Device Type (consists of 3 or 4 digit numbers) Prefix ICS, AV = Standard Device Third party brands and names are the property of their respective owners. 10 ICS9250-22 SYMBOL In Millimeters In Inches COMMON DIMENSIONS COMMON DIMENSIONS MIN MAX MIN MAX A - 1.20 - .047 A1 0.05 0.15 .002 .006 A2 0.80 1.05 .032 .041 b 0.17 0.27 .007 .011 c 0.09 0.20 SEE VARIATIONS D .0035 .008 SEE VARIATIONS 8.10 BASIC E E1 6.00 e 0.319 6.20 .236 0.50 BASIC L 0.45 0.75 SEE VARIATIONS N .244 0.020 BASIC .018 .30 SEE VARIATIONS α 0° 8° 0° 8° aaa - 0.10 - .004 MIN MAX MIN 13.90 14.10 .547 .555 MO-153 JEDEC Doc.# 10-0039 7/6/00 Rev B VARIATIONS D mm. N 6.10 mm. Body, 0.50 mm. pitch TSSOP (0.020 mil) (240 mil) 56 D (inch) MAX Ordering Information ICS9250yG-22-T Example: ICS XXXX y G - PPP - T Designation for tape and reel packaging Pattern Number (2 or 3 digit number for parts with ROM code patterns) Package Type G=TSSOP Revision Designator (will not correlate with datasheet revision) Device Type (consists of 3 or 4 digit numbers) Prefix ICS, AV = Standard Device Third party brands and names are the property of their respective owners. 11 ICS reserves the right to make changes in the device data identified in this publication without further notice. ICS advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate.