DATA SHEET COMPOUND FIELD EFFECT POWER TRANSISTOR µPA1552B N-CHANNEL POWER MOS FET ARRAY SWITCHING USE DESCRIPTION PACKAGE DIMENSIONS The µPA1552B is N-channel Power MOS FET Array in millimeters that built in 4 circuits designed, for solenoid, motor and 4.0 26.8 MAX. 10 lamp driver. 2.5 • 4 V driving is possible 10 MIN. FEATURES • Large Current and Low On-state Resistance ID(DC) = ±5.0 A 1.4 0.5±0.1 2.54 RDS(on)1 ≤ 0.18 Ω MAX. (VGS = 10 V, ID = 3 A) 1.4 0.6±0.1 RDS(on)2 ≤ 0.24 Ω MAX. (VGS = 4 V, ID = 3 A) • Low Input Capacitance Ciss = 200 pF TYP. 1 2 3 4 5 6 7 8 9 10 ORDERING INFORMATION Type Number µPA1552BH CONNECTION DIAGRAM 3 Package 5 7 9 10 Pin SIP 2 ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C) Drain to Source Voltage VDSS Note 1 60 V Gate to Source Voltage VGSS Note 2 ±20 V Drain Current (DC) ID(DC) ±5.0 A/unit Drain Current (pulse) ID(pulse) Note 3 ±20 A/unit Total Power Dissipation PT1 Note 4 28 W Total Power Dissipation PT2 Note 5 3.5 W Channel Temperature TCH 150 ˚C Storage Temperature Tstg –55 to +150 ˚C Single Avalanche Current IAS Note 6 5.0 A Single Avalanche Energy EAS Note 6 2.5 mJ Notes 1. VGS = 0 3. PW ≤ 10 µs, Duty Cycle ≤ 1 % 5. 4 Circuits, TA = 25 ˚C 4 6 8 1 10 ELECTRODE CONNECTION 2, 4, 6, 8 : Gate 3, 5, 7, 9 : Drain 1, 10 : Source 2. VDS = 0 4. 4 Circuits, TC = 25 ˚C 6. Starting TCH = 25 ˚C, V DD = 30 V, VGS = 20 V → 0, RG = 25 Ω, L = 100 µH The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device is actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. Document No. G10599EJ2V0DS00 (2nd edition) Date Published December 1995 P Printed in Japan © 1995 µPA1552B ELECTRICAL CHARACTERISTICS (TA = 25 ˚C) CHARACTERISTIC SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Drain Leakage Current IDSS VDS = 60 V, VGS = 0 10 µA Gate Leakage Current IGSS VGS = ±20 V, VDS = 0 ±10 µA Gate Cutoff Voltage VGS(off) VDS = 10 V, ID = 1.0 mA 1.0 2.0 V Forward Transfer Admittance | Yfs | VDS = 10 V, ID = 3.0 A 2.4 Drain to Source On-State RDS(on)1 VGS = 10 V, ID = 3.0 A 0.09 0.18 Ω Resistance RDS(on)2 VGS = 4.0 V, ID = 3.0 A 0.12 0.24 Ω Input Capacitance Ciss VDS = 10 V, VGS = 0, f = 1.0 MHz 200 pF Output Capacitance Coss 150 pF Reverse Transfer Capacitance Crss 55 pF 20 ns 100 ns Turn-on Delay Time S ·= 30 V, · td(on) ID = 3.0 A, VGS = 10 V, VDD Rise Time tr RL = 10 Ω Turn-off Delay Time td(off) 670 ns Fall Time tf 310 ns Total Gate Charge QG 13 nC Gate to Source Charge QGS 2 nC Gate to Drain Charge QGD 4.7 nC Body Diode Forward Voltage VF(S-D) IF = 5.0 A, VGS = 0 1.0 V Reverse Recovery Time trr IF = 5.0 A, VGS = 0, di/dt = 50 A/µs 280 ns Reverse Recovery Charge Qrr 820 nC Test Circuit 1 Avalanche Capability VGS = 10 V, ID = 5.0 A, VDD = 48 V Test Circuit 2 Switching Time D.U.T. RG = 25 Ω L D.U.T. VGS RL PG VGS = 20 V → 0 50 Ω VGS VDD RG RG = 10 Ω PG. 0 Wave Form VGS (on) 10 % VDD 90 % 90 % ID 90 % ID BVDSS IAS Starting TCH PG. 2 50 Ω td (on) t VDD Gate Charge D.U.T. IG = 2 mA 0 10 % tr td (off) tf VDS ID Test Circuit 3 I D Wave Form VGS 0 10 % RL VDD t = 1 µs Duty Cycle ≤ 1 % ton toff µPA1552B CHARACTERISTICS (TA = 25 ˚C) TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE ,,,, ,,, PT - Total Power Dissipation - W Lead Print Circuit Boad 5 4 30 Under same dissipation in each circuit NEC µ PA1552BH 4 Circuits operation 3 Circuits operation 2 Circuits operation 3 1 Circuit operation 2 1 0 50 100 PT - Total Power Dissipation - W 6 TOTAL POWER DISSIPATION vs. CASE TEMPERATURE 150 Under same dissipation in each circuit 4 Circuits operation 3 Circuits operation 20 2 Circuits operation 1 Circuit operation 10 TC is grease Temperature on back surface 0 50 100 150 TA - Ambient Temperature - ˚C TC - Case Temperature - ˚C FORWARD BIAS SAFE OPERATING AREA DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA ) 0V 10 S ted i im )L G (V ID(pulse) PW =1 ID(DC) R = 10 50 on ( DS dT - Percentage of Rated Power - % ID - Drain Current - A 100 10 0 1 m s m m s s m s DC 1 TC = 25 ˚C Single Pulse 0.1 0.1 1 10 80 60 40 20 0 100 20 40 60 80 100 120 140 VDS - Drain to Source Voltage - V TC - Case Temperature - ˚C FORWARD TRANSFER CHARACTERISTICS DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE 100 20 Pulsed VGS = 10 V 10 TA = 125 ˚C 75 ˚C 25 ˚C -25 ˚C 1.0 160 Pulsed VGS = 20 V 10 V ID - Drain Current - A ID - Drain Current - A 100 VGS = 4 V 10 0.1 0 2 4 6 VGS - Gate to Source Voltage - V 0 1 2 3 4 VDS - Drain to Source Voltage - V 3 µPA1552B TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - ˚C/W 1 000 Single Pulse, For each Circuit Rth(CH-A) 4Circuits 3Circuits 2Circuits 1Circuit 100 Rth(CH-C) 10 1.0 0.1 100 µ 1m 10 m 100 m 1 10 100 1 000 100 10 VDS = 10 V Pulsed TA = -25 ˚C 25 ˚C 75 ˚C 125 ˚C 1.0 0.1 0.1 1.0 10 RDS(on) - Drain to Source On-State Resistance - mΩ ID - Drain Current - A 4 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 300 Pulsed Pulsed 300 VGS = 4 V 200 100 VGS = 10 V 0 1.0 ID - Drain Current - A 10 ID = 5 A 3A 1A 200 100 0 10 20 VGS - Gate to Source Voltage - V DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT GATE TO SOURCE CUTOFF VOLTAGE vs. CHANNEL TEMPERATURE VGS(off) - Gate to Source Cutoff Voltage - V | yfs | - Forward Transfer Admittance - S FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT RDS(on) - Drain to Source On-State Resistance - mΩ PW - Pulse Width - sec VDS = 10 V ID = 1 mA 2 1 0 –50 0 50 100 TCH - Channel Temperature - ˚C 150 DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE SOURCE TO DRAIN DIODE FORWARD VOLTAGE Pulsed 200 ISD - Diode Forward Current - A VGS = 4 V 150 VGS = 10 V 100 50 0 - 50 10 VGS = 10 V 1.0 VGS = 0 0.1 ID = 3 A 0 100 50 0.01 150 0 VSD - Source to Drain Voltage - V CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE SWITCHING CHARACTERISTICS VGS = 0 f = 1 MHz Ciss 100 Coss Crss 10 0.1 1 10 1 000 td(on), tr, td(off), tf - Switching Time - ns Ciss, Coss, Crss - Capacitance - pF 1 000 100 td(off) tf 100 tr . VDD = . 30 V VGS = 10 V RG = 10 Ω td(on) 10 0.1 1.0 VDS - Drain to Source Voltage - V di/dt = 50 A/ µ s VGS = 0 12 60 VDS - Drain to Source Voltage - V trr - Reverse Recovery time - ns 100 DYNAMIC INPUT/OUTPUT CHARACTERISTICS 100 10 0.1 10 ID - Drain Current - A REVERSE RECOVERY TIME vs. DRAIN CURRENT 1 000 1.5 1.0 0.5 TCH - Channel Temperature -˚C VGS ID = 5 A 10 VDD = 12 V 30 V 48 V 40 VGS - Gate to Source Voltage - V RDS(on) - Drain to Source On-State Resistance - mΩ µPA1552B 8 6 4 20 2 VDS 0 1.0 10 ID - Drain Current - A 100 0 2 4 6 8 10 12 14 16 QG - Gate Charge - nC 5 µPA1552B SINGLE AVALANCHE ENERGY vs. INDUCTIVE LOAD SINGLE AVALANCHE ENERGY DERATING FACTOR 100 VDD = 30 V RG = 25 Ω VGS = 20 V → 0 IAS <= 5.0 A IAS = 5 A Energy Derating Factor - % IAS - Single Avalanche Energy - mJ 10 EA S= 2.5 mJ 1.0 VDD = 30 V VGS = 20 V → 0 RG = 25Ω Starting TCH = 25 ˚C 0.1 10 100µ 1m 10 m L - Inductive Load - H 80 60 40 20 0 25 50 75 100 125 150 Starting TCH - Starting Channel Temperature - ˚C REFERENCE Document Name 6 Document No. NEC semiconductor device reliability/quality control system TEI-1202 Quality grade on NEC semiconductor devices IEI-1209 Semiconductor device mounting technology manual IEI-1207 Semiconductor device package manual IEI-1213 Guide to quality assurance for semiconductor devices MEI-1202 Semiconductor selection guide MF-1134 Power MOS FET features and application switching power supply TEA-1034 Application circuits using Power MOS FET TEA-1035 Safe operating area of Power MOS FET TEA-1037 µPA1552B [MEMO] 7 µPA1552B No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customer must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: “Standard“, “Special“, and “Specific“. The Specific quality grade applies only to devices developed based on a customer designated “quality assurance program“ for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices in “Standard“ unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact NEC Sales Representative in advance. Anti-radioactive design is not implemented in this product. M4 94.11 2