PRELIMINARY DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT µPC8139GR-7JH Single Chip Transceiver Silicon MMIC for PHS DESCRIPTION The µPC8139GR-7JH is a silicon microwave monolithic IC (SiMMIC) developed as a transceiver for Personal Handyphone System (PHS). This IC is a highly integrated single chip, suitable for PHS, including a quadrature modulator, up converter, and AGC circuit for adjusting the output level in the transmitter block, a 2nd down converter and RSSI circuit in the receiver block, and a transistor for 2nd VCO. This low power IC employs NEC’s proprietary bipolar process NESATTM IV (fT = 20 GHz) and also has a built-in power save function, which contributes to lowering power consumption of the RF block. This IC is packaged in a small, thin 30 pin plastic TSSOP (225 mil). FEATURES • Low voltage operation, low current consumption VCC = 2.7 to 4.0 V, ICC = 32.5 mA at transmitter, ICC = 4.8 mA at receiver, 3.2 mA/@VCC = 3 V at 2nd VCO block • LPF is installed to suppress leakage of transmitter’s local (L01) harmonics. Spurious within transmission band (LO1 × 7, 8): –55 dBc (MAX.) • On-chip AGC circuit for adjusting the output level: GCR = 20 dB (MIN.) /@fRFout = 1906.55 MHz • High-performance Output level: PRFout = –13 dBm (TYP.) /@fRFout = 1906.55 MHz, VI/Q = 500 mVP-P (Differential phase) Error vector magnitude: EVM = 1.0% rms (TYP.) Adjacent channel leak power: Padj = –68 dBc (TYP.) /@∆f = ±600 kHz RSSI output dynamic range: 83 dB • CR phase shifter is adopted. APPLICATION • Digital cordless telephone: PHS • PHS application equipment: PDA, PC card, etc. ORDERING INFORMATION Part Number µPC8139GR-7JH-E1 Remark Package 30-pin plastic TSSOP (225 mil) Supplying Form Embossed tape 16 mm-wide. Pin 1 is in pull-out direction. 2.5 kp/reel To order evaluation samples, contact your local NEC sales office. (Part Number for sample order: µPC8139GR-7JH) Caution This product is an electrostatic sensitive device. The information in this document is subject to change without notice. Document No. P13117EJ1V0DS00 (1st edition) Date Published December 1998 N CP(K) Printed in Japan © 1998 µPC8139GR-7JH SYSTEM APPLICATION EXAMPLE [PHS] 1895.15 to 1917.95 MHz or (1906.55±11.4 MHz) ATT LNA BPF µ PC8112 243.95 MHz or 248.45 MHz 1st MIX SAW 10.8 MHz 2nd MIX BPF To DEMOD. MAIN ANT RSSI 1651.2 to 1674.0 MHz or 1646.7 to 1669.5 MHz SW 1st LO 2nd LO SW 1662.0 to 1684.8 MHz or 1635.9 to 1658.7 MHz PLL1 PLL2 2SC5006 RSSI OUT 233.15 MHz or 259.25 MHz I AGC 0˚ φ (CR) PA BPF LPF 90˚ Q µ PC8139GR-7JH QUADRATURE MODULATOR IC SERIES PRODUCT LIST Part Number Function µPC8101GR 150-MHz quadrature modulator µPC8104GR RF up converter + IF quadrature modulator µPC8105GR 400-MHz quadrature modulator ICC (mA) fLO1in (MHz) fMODout (MHz) 15 /@2.7 V 100 to 300 50 to 150 28 /@3.0 V 100 to 400 Application Field Phase Shifter Type External F/F 900 to 1900 Multiplier + F/F Various digital communications Various digital communications 16 pin SSOP (225 mil) 20 pin SSOP (225 mil) 16 /@3.0 V 100 to 400 External Multiplier + F/F CT-2, etc. µPC8110GR 1-GHz direct quadrature modulator 24 /@3.0 V 800 to 1000 Direct modulation Multiplier + F/F PDC800 MHz, etc. µPC8125GR On-chip AGC function RF up converter + IF quadrature modulator 36 /@3.0 V 220 to 270 1800 to 2000 Multiplier + F/F PHS 35 /@3.0 V 915 to 960 Direct modulation Multiplier + F/F PDC800 MHz, etc. 800 to 1900 F/F GSM, DCS1800, etc. 800 to 1500 CR PDC800 M/1.5 G µPC8126GR µPC8126K µPC8129GR µPC8158K On-chip local PreMIX 1-GHz direct quadrature modulator LO × 2 frequency input type IF quadrature modulator + RF up converter 28 /@3.0V On-chip AGC function RF up converter + IF quadrature modulator 28 /@3.0 V 200 to 800 100 to 400 100 to 300 Package Up Converter fRFout (MHz) 20 pin SSOP (225 mil) 28 pin QFN 20 pin SSOP (225 mil) 28 pin QFN For an outline of the quadrature modulator IC series, see the application note “Usage of µPC8101, 8104, 8105, 8125, and 8129” (document number P13251E). 2 Preliminary Data Sheet µPC8139GR-7JH INTERNAL BLOCK DIAGRAM AND PIN CONNECTIONS (Top View) I 1 Ib 2 Up Con. 30 TX MIXout 29 VCC6 28 TX MIX-LOin 27 GND5 26 TX MIX-LOinb 25 VCC5 LPF IQ Mix. Q 3 Qb 4 VCC1 5 GND1 6 VCC2 7 24 VPS (TX) /VAGC VCOout 8 23 VPS (RX) GND2 9 22 2nd MIXin VCO-E 10 21 2nd MIXinb VCO-B 11 20 2nd MIXout VCO-C 12 19 VCC4 VCC3 13 18 GND3 IFout 14 17 IFin2 RSSIout 15 16 IFin1 Adder AGC 90˚ Phase shifter (CR) LO Buff. 2nd Mix 2nd VCO LO Buff. 2nd IF Amp RSSI Note Note Pin 21 was specified to function as the GND4 in the initial design sample, however in subsequent design samples and commercial products it functions as the 2nd MIXinb. Preliminary Data Sheet 3 µPC8139GR-7JH ABSOLUTE MAXIMUM RATINGS Parameter Symbol Condition Rating Unit Power supply voltage VCC Pins 5, 7, 12, 13, 19, 25, 29, 30 TA = +25°C 4.5 V Power save pin voltage VPS Pin 23, Pin 24, TA = +25°C 4.5 V TBD mW Note Power dissipation PD Operating ambient temperature TA –30 to +80 °C Storage temperature Tstg –55 to +150 °C Pin current of Pin 8 I8 pin 4 mA Pin current of Pin 10 I10 pin 4 mA Collector to base voltage in VCO VCBO Pin 12 → Pin 11 4.5 V Collector to emitter voltage in VCO VCEO Pin 12 → Pin 10 4.5 V Emitter to base voltage in VCO VEBO Pin 10 → Pin 11 3.0 V TA = +80°C Note When mounted on 50 × 50 × 1.6 mm double sided copper clad epoxy glass board RECOMMENDED OPERATING RANGE Parameter 4 Symbol Condition MIN. TYP. MAX. Unit 2.7 3.0 4.0 V 0 – VCC V Power supply voltage VCC Pins 5, 7, 12, 13, 19, 25, 29, 30 Power save pin voltage VPS Pin 23, Pin 24 Operating ambient temperature TA –30 +25 +80 °C TX up converter output frequency fTX • MIXout 1800 – 2000 MHz TX up converter LO input frequency fTX • MIX-LOin 1500 – 1800 MHz TX up converter input frequency fTX • MIXin 220 – 270 MHz IQ-MOD output frequency fMODout 2nd VCO oscillating frequency (IQ-MOD LO, 2nd MIX LO input frequency) f2ndVCO (fMOD • LOin, f2ndMIX-LOin) 2nd MIX input frequency f2ndMIXin 2nd MIX output frequency f2ndMIXout 8 10.8 12 MHz 2nd IF amplifier input frequency f2ndIFin 8 10.8 12 MHz 2nd IF amplifier output frequency f2ndIFout I/Q input frequency fI/Qin DC – 10 MHz TX up converter LO input level PTX • MIX-LOin –15 –10 –5 dBm 2nd MIX input level P2ndMIXin –90 – –10 dBm 2nd IF amplifier input level P2ndIFin 23 – 108 dBµ VEMF I/Q input amplitude VI/Qin – 500 600 mVP-P PTX • MIX-LOin = –10 dBm VI/Qin = 600 mVP-P (MAX.), Double phase Double phase input I/Q (DC) = Ib/Qb (DC) = VCC/2 Preliminary Data Sheet µPC8139GR-7JH ELECTRICAL SPECIFICATIONS (1) TA = +25°C, VCC = 3.0 V, unless otherwise specified, VPS-TX/VAGC = 3.0 V, VPS-RX = 3.0 V (high), I/Q (DC) = Ib/Qb (DC) = VCC/2 = 1.5 V, VI/Qin = 500 mVP-P (double phase input) , fI/Qin = 24 kHz, π/4DQPSK modulated wave input Transmission rate: 384 kbps, Filter roll-off rate : α = 0.5, MOD pattern: all zero, fMOD • LOin = 233.15 MHz, PMODLOin = –7 dBm, fTX • MIX-LOin = 1673.4 MHz, PTX • MIX-LOin = –10 dBm, fTX • MIXout = 1906.55 MHz + fI/Qin Parameter Symbol Condition MIN. TYP. MAX. Unit 33 40.5 49 mA Total characteristics Total circuit current (TX + RX + VCO) ICC (TOTAL) No signal input Transmitter block total characteristics (quadrature modulator + up converter + AGC circuit) Total circuit current (TX) ICC (TX-TOTAL) No signal input 27 32.5 39.5 mA Dark current at power save (TX) ICC (PS) TX-TOTAL VPS ≤ 0.5 V (Low), No signal input – 0.1 5 µA –17 –13 – dBm – –40 –30 dBc Transmitter block (quadrature modulator + up converter + AGC circuit) Total output level PTX • MIXout VAGC = 3.0 V Local carrier leak LOL fMODin • LOin + fTX • MIX-LOin Image rejection (side-band leak) ImR – –40 –30 dBc I/Q 3rd order inter-modulation distortion IM3 (I/Q) – –50 –30 dBc AGC circuit gain control range GCR VAGC = 3 V → 1 V 20 35 – dB Error vector magnitude (vector error) EVM MOD pattern: PN 9 – 1.0 5 %rms Adjacent channel leak power Padj ∆ f = ±600 kHz, MOD pattern: PN 9 – –68 –60 dBc Spurious within transmission band 1 Pout (7 MOD LO) fMOD • LOin = 259.25 MHz fMOD • LOin × 7, fMOD • LOin × 7 (Image) – –65 –55 dBc Spurious within transmission band 2 Pout (8 MOD LO) fMOD • LOin = 233.15 MHz fMOD • LOin × 8, fMOD • LOin × 8 (Image) – –65 –55 dBc Power saving Rise time TPS-TX (Rise) VPS-TX = 0 V → 3 V – 2 5 µs response time Fall time TPS-TX (Fall) VPS-TX = 3 V → 0 V – 2 5 µs I/Q input impedance ZI/Q Value between Pins I/Ib and Q/Qb – 180 – kΩ I/Q input bias current II/Q Value of each pin when VI = VIb = VQ = VQb 3.5 7 16 µA VPS-TX (Low) 0 – 0.5 V VPS-TX (High) 0.9 – VCC V Note 1 Power save low Power save high Note 2 Notes 1. Power save pin applied voltage in sleep mode 2. Power save pin applied voltage in active mode Preliminary Data Sheet 5 µPC8139GR-7JH ELECTRICAL SPECIFICATIONS (2) TA = +25°C, VCC = 3.0 V, unless otherwise specified, VPS = 3.0 V (high), f 2ndMIXin = 243.95 MHz, P 2ndMIXin = –40 dBm, f2ndMIX-LOin = 233.15 MHz, P 2ndMIX-LOin = –7 dBm, f 2ndMIXout = 10.8 MHz, f 2ndIFin = 10.8 MHz, P 2ndIFin = –15 dBm, f2ndIFout = 10.8 MHz Parameter Symbol Condition MIN. TYP. MAX. Unit 3.5 4.8 6 mA Receiver block total characteristics Total circuit current (RX) ICC (RX-TOTAL) No signal input Dark current at power save ICC (PS-RX VPS-RX ≤ 0.3 V (Low), No signal input – 0.1 5 µA TOTAL) Rise time TPS-RX (Rise) VPS-RX = 0 V → 3 V – 2 5 µs Fall time TPS-RX (Fall) VPS-RX = 3 V → 0 V – 2 5 µs VPS-RX (Low) 0 – 0.3 V VPS-RX (High) 2.5 – VCC V 6 10 14 dB – 93 – dBµV – 94 – dBµV – 8 – dB – 52 – dBµV Power save response time Power save Power save low Note 1 Note 2 high Receiver block 1 (2nd down converter) 2nd MIX conversion gain CG2ndMIX Combining capacitance with SG 1-dB compression output level P1dB2ndMIX Input 3rd order intercept point IIP3 (2ndMIX) f2ndMIXin1 = 243.95 MHz, f2ndMIXin2 = 244.25 MHz 2nd MIX noise figure NF2ndMIX At I/O LC matching Note 3 2nd MIX local leak 1 ISL (2ndLO)1 Pin 10 input –7-dBm input 2nd MIX local leak 2 ISL (2ndLO)2 Pin 10 input –7-dBm input – 24 – dBµV 2nd MIX output resistance Z2ndMIXout Pin 20 – 330 – Ω Limiting sensitivity SL –3 dB point – 27 32 dBµVEM F 2nd IF amplifier gain GV P2ndIFin = 13 dBµVEMF – 80 – dB – 6 – deg 0.5 0.62 0.75 VP-P Note 4 Receiver block 2 (IF amplifier) Note 5 2nd IF amplifier phase shift SP P2ndIFin = 63 to 98 dBµVEMF 2nd IF amplifier output amplitude VO 10 kΩ//10 pF 2nd IF amplifier output rise time tR – 13 25 ns 2nd IF amplifier output fall time tF – 10 20 ns 2nd IF amplifier input resistance Rin Pin 16, Pin 17 – 330 – Ω 2nd IF amplifier input capacitance Cin Pin 16, Pin 17 – TBD – pF 2nd IF amplifier output duty ratio VO (duty) – 52 – % 2nd IF amplifier output bias level VO (DC) – 1.5 – V Note 6 Notes 1. Power save pin applied voltage in sleep mode 2. Power save pin applied voltage in active mode 3. Leak to 2nd MIX output pin (Pin 20) of 2nd MIX-LO 4. Leak to 2nd MIX input pin (Pin 22) of 2nd MIX-LO 5. RBW of network analyzer = 3 Hz 6. 10 pF is a value including all capacitance connected to the pins (wiring pattern) 6 Preliminary Data Sheet µPC8139GR-7JH ELECTRICAL SPECIFICATIONS (3) TA = +25°C, VCC = 3.0 V, unless otherwise specified, VPS = 3.0 V (high), f 2ndMIXin = 243.95 MHz, P 2ndMIXin = –40 dBm, f2ndMIX-LOin = 233.15 MHz, P 2ndMIX-LOin = –7 dBm, f 2ndMIXout = 10.8 MHz, f 2ndIFin = 10.8 MHz, P 2ndIFin = –15 dBm, P2ndIFout = 10.8 MHz Parameter Symbol Condition MIN. TYP. MAX. Unit – ±1.5 ±2.0 dB Receiver block 3 (RSSI) VIF = 33 to 98 dBµVEMF RSSI linearity LR RSSI slope SR – 28 – mV/dB RSSI intercept IR – 4 – dBµVEMF RSSI output voltage 1 VR1 V2ndIFin = 33 dBµVEMF 0.6 0.8 1 V RSSI output voltage 2 VR2 V2ndIFin = 63 dBµV 1.44 1.68 1.92 V RSSI output voltage 3 VR3 V2ndIFin = 98 dBµV 2.4 2.7 2.9 V RSSI output voltage 4 VR4 No signal input – 0.5 – V RSSI output temperature stability ST TA = –30°C to +80°C – ±2.0 – dB RSSI output dynamic range DR 75 83 – dB RSSI rise time trf1 – 1 5 µs RSSI fall time trf2 – 1 5 µs – 30 – mVP-P 28 35 42 kΩ MIN. TYP. MAX. Unit 2.5 3.2 3.5 mA –10 – – dBm 220 – 270 MHz RSSI output ripple RR RSSI output resistance ROR 10 pF Note Note 10 pF is a value including all capacitance (wiring capacitance) connected to the pins ELECTRICAL SPECIFICATIONS (4) TA = +25°C, VCC = 3.0 V Parameter Symbol Condition Common block (2nd VCO) Total circuit current (2nd VCO) ICC (2ndVCO) 3 kΩ is attached to pin 10 externally (without pull-down resistance for pin 8) 2nd VCO output level P2ndVCO 2nd VCO oscillating frequency f2ndVCO Pin 8 pull-down resistance is 1 kΩ Preliminary Data Sheet 7 µPC8139GR-7JH PIN FUNCTIONS Pin No. Symbol Applied Voltage (V) Pin Function and Description Voltage (V) 1 I VCC/2 – Input pin for I signal. The input impedance is about 180 kΩ. 2 Ib VCC/2 – Input pin for Ib signal. The input impedance is about 180 kΩ. Single ended input is also possible. In the case of single ended input, input only the DC voltage of Vcc/2. 3 Q VCC/2 – Input pin for Q signal. The input impedance is about 180 kΩ. 4 Qb VCC/2 – Input pin for Qb signal. The input impedance is about 180 kΩ. Single ended input is also possible. In the case of single ended input, input only the DC voltage of Vcc/2. 1 3 470 Ω 470 Ω 2.2 kΩ 470 Ω 470 Ω 2.2 kΩ 5 VCC1 2.7 to 4.0 – Power supply voltage pin for the quadrature modulator block. 6 GND1 0 – Ground pin for the quadrature modulator block. Form as wide a ground pattern as possible to minimize its impedance. 7 VCC2 2.7 to 4.0 – Power supply voltage pin for the VCO block. 8 VCOout – 1.6 Oscillator output pin. The output level can be adjusted with an external pulldown resistor. 9 GND2 0 – 10 VCO_E – 2.1 11 12 VCO_B VCO_C – 2.7 to 4.0 2.9 – Ground pin for the VCO block. Form as wide a ground pattern as possible to minimize its impedance. Emitter pin for oscillator. Ground with an external pull-down resistor. It can be oscillated by performing feedback with a resonance circuit mounted externally between this pin and Pin 11. Base pin for oscillator. It can be oscillated by performing feedback with a resonance circuit mounted externally between this pin and Pin 10. Collector pin for oscillator. Open collector. : External attachment Note The pin voltage is measured on Vcc=3.0 V. 8 Internal Equivalent Circuit Note Preliminary Data Sheet 8 12 11 10 2 4 µPC8139GR-7JH PIN FUNCTIONS Pin No. Symbol Applied Voltage (V) Pin Function and Description Internal Equivalent Circuit Note Voltage (V) 13 VCC3 2.7 to 4.0 – 14 IFout – 1.5 Supply voltage pin for the IF amplifier and RSSI block. Output pin for the IF amplifier. 14 15 RSSIou t – 0.5 (No input signal) Output pin for the RSSI. The output resistance is about 35 kΩ. 15 35 kΩ 16 IFin1 – 1.9 Input pin for the IF amplifier. The input resistance is about 330 Ω. 16 Input pin for the IF amplifier. The input resistance is about 330 Ω. 17 17 IFin2 – 1.9 18 GND3 0 – Ground pin for the IF amplifier, RSSI block, and 2nd down converter block. Form as wide a ground pattern as possible to minimize its impedance. 19 VCC4 2.7 to 4.0 – Power supply voltage pin for the 2nd down converter block. 20 2nd MIXout – 1.5 Output pin for the 2nd down converter. The output resistance is about 330 Ω. 20 21 22 2nd MIXinb 2nd MIXin – – 1.9 1.9 Bypass pin for the 2nd down converter block. Ground this pin through an external capacitor. 22 21 Input pin for the 2nd down converter. High impedance input. : External attachment Note The pin voltage is measured on Vcc=3.0 V. Preliminary Data Sheet 9 µPC8139GR-7JH PIN FUNCTIONS Pin No. 23 24 Symbol VPS (RX) VPS (TX)/ VAGC Applied Voltage (V) 0 to VCC 0 to VCC Pin (V) – – VCC5 2.7 to 4.0 – 26 TX MIXLOinb – 2.0 2.0 Power save pin for the receiver block (IF amplifier, RSSI, 2nd down converter). This pin is interlocked to the internal regulator and can control the following. VPS (V) IC stat 2.5 to VCC ON (Active Mode) 0 to 0.3 OFF (Sleep Mode) Power save pin for the transmitter block (quadrature modulator, up converter, AGC circuit). This pin is interlocked to the internal regulator and can control the following. VPS (V) IC stat 0.9 to VCC ON (Active Mode) 0 to 0.5 OFF (Sleep Mode) 23 24 Supply voltage for the AGC block. Bypass pin for the local input of the up converter. Ground this pin through an external capacitor. 28 Local input pin for the up converter. High impedance input. 26 TX MIXLOin – 27 GND5 0 – Ground pin for the AGC and up converter. Form as wide a ground pattern as possible to minimize its impedance. 29 VCC6 2.7 to 4.0 – Supply voltage pin for the up converter block. 30 TX MIXout 2.7 to 4.0 – RF output pin for the up converter block. This is an open collector output, so an impedance matching circuit should be attached externally. : External attachment Note The pin voltage is measured on Vcc=3.0 V. 10 Internal Equivalent Circuit Voltage 25 28 Function and Description Note Preliminary Data Sheet 29 30 µPC8139GR-7JH RELATION BETWEEN I/Q PIN INPUT SIGNAL POTENTIAL AND UPPER LIMIT AMPLITUDE Power Supply Voltage (V) VCC I/Q bias voltage (V) VCC/2 = I = Ib = Q = Qb 2.7 1.35 to to 3.0 1.5 to to 4.0 2.0 Input Amplitude (mVP-P) Single ended Input I=Q Differential Phase Input I = Ib = Q = Qb ≤400 ≤600 ≤800 ≤600 ≤1000 ≤600 COMPARISON OF I/Q INPUT AMPLITUDES IN THE SAME TX OUTPUT LEVEL Power Supply Voltage (V) VCC I/Q bias voltage (V) VCC/2 = I = Ib = Q = Qb 2.7 Input Amplitude (mVP-P) Reference Characteristics TX Total Output Level (dBm) PTX-MIXout Single ended Input I=Q Differential Phase Input I = Ib = Q = Qb 1.35 400 200 –20 3.0 1.5 800 400 –14 4.0 2.0 1200 600 –10.5 Preliminary Data Sheet 11 µPC8139GR-7JH TEST CIRCUIT 1 Transmitter Block (Quadrature Modulator + Up Converter + AGC Circuit) AWG SPA 90 180 1p 270 I 1 VCC6 Q Tx_Mix_LOin GND1 VCC2 VCC VCOout GND2 100 pF SG VCC 12 VCC 3 pF GND5 VCC1 VCC Tx_Mix_out Ib Qb out in 10 nH 33 pF 33 pF Tx_Mix_LOinb SG VCC5 VCC VPSTx ± 0 VPS_Rx VPS 2nd_Mix_in VCO_E 2nd_Mix_inb VCO_B 2nd_Mix_out VCO_C VCC4 VCC3 GND3 IFout IFin2 RSSIout IFin1 Preliminary Data Sheet 100 pF out µPC8139GR-7JH TEST CIRCUIT 2 Transmitter Block + Common Block (Quadrature Modulator + Up Converter + AGC Circuit + 2nd VCO) AWG SPA 1 pF 90 180 270 in VCC 3 kΩ VCC6 Q Tx_Mix_LOin VCC1 VCC2 VCOout GND2 3 pF 15 pF 10 pF VCC VCC 3 pF GND5 33 pF 33 pF Tx_Mix_LOinb SG VCC5 VCC VPSTx VPS_Rx VPS out 2nd_Mix_in VCO_E 2nd_Mix_inb VCO_B 2nd_Mix_out VCO_C 33 nH Tx_Mix_out Ib GND1 VCC 1 pF 1 Qb 100 pF 1 kΩ in 10 nH I ± 0 SPA 100 pF VCC4 VCC3 GND3 IFout IFin2 RSSIout IFin1 Preliminary Data Sheet 13 µPC8139GR-7JH TEST CIRCUIT 3 Receiver Block (2nd Down Converter + 2nd IF Amplifier + RSSI) Tx_Mix_LOinb VCC5 VCC VCO_E 2nd_Mix_inb VCO_B 2nd_Mix_out 10 n 100 pF 1 nF 1 nF VCC4 VCC3 GND3 IFout IFin2 RSSIout IFin1 VCC SPA in Voltmeter 10 nF 100 nF 100 pF 10 pF SPA 330 Ω 2nd_Mix_in VCO_C VCC VPS VPS_Rx 100 nF GND2 1 nF VPSTx ± VCOout out GND5 VCC2 100 nF 1 nF Tx_Mix_LOin GND1 VCC 100 p 51 Ω VCC6 Q VCC1 SG Tx_Mix_out Ib Qb 100 nF 100 pF 10 pF out 1 100 pF I 10 pF SG 10 pF in 10 nF SG in 14 10 p 10 kΩ out Preliminary Data Sheet µPC8139GR-7JH TEST CIRCUIT 4 Receiver Block (2nd Down Converter + 2nd IF Amplifier + RSSI) Tx_Mix_LOinb VCC5 VCC 2nd_Mix_in VCO_E 2nd_Mix_inb VCO_B 2nd_Mix_out 10 nF 1 nF VCC3 GND3 IFout IFin2 RSSIout IFin1 Voltmeter VCC 10 nF 100 nF 100 pF 10 pF SPA 100 pF VCC4 VCO_C VCC VPS VPS_Rx 100 nF GND2 1 nF VPSTx ± VCOout out GND5 VCC2 100 nF 1 nF Tx_Mix_LOin GND1 VCC 100 p 51 Ω VCC6 Q VCC1 SG Tx_Mix_out Ib Qb 100 nF 100 pF 10 pF out 1 100 pF I 10 pF SG 10 pF in in 10 p 10 kΩ Preliminary Data Sheet 15 µPC8139GR-7JH TEST CIRCUIT TOTAL CONFIGURATION AWG SPA VCC C31 SG C13 0 90 180 270 in C4 out C1 VCC C26 L1 VCC6 C14 Q Tx_Mix_Loin C29 Qb C5 VCC C16 VCC1 GND1 C6 VCC in VCC2 VCOout R1 C18 SG GND2 C17 VCC C30 C15 C7 out SPA Tx_Mix_out Ib C11 C2 C32 GND5 VPS_TX-Vagc Tx_Mix_Loinb C8 VCC5 ± SPA 1 C28 C21 VPSTx VPS_Rx 2nd_Mix_inb VCO_B 2nd_Mix_out VCO_C VCC4 VCC3 GND3 IFout IFin2 RSSIout IFin1 C10 C22 VCC C3 C24 C25 out VPS_RX 2nd_Mix_in VCO_E SG ± I C9 C12 C27 C19 C20 SPA BPF1 in Voltmeter R2 SG C23 in in out 16 Preliminary Data Sheet µPC8139GR-7JH EXAMPLE OF THE TEST CIRCUIT MOUNTED ON PRINTED CIRCUIT BOARD GND 3 TXMIXout Iinb TXMIXLOIn I in Q in C9 C32 1 QInb C21 C31 C13 C29 C18 C28 C19 C22 C4 C16 C26 C8 C14 C5 C11 C2 2 ndMIXIn VCOout C10 R1 C24 2 C3 C12 C27 C17 C3 C1 C7 VCOin BPF1 2 ndMIXout IFIn VPSrx µ PC8139 C23 GND GND VPStx/Vagc RSSIout C25 IFout VCC R2 C8 1 Center portion on rear side 4 Parts List Symbol Name BPF1 BPF L1 Chip inductor R2 Value Model name • Specifications Manufacturer Quantity Notes on the board (1) Copper patterning on a CFEC10.8 MK1 Murata Mfg. 1 polyimide board of 76 × 10 nH TFL0816-10N SSM 1 76 × 0.2 mm in size. Chip resistor 10 kΩ RR0816R-103-D SSM 1 R1 Chip resistor 51 Ω RR0816R-510-D SSM 1 C32 Chip capacitor 3 pF GRM39B030J50PB Murata Mfg. 1 C26 to 31 Chip capacitor 100 nF GRM39B104J50PB Murata Mfg. 6 C23 to 25 Chip capacitor 10 nF GRM39B103J50PB Murata Mfg. 3 C19 to 22 Chip capacitor 1 nF GRM39B102J50PB Murata Mfg. 4 C10 to 18 Chip capacitor 100 pF GRM39B101J50PB Murata Mfg. 8 C8 to 9 Chip capacitor 33 pF GRM39B330J50PB Murata Mfg. 2 C2 to 7 Chip capacitor 10 pF GRM39B100J50PB Murata Mfg. 7 C1 Chip capacitor 1 pF GRM39B010J50PB Murata Mfg. 1 4 PCC pin A2-3PA-2.54DSA Hirose Electric 2 3 PCC pin A2-1PA-2.54DSA Hirose Electric 3 2 SMA connector 142-0701-881 JHONSON 10 1 Polyimide substrate R4775 (t0.2) Matsushita Electric Works 1 Preliminary Data Sheet (2) Full grounding on rear side. (3) Solder coating over patterns. (4) and indicate through holes. 17 µPC8139GR-7JH PACKAGE DIMENSIONS 30-pin plastic TSSOP (225 mil) (Unit: mm) 30 16 4.4.±0.1 Detail of lead end 1 3˚ _+73˚˚ 15 0.98±0.07 8.0 MAX. 6.4±0.2 4.4±0.1 18 0.145±0.055 0.125±0.075 1.25 MAX. 1.0±0.2 0.5 0.22 _+0.10 0.05 0.10 M 0.5 MAX. Preliminary Data Sheet 0.5±0.2 µPC8139GR-7JH CAUTIONS ON USE 1. Observe precautions for handling because this IC is an electrostatic sensitive device. 2. Form as wide a ground pattern as possible to minimize its impedance. 3. Keep the track length of the ground pins as short as possible (to prevent malfunction). 4. Connect a bypass capacitor to the Vcc pin. RECOMMENDED SOLDERING CONDITIONS This product should be soldered in the following recommended conditions. For soldering methods and conditions other than the recommended conditions, consult an NEC sales representative. µPC8139GR-7JH Soldering Method Infrared reflow Soldering Conditions Package peak temperature: 235°C. Duration: 30 sec. max. (210°C or above) Symbol IR35-00-2 Note Number of times: 2, Exposure limit: None VPS Package peak temperature: 215°C. Duration: 40 sec. max. (200°C or above) VP15-00-2 Note Number of times: 2, Exposure limit: None Wave soldering Soldering bath temperature : 260°C max. Duration: 10 sec. max. WS60-00-1 Note Number of times: 1, Exposure limit: None Partial heating method Pin temperature: 300°C max. Duration: 3 sec. max. (per side of device) Note Exposure limit: None Note Storage period (days) after opening the dry pack. Storage conditions: 25°C and 65% RH or less (This product is not dry packed.) Caution Do not use different soldering methods together (except for pin partial heating.) For details of recommended soldering conditions, refer to the information document Semiconductor Device Mounting Technology Manual (C10535E) Preliminary Data Sheet 19 µPC8139GR-7JH No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product. M4 96. 5