NEC UPD16837GS

DATA SHEET
MOS INTEGRATED CIRCUIT
µPD16837
MONOLITHIC QUAD H BRIDGE DRIVER
DESCRIPTION
The µPD16837 is a monolithic quad H bridge driver employing power MOS FETs in the output stage. The MOS FETs
in the output stage lower the saturation voltage and power consumption as compared with conventional drivers using bipolar
transistors.
In addition, a low-voltage malfunction prevention circuit is also provided that prevents the IC from malfunctioning when
the supply voltage drops. A 30-pin plastic shrink SOP package is adopted to help create compact and slim application sets.
In the output stage H bridge circuits, two low-ON resistance H bridge circuits for driving actuators, and another two
channels for driving sled motors and loading motors are provided, making the product ideal for applications in CD-ROM
and DVD.
FEATURES
• Four H bridge circuits employing power MOS FETs
• High-speed PWM drive: Operating frequency: 120 kHz MAX.
• Low-voltage malfunction prevention circuit: Operating voltage: 2.5 V (TYP.)
• 30-pin shrink SOP (300 mil)
ORDERING INFORMATION
Part Number
Package
µPD16837GS
30-pin plastic SSOP (300 mil)
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C)
Parameter
Symbol
Conditions
Rating
Unit
Control block supply voltage
VDD
–0.5 to +7.0
V
Output block supply voltage
VM
–0.5 to +15
V
Input voltage
VIN
–0.5 to VDD + 0.5
V
±1.0
A/phase
H bridge drive
currentNote 1
IDR (pulse)
PW ≤ 5 ms, Duty ≤ 30 %
dissipationNote 2
PT
1.25
W
Operating temperature range
TA
0 to 75
°C
Peak junction temperature
TCH (MAX)
150
°C
Storage temperature range
Tstg
–55 to +150
°C
Power
Notes 1. When only one channel operates.
2. When mounted on a glass epoxy board (100 mm × 100 mm × 1 mm)
The information in this document is subject to change without notice.
Document No. S12764EJ1V0DS00 (1st edition)
Date Published January 1998 N CP(K)
Printed in Japan
©
1998
µPD16837
RECOMMENDED OPERATING RANGE
Parameter
Control block supply voltage
Output block supply voltage
H bridge drive current
Symbol
MIN.
TYP.
MAX.
Unit
VDDNote 1
4.0
5.0
6.0
V
VM
10.8
12.0
13.2
V
IDR (pulse)Note 2
–600
600
mA
120
kHz
75
°C
125
°C
Operating frequency
fO
Operating temperature range
TA
Peak junction temperature
0
TCH (MAX)
Notes 1. The low-voltage malfunction prevention circuit operates when VDD is 1.5 V or higher but less than 4 V
(2.5 V TYP.).
2. PW ≤ 5 ms, Duty ≤ 10%
ELECTRICAL CHARACTERISTICS (TA = 25 °C)
TA = 25 °C and the other parameters are within their recommended operating ranges as described above
unless otherwise specified.
The parameters other than changes in delay time are when the current is ON.
The low-voltage malfunction prevention circuit operates when VDD is 1.5 V to 4 V.
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
VM pin current (leakage current)
IM
VM = 13.2 V
50
µA
VDD pin current
IDD
VDD = 6 V
200
µA
High-level input current
IIH
VIN = VDD
0.25
mA
Low-level input current
µA
IIL
VIN = 0
–2.0
High-level input
voltageNote 1
VIH
VDD = 5 V, VM = 12 V
3.0
VDD + 0.3
V
Low-level input
voltageNote 1
VIL
VDD = 5 V, VM = 12 V
–0.3
0.8
V
H bridge ON resistance (chs 2 and 3)
RONa
VDD = 5 V, VM = 12 V
3.0
4.0
Ω
H bridge ON resistance (chs 1 and 4)
RONb
VDD = 5 V, VM = 12 V
1.5
2.0
Ω
3.0
mA
4.5
mA
MAX.
Unit
H bridge switching current without
Isa (AVE)
load (chs 2 and 3)Note 2
H bridge switching current without
VDD = 5 V
VM = 12 V
Isb (AVE)
at 100 kHz
load (chs 1 and 4)Note 2
ch2, ch3 2A, 3A, 2B, 3B Output
Parameter
Symbol
Conditions
MIN.
TYP.
Rise time
tTLHa
VDD = 5 V
200
ns
Rising delay time
tPLHa
VM = 12 V
350
ns
20 Ω
110
ns
Change in rising delay time
∆tPLHa
Fall time
tTHLa
200
ns
Falling delay time
tPHLa
350
ns
∆tPHLa
130
ns
MAX.
Unit
Change in falling delay time
at 100 kHz
ch2, ch3 2A-2B, 3A-3B
Parameter
2
Symbol
Conditions
MIN.
TYP.
Rising delay time differential
tPLHa (A-B)
VDD = 5 V, VM = 12 V
50
ns
Falling delay time differential
tPHLa (A-B)
20 Ω
50
ns
at 100kHz
Notes 1. The input pins are the IN and SEL pins.
2. Average value of the current consumed internally by an H bridge circuit when the circuit is switched without
load.
µPD16837
ELECTRICAL CHARACTERISTICS (TA = 25 °C)
TA = 25 °C and the other parameters are within their recommended operating ranges as described above
unless otherwise specified.
The parameters other than changes in delay time are when the current is ON.
ch1, ch4 1A, 4A, 1B, 4B Output
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Rise time
tTLHb
VDD = 5 V
200
ns
Rising delay time
tPLHb
VM = 12 V
350
ns
10 Ω
110
ns
at 100 kHz
200
ns
Change in rising delay time
∆tPLHb
Fall time
tTHLb
Falling delay time
tPHLb
350
ns
∆tPHLb
130
ns
MAX.
Unit
Change in falling delay time
ch1, ch4 1A-1B, 4A-4B
Parameter
Symbol
Conditions
MIN.
TYP.
Rising delay time differential
tPLHa (A-B)
VDD = 5 V, VM = 12 V
50
ns
Falling delay time differential
tPHLa (A-B)
10 Ω
50
ns
at 100 kHz
PIN CONFIGURATION
Output block ch 1
IN1 1
30 SEL4
IN2 2
29 IN8
SEL1 3
28 IN7
DGND 4
27 VM4
1A 5
PGND1 6
Output block ch 4
25 PGND4
1B 7
24 4A
VM1 8
23 VM3
2A 9
22 3B
PGND2 10
Output block ch 2
26 4B
21 PGND3
2B 11
20 3A
VM2 12
19 VDD
IN3 13
18 SEL3
IN4 14
17 IN6
SEL2 15
16 IN5
Output block ch 3
3
µPD16837
TYPICAL CHARACTERISTICS
PT vs. TA Characteristics
IDD vs. VDD Characteristics
100
VM = 12 V
TA = 25 °C
Supply current IDD ( µ A)
Total poser dissipation PT (W)
2
1.25 W
1
100 °C/W
0
0
25
50
75
100
125
80
60
40
20
0
150
3
4
5
6
Ambient temperature TA (°C)
Supply voltage VDD (V)
VIH, VIL, vs. VDD Characteristics
RON vs. VM Characteristics
7
3
H bridge ON resistance RON (Ω)
Input voltage VIH, VIL (V)
VM = 12 V
TA = 25 °C
VIH
2
1
VIL
3
4
5
6
VDD = 5 V
TA = 25 °C
3
RONa
2
RONb
1
10
7
11
Supply voltage VDD (V)
14
IIH vs. TA Characteristics
VIN = VDD
VDD = 5 V
TA = 25 °C
ISb
1
ISa
0.1
0
3
4
5
Supply voltage VDD (V)
4
13
0.2
High-level input current IIH (mA)
Switching current without load ISa, ISb (mA)
ISa, ISb vs. VDD Characteristics
2
0
12
Motor voltage VM (V)
6
7
0
20
40
Ambient temperature TA (°C)
60
µPD16837
VIH, VIL vs. TA Characteristics
IDD vs. TA Characteristics
100
2
80
60
40
20
0
VDD = 5 V
VM = 12 V
Input voltage VIH, VIL (V)
VDD pin current IDD ( µ A)
VDD = 6 V
0
20
40
1.95
VIH
1.9
VIL
1.85
1.8
60
0
Ambient temperature TA (°C)
ISb
0.6
ISa
0.4
0.2
VDD = 5 V
VM = 12 V
100 kHz
0
20
40
RONa
3
2
1
VDD = 5 V
VM = 12 V
0
60
RONb
0
Ambient temperature TA (°C)
20
40
60
Ambient temperature TA (°C)
tTLH, tTHL vs. TA Characteristics (chs 1 and 4)
tTLH, tTHL vs. TA Characteristics (chs 2 and 3)
100
90
tTHL
80
tTLH
70
60
VDD = 5 V,
VM = 12 V
100 kHz, 10 Ω
0
20
40
Ambient temperature TA (°C)
60
Rise time/fall time tTLH, tTHL (ns)
100
Rise time/fall time tTLH, tTHL (ns)
60
RON vs. TA Characteristics
0.8
50
40
4
H bridge ON resistance RON (Ω)
Switching current without load ISa, ISb (mA)
ISa, ISb vs. TA Characteristics
1
0
20
Ambient temperature TA (°C)
90
80
tTLH
70
tTHL
60
VDD = 5 V,
VM = 12 V
100 kHz, 20 Ω
50
0
20
40
60
Ambient temperature TA (°C)
5
tPLH, tPHL vs. TA Characteristics (chs 1 and 4)
300
300
tPLH
250
tPLH
250
tPHL
200
tPHL
200
150
100
tPLH, tPHL vs. TA Characteristics (chs 2 and 3)
Rising/falling delay time (chs 2 and 3) ∆ tPLH, ∆ tPHL (ns)
Rising/falling delay time (chs 1 and 4) tPLH, tPHL (ns)
µPD16837
150
VDD = 5 V,
VM = 12 V
100 kHz, 10 Ω
0
20
40
60
100
VDD = 5 V,
VM = 12 V
100 kHz, 20 Ω
0
6
∆ tPLH, ∆tPHL vs. TA Characteristics (chs 1 and 4)
40
60
∆ tPLH, ∆ tPHL vs. TA Characteristics (chs 2 and 3)
100
100
∆ tPHL
80
∆ tPLH
60
40
20
0
20
Ambient temperature TA (°C)
Rising/falling time differential (chs 2 and 3) ∆ tPLH, ∆ tPHL (ns)
Rising/falling time differential (chs 1 and 4) tPLH, tPHL (ns)
Ambient temperature TA (°C)
VDD = 5 V,
VM = 12 V
100 kHz, 10 Ω
0
20
40
Ambient temperature TA (°C)
60
∆ tPHL
80
∆ tPLH
60
40
20
0
VDD = 5 V,
VM = 12 V
100 kHz, 20 Ω
0
20
40
Ambient temperature TA (°C)
60
µPD16837
PACKAGE DIMENSION
30-PIN SHRINK SOP (300 mil) (unit: mm)
30
16
3˚ +7°
-3°
detail of lead end
1
15
1.55±0.1
13.0 MAX.
7.7±0.3
1.05±0.2
0.8
+0.10
0.35–0.05
0.10
0.9 MAX.
0.20 –0.05
0.1±0.1
+0.10
1.8 MAX.
5.6±0.2
0.6±0.2
0.10 M
7
µPD16837
BLOCK DIAGRAM
VDD
19
IN1
1
IN2
2
SEL1
3
IN3
13
IN4
14
SEL2
15
IN5
16
IN6
17
SEL3
18
IN7
28
IN8
29
SEL4
30
GND
4
Control circuit 1
Control circuit 2
Control circuit 3
Control circuit 4
LVP
Remark Connect all VM and GND pins.
: Internally pulled down to GND via 50 kΩ.
8
8
VM1
5
1A
7
1B
6
PGND
4
VM2
5
2A
26
2B
6
PGND
4
VM3
5
3A
26
3B
6
PGND
4
VM4
5
4A
26
4B
6
PGND
H bridge 1
H bridge 2
H bridge 3
H bridge 4
µPD16837
FUNCTION TABLE
VM1 to 4
VDD (common)
IN1, 7
1A, 4A (OUTA)
IN2, 8
1B, 4B (OUTB)
SEL1, 4
GND (common)
PGND1, 4
VM1 to 4
VDD (common)
IN3, 5
2A, 3A (OUTA)
IN4, 6
2B, 3B (OUTB)
SEL2, 3
GND (common)
PGND2, 3
Function Table (common to all chs)
Input
Output
IN1
IN2
SEL
OUTA
OUTB
H
L
H
H
L
L
L
H
L
L
L
H
H
L
H
H
H
H
H
H
×: Don’t care
×
×
L
Z
Z
Z: High inpedance
9
µPD16837
ABOUT SWITCHING
VM
When output A is switched as shown in the figure on the right, a dead
time (time during which both P ch and N ch are OFF) elapses to prevent
Pch
through current. Therefore, the waveform of output A (rise time, fall time,
Pch
and delay time) changes depending on whether output B is fixed to the
high or low level.
A
B
The output voltage waveforms of A in response to an input waveform
where output B is fixed to the low level (1) or high level (2) are shown
below.
Nch
Nch
(1) Output B: Fixed to low level
Output A: Switching operation (Operations of P ch and N ch are shown.)
Dead time
Input waveform
Pch: OFF→ OFF→
Nch: ON→ OFF→
ON→
OFF→
OFF→
OFF→
······ON······
······OFF······
Voltage waveform at point A
OFF→
ON→
Current OFF
Current ON
Output A goes into a high-impedance state and is in an undefined status during the dead time period. Because
output B is pulled down by the load, a low level is output to A.
(2) Output B: Fixed to high level
Output A: Switching operation (Operations of P ch and N ch are shown.)
Dead time
Input waveform
Pch: OFF→ OFF→
Nch: ON→ OFF→
ON→
OFF→
······ON······
······OFF······
Voltage waveform at point A
OFF→
OFF→
OFF→
ON→
Current OFF
Current ON
Output A goes into a high-impedance state and is in an undefined status during the dead time period. Because
output B is pulled up by the load, a high level is output to A.
10
µPD16837
The switching characteristics shown on the preceding pages are specified as follows (“output at one side” means
output B for H bridge output A, or output A for output B).
[Rise time]
Rise time when the output at one side is fixed to the low level (specified on current ON).
[Fall time]
Fall time when the output at one side is fixed to the high level (specified on current ON).
[Rising delay time]
Rising delay time when the output at one side is fixed to the low level (specified on current ON).
[Falling delay time]
Falling delay time when the output at one side is fixed to the high level (specified on current ON).
[Change in rising delay time]
Change (difference) in the rising delay time between when the output at one side is fixed to the low level and when
the output at the other side is fixed to the high level.
[Change in falling delay time]
Change (difference) in falling delay time between when the output at one side is fixed to the low level and when
the output at the other side is fixed to the high level.
[Rising delay time differential]
Difference in rising delay time between output A and output B.
[Falling delay time differential]
Difference in falling delay time between output A and output B.
Caution
Because this IC switches a high current at high speeds, surge may occur due to the VM and
GND wiring and inductance and degrade the performance of the IC.
On the PWB, keep the pattern width of the V M and GND lines as wide and short as possible,
and insert the bypass capacitors between V M and GND at a location as close to the IC as
possible.
Connect a low-inductance magnetic capacitor (4700 pF or more) and an electrolytic capacitor
of 10 µ F or so, depending on the load current, in parallel.
11
µPD16837
RECOMMENDED SOLDERING CONDITIONS
Solder this product under the following recommended conditions.
For details of the recommended soldering conditions, refer to information document Semiconductor Device
Mounting Technology Manual (C10535E).
For soldering methods and conditions other than those recommended, consult NEC.
Soldering Method
Soldering Conditions
Recommended
Condition Symbol
Infrared reflow
Package peak temperature: 235 °C; Time: 30 secs. max. (210 °C min.);
Number of times: 3 times max.; Number of days: noneNote; Flux:
Rosin-based flux with little chlorine content (chlorine: 0.2 Wt% max.)
is recommended.
IR35-00-3
VPS
Package peak temperature: 215 °C; Time: 40 secs. max. (200 °C min.);
Number of times: 3 times max.; Number of days: noneNote; Flux:
Rosin-based flux with little chlorine content (chlorine: 0.2 Wt% max.)
is recommended.
VP-15-00-3
Wave soldering
Package peak temperature: 260 °C; Time: 10 secs. max.; Number of
times: once; Flux: Rosin-based flux with little chlorine content
(chlorine: 0.2 Wt% max.) is recommended.
WS60-00-1
Note Number of days in storage after the dry pack has been opened. The storage conditions are at 25 °C, 65%
RH MAX.
Caution
12
Do not use two or more soldering methods in combination.
µPD16837
[MEMO]
13
µPD16837
[MEMO]
14
µPD16837
[MEMO]
15
µPD16837
No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
Anti-radioactive design is not implemented in this product.
M4 96.5
2