RF2459 Preliminary 8 3V PCS DOWNCONVERTER Typical Applications • CDMA/TDMA/DCS1900 PCS Systems • Micro-Cell PCS Base Stations • PHS 1500/WLAN 2400 Systems • Portable Battery-Powered Equipment • General Purpose Downconverter Product Description 0.006 + 0.003 0.192 + 0.008 The RF2459 is a monolithic integrated downconverter for PCS, PHS, and WLAN applications. The IC contains all of the required components to implement the RF functions of the downconverter. It contains a double-balanced Gilbert cell mixer and a balanced IF output. The mixer’s high third-order intercept point makes it ideal for digital cellular applications. The IC is designed to operate from a single 3V power supply. 0.012 0.0256 0.118 + 0.004 sq. 0.034 0.021 + 0.004 Optimum Technology Matching® Applied ü Si Bi-CMOS GaAs HBT GaAs MESFET SiGe HBT Si CMOS 0.006 + 0.002 NOTES: 1. Shaded lead is pin 1. 2. All dimensions are exclusive of flash, protrusions or burrs. 3. Lead coplanarity: 0.002 with respect to datum "A". Package Style: MSOP-8 Features • Extremely High Dynamic Range • Single 3V Power Supply • 1500MHz to 2500MHz Operation LO IN 1 8 IF+ GND2 2 7 IF- VCC 3 6 GND3 GND1 4 5 RF IN Ordering Information RF2459 RF2459 PCBA Functional Block Diagram Rev A2 010717 3V PCS Downconverter Fully Assembled Evaluation Board RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA 8 FRONT-ENDS 6° MAX 0° MIN Si BJT -A- Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com 8-97 RF2459 Preliminary Absolute Maximum Ratings Parameter Ratings Unit Supply Voltage Input LO and RF Levels Ambient Operating Temperature Storage Temperature -0.5 to 7.0 +6 -40 to +85 -40 to +150 VDC dBm °C °C Parameter Specification Min. Typ. Max. Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Unit T = 25°C, VCC =3.0V, RF=1960MHz, LO=1750MHz@-2dBm Overall 8 Condition Usable RF Frequency Range Typical RF Frequency Range Usable LO Frequency Range Typical LO Frequency Range IF Frequency Range Noise Figure Input VSWR 1500 Input IP3 Gain Output Impedance +5.0 8 2500 1930 to 1990 1200 2500 1430 to 1990 DC to 500 14 <2:1 Single-ended with external matching network. +7.0 10 1000 Input P1dB MHz MHz MHz MHz MHz dB dBm dB Ω -7.5 dBm -5 to +3 30 40 <2:1 dBm dB dB Single-ended with external matching network. FRONT-ENDS LO Input LO Input Range LO to RF (Mix In) Rejection LO to IF LO Input VSWR Single-ended with external matching network. Power Supply Voltage Current Consumption 8-98 2.7 3.0 20 3.6 26 V mA Rev A2 010717 RF2459 Preliminary Pin 1 Function LO IN 2 GND2 3 VCC 4 5 GND1 RF IN 6 7 GND3 IF- 8 IF+ Description Mixer LO single-ended input. The pin is internally DC blocked. External matching sets impedance. Interface Schematic LO IN Ground for downconverter. Keep traces physically short and connect directly to ground plane for best performance. Supply voltage for downconverter. External RF bypassing is required. The trace length between the bypass caps and the pin should be minimized. Connect ground sides of caps directly to ground. Same as pin 2. Mixer RF single-ended input. The pin is internally DC blocked. External matching sets input impedance. RF IN Same as pin 2. IF output pin. The output is balanced. A current combiner external network performs a differential to single-ended conversion and sets the output impedance. There must be a DC path from VCC to this pin. this is normally achieved with the current combiner network. A DC blocking cap must be present if the IF filter input has a DC path to ground. IF+ IF- Same as pin 7, except complementary output. FRONT-ENDS 8 Rev A2 010717 8-99 RF2459 Preliminary Application Schematic VCC IF Filter L2 L1 C2 IF OUT C1 C1 R 4.7 nH LO IN 1.5 pF VCC 100 nF 22 pF 1 8 2 7 3 6 4 5 1.5 pF RF IN 2.2 nH FRONT-ENDS 8 Output Interface Network L1, C1 and R form a current combiner which performs a differential to single-ended conversion at the IF frequency and sets the output impedance. In most cases, the resonance frequency is independent of R and can be set according to the following equation: fIF = R can then be used to set the output impedance according to the following equation: ( 4 R1 OUT 8-100 C1 should be chosen as high as possible, while maintaining an RP of L1 that allows for the desired ROUT. 1 L1 2π (C1 + C EQ) 2 Where CEQ is the equivalent stray capacitance and capacitance looking into pins 7 and 8. An average value to use for CEQ is 2.5pF. R= where ROUT is the desired output impedance and RP is the parasitic equivalent parallel resistance of L1. - 1 RP ) -1 L2 and C2 serve dual purposes. L2 serves as an output bias choke, and C2 serves as a series DC block. In addition, L2 and C2 may be chosen to form an impedance matching network if the input impedance of the IF filter is not equal to ROUT. Otherwise, L2 is chosen to be large (suggested 8.2nH) and C2 is chosen to be large (suggested 22nF) if a DC path to ground is present in the IF filter, or omitted if the filter is DC blocked. Rev A2 010717 RF2459 Preliminary Evaluation Board Schematic RF=1.959MHz, IF=210MHz (Download Bill of Materials from www.rfmd.com.) VCC P1 1 VCC 2 GND 3 N/C L3 100 nH C5 9 pF CON3 J1 LO IN 50 Ω µstrip R1 16k Ω L4 180 nH C7 4 pF 50 Ω µstrip J3 IF OUT C6 9 pF L1 4.7 nH C1 1.5 pF VCC C2 100 nF C3 22 pF 1 8 2 7 3 6 4 5 C4 1.5 pF 50 Ω µstrip J2 RF IN L2 2.2 nH NOTES: 1) R1, L3, C5, and C6 are chosen to produce an output impedance, ROUT, of 1000 Ω @ 210 MHz. 2) L4 and C7 are chosen to match the 1000 Ω output impedance to 50 Ω for testing purposes. FRONT-ENDS 8 Rev A2 010717 8-101 RF2459 Preliminary Evaluation Board Layout 900MHz Board Size 2.0" x 2.0" Board Thickness 0.031”, Board Material FR-4 FRONT-ENDS 8 8-102 Rev A2 010717 RF2459 Preliminary MIXIN VSWR versus VCC LOIN VSWR versus VCC 1.45 1.95 MIXin, -30º MIXin, 25º MIXin, 85º 1.90 1.40 1.35 LOIN MIXIN VSWR 1.85 1.80 1.30 1.75 1.25 1.70 Loin, -30º Loin, 25º Loin, 85º 1.65 2.70 2.80 2.90 3.00 3.10 3.20 3.30 3.40 3.50 1.20 2.70 3.60 2.80 2.90 3.00 VCC (V) 3.10 3.20 3.30 3.40 3.50 3.60 VCC (V) NF versus VCC Gain versus VCC 17.0 13.0 16.0 12.0 15.0 11.0 14.0 13.0 FRONT-ENDS Gain (dB) Noise Figure 8 10.0 9.0 12.0 8.0 NF, -30º Gain, -30º Gain, 25º NF, 25º Gain, 85º NF, 85º 11.0 7.0 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 2.7 2.8 2.9 3.0 VCC (V) 3.1 3.2 3.3 3.4 3.5 3.6 VCC (V) ICC versus VCC IIP3 versus VCC 30.0 15.0 13.0 25.0 IIP3 (dBm) ICC (mA) 11.0 20.0 9.0 7.0 15.0 5.0 Icc, -30º Icc, 25º Icc, 85º IIP3, -30º IIP3, 25º IIP3, 85º 10.0 3.0 2.7 2.8 2.9 3.0 3.1 3.2 VCC (V) Rev A2 010717 3.3 3.4 3.5 3.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 VCC (V) 8-103 RF2459 Preliminary IP1dB versus VCC Gain versus LO PIN VCC = 3.0 V 14.0 -4.0 Gain, -30º Gain, 25º 13.0 -5.0 Gain, 85º 12.0 Gain (dB) IP1dB (dBm) -6.0 -7.0 11.0 10.0 -8.0 9.0 -9.0 IP1dB, -30º 8.0 IP1dB, 25º IP1dB, 85º -10.0 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 7.0 -6.0 3.6 -4.0 VCC (V) -6.0 IP1dB (dBm) IIP3 (dBm) FRONT-ENDS IP1dB, -30º IP1dB, 25º IP1dB, 85º -7.0 8.0 6.0 -8.0 -9.0 4.0 -10.0 2.0 -11.0 -4.0 -2.0 0.0 LO PIN (dBm) 8-104 4.0 VCC = 3.0 V -5.0 IIP3, -30º IIP3, 25º IIP3, 85º 10.0 0.0 -6.0 2.0 IP1dB versus LO PIN VCC = 3.0 V 12.0 8 0.0 LO PIN (dBm) IIP3 versus LO PIN 14.0 -2.0 2.0 4.0 -12.0 -6.0 -4.0 -2.0 0.0 2.0 4.0 LO PIN (dBm) Rev A2 010717