LM2767 www.ti.com SNVS069C – FEBRUARY 2000 – REVISED MAY 2013 LM2767 Switched Capacitor Voltage Converter Check for Samples: LM2767 FEATURES 1 • • • • 2 Doubles Input Supply Voltage SOT-23 5-Pin Package 20Ω Typical Output Impedance 96% Typical Conversion Efficiency at 15mA APPLICATIONS • • • • • • Cellular Phones Pagers PDAs, Organizers Operational Amplifier Power Suppliers Interface Power Suppliers Handheld Instruments DESCRIPTION The LM2767 CMOS charge-pump voltage converter operates as a voltage doubler for an input voltage in the range of +1.8V to +5.5V. Two low cost capacitors and a diode are used in this circuit to provide at least 15 mA of output current. The LM2767 operates at 11 kHz switching frequency to avoid audio voice-band interference. With an operating current of only 40 µA (operating efficiency greater than 90% with most loads), the LM2767 provides ideal performance for battery powered systems. The device is manufactured in a SOT-23 5pin package. Basic Application Circuit Figure 1. Voltage Doubler 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000–2013, Texas Instruments Incorporated LM2767 SNVS069C – FEBRUARY 2000 – REVISED MAY 2013 www.ti.com Connection Diagram 5-Pin Small Outline Package 1 5 2 3 4 Figure 2. DBV Package Top View Figure 3. Actual Size PIN FUNCTIONS Pin Name 1 VOUT Positive voltage output. 2 GND Power supply ground input. 3 CAP− Connect this pin to the negative terminal of the charge-pump capacitor. 4 V+ 5 CAP+ Function Power supply positive voltage input. Connect this pin to the positive terminal of the charge-pump capacitor. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS (1) (2) Supply Voltage (V+ to GND, or V+ to VOUT) 5.8V VOUT Continuous Output Current 30 mA Output Short-Circuit Duration to GND (3) Continuous Power Dissipation (TA = 25°C) 1 sec. (4) 400 mW TJMax (4) (1) (2) (3) (4) 150°C Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device beyond its rated operating conditions. If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. VOUT may be shorted to GND for one second without damage. For temperatures above 85°C, VOUT must not be shorted to GND or device may be damaged. The maximum allowable power dissipation is calculated by using PDMax = (TJMax − TA)/θJA, where TJMax is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction-to-ambient thermal resistance of the specified package. OPERATING Ratings θJA (1) 210°C/W −40°C to 100°C Junction Temperature Range Ambient Temperature Range −40°C to 85°C Storage Temperature Range −65°C to 150°C Lead Temp. (Soldering, 10 sec.) ESD Rating (1) (2) 2 240°C Human Body Model (2) 2kV Machine Model (2) 200V The maximum allowable power dissipation is calculated by using PDMax = (TJMax − TA)/θJA, where TJMax is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction-to-ambient thermal resistance of the specified package. The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. The machine model is a 200pF capacitor discharged directly into each pin. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM2767 LM2767 www.ti.com SNVS069C – FEBRUARY 2000 – REVISED MAY 2013 ELECTRICAL CHARACTERISTICS Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: V+ = 5V, C1 = C2 = 10 μF. (1) Symbol Parameter Condition Min Typ 1.8 Max Units 5.5 V V+ Supply Voltage IQ Supply Current No Load IL Output Current 1.8V ≤ V+ ≤ 5.5V ROUT Output Resistance 20 40 Ω fOSC Oscillator Frequency See (3) 8 22 50 kHz fSW Switching Frequency See (3) 4 11 25 kHz (2) PEFF Power Efficiency VOEFF Voltage Conversion Efficiency (1) (2) (3) 40 IL = 15 mA µA mA RL (5.0k) between GND and OUT 98 IL = 15 mA to GND 96 No Load 90 15 99.96 % % In the test circuit, capacitors C1 and C2 are 10 µF, 0.3Ω maximum ESR capacitors. Capacitors with higher ESR will increase output resistance, reduce output voltage and efficiency. Specified output resistance includes internal switch resistance and capacitor ESR. See the details in the application information for positive voltage doubler. The output switches operate at one half of the oscillator frequency, fOSC = 2fSW. Test Circuit Figure 4. LM2767 Test Circuit Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM2767 3 LM2767 SNVS069C – FEBRUARY 2000 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics (Circuit of Figure 4, VIN = 5V, TA = 25°C unless otherwise specified) 4 Supply Current vs Supply Voltage Output Resistance vs Capacitance Figure 5. Figure 6. Output Resistance vs Supply Voltage Output Resistance vs Temperature Figure 7. Figure 8. Output Voltage vs Load Current Efficiency vs Load Current Figure 9. Figure 10. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM2767 LM2767 www.ti.com SNVS069C – FEBRUARY 2000 – REVISED MAY 2013 Typical Performance Characteristics (continued) (Circuit of Figure 4, VIN = 5V, TA = 25°C unless otherwise specified) Switching Frequency vs Supply Voltage Switching Frequency vs Temperature Figure 11. Figure 12. Output Ripple vs Load Current Figure 13. CIRCUIT DESCRIPTION The LM2767 contains four large CMOS switches which are switched in a sequence to double the input supply voltage. Energy transfer and storage are provided by external capacitors. Figure 14 illustrates the voltage conversion scheme. When S2 and S4 are closed, C1 charges to the supply voltage V+. During this time interval, switches S1 and S3 are open. In the next time interval, S2 and S4 are open; at the same time, S1 and S3 are closed, the sum of the input voltage V+ and the voltage across C1 gives the 2V+ output voltage when there is no load. The output voltage drop when a load is added is determined by the parasitic resistance (Rds(on) of the MOSFET switches and the ESR of the capacitors) and the charge transfer loss between capacitors. Details will be discussed in the following application information section. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM2767 5 LM2767 SNVS069C – FEBRUARY 2000 – REVISED MAY 2013 www.ti.com Figure 14. Voltage Doubling Principle POSITIVE VOLTAGE DOUBLER The main application of the LM2767 is to double the input voltage. The range of the input supply voltage is 1.8V to 5.5V. The output characteristics of this circuit can be approximated by an ideal voltage source in series with a resistance. The voltage source equals 2V+. The output resistance Rout is a function of the ON resistance of the internal MOSFET switches, the oscillator frequency, and the capacitance and ESR of C1 and C2. Since the switching current charging and discharging C1 is approximately twice the output current, the effect of the ESR of the pumping capacitor C1 will be multiplied by four in the output resistance. The output capacitor C2 is charging and discharging at a current approximately equal to the output current, therefore, its ESR only counts once in the output resistance. A good approximation of Rout is: (1) where RSW is the sum of the ON resistances of the internal MOSFET switches shown in Figure 14. RSW is typically 4.5Ω for the LM2767. The peak-to-peak output voltage ripple is determined by the oscillator frequency as well as the capacitance and ESR of the output capacitor C2: (2) High capacitance, low ESR capacitors can reduce both the output resistance and the voltage ripple. The Schottky diode D1 is only needed to protect the device from turning-on its own parasitic diode and potentially latching-up. During start-up, D1 will also quickly charge up the output capacitor to VIN minus the diode drop thereby decreasing the start-up time. Therefore, the Schottky diode D1 should have enough current carrying capability to charge the output capacitor at start-up, as well as a low forward voltage to prevent the internal parasitic diode from turning-on. A Schottky diode like 1N5817 can be used for most applications. If the input voltage ramp is less than 10V/ms, a smaller Schottky diode like MBR0520LT1 can be used to reduce the circuit size. CAPACITOR SELECTION As discussed in the Positive Voltage Doubler section, the output resistance and ripple voltage are dependent on the capacitance and ESR values of the external capacitors. The output voltage drop is the load current times the output resistance, and the power efficiency is (3) Where IQ(V+) is the quiescent power loss of the IC device, and IL2Rout is the conversion loss associated with the switch on-resistance, the two external capacitors and their ESRs. 6 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM2767 LM2767 www.ti.com SNVS069C – FEBRUARY 2000 – REVISED MAY 2013 The selection of capacitors is based on the allowable voltage droop (which equals Iout Rout), and the desired output voltage ripple. Low ESR capacitors (Table 1) are recommended to maximize efficiency, reduce the output voltage drop and voltage ripple. Table 1. Low ESR Capacitor Manufacturers Phone Website Nichicon Corp. Manufacturer (847)-843-7500 www.nichicon.com PL & PF series, through-hole aluminum electrolytic Capacitor Type AVX Corp. (843)-448-9411 www.avxcorp.com TPS series, surface-mount tantalum Sprague (207)-324-4140 www.vishay.com 593D, 594D, 595D series, surface-mount tantalum Sanyo (619)-661-6835 www.sanyovideo.com OS-CON series, through-hole aluminum electrolytic Murata (800)-831-9172 www.murata.com Ceramic chip capacitors Taiyo Yuden (800)-348-2496 www.t-yuden.com Ceramic chip capacitors Tokin (408)-432-8020 www.tokin.com Ceramic chip capacitors PARALLELING DEVICES Any number of LM2767s can be paralleled to reduce the output resistance. Since there is no closed loop feedback, as found in regulated circuits, stable operation is assured. Each device must have its own pumping capacitor C1, while only one output capacitor Cout is needed as shown in Figure 15. The composite output resistance is: (4) Figure 15. Lowering Output Resistance by Paralleling Devices CASCADING DEVICES Cascading the LM2767s is an easy way to produce a greater voltage (A two-stage cascade circuit is shown in Figure 16). The effective output resistance is equal to the weighted sum of each individual device: Rout = 1.5Rout_1 + Rout_2 (5) Note that increasing the number of cascading stages is pracitically limited since it significantly reduces the efficiency, increases the output resistance and output voltage ripple. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM2767 7 LM2767 SNVS069C – FEBRUARY 2000 – REVISED MAY 2013 www.ti.com Figure 16. Increasing Output Voltage by Cascading Devices REGULATING VOUT It is possible to regulate the output of the LM2767 by use of a low dropout regulator (such as LP2980-5.0). The whole converter is depicted in Figure 17. A different output voltage is possible by use of LP2980-3.3, LP2980-3.0, or LP2980-adj. Note that the following conditions must be satisfied simultaneously for worst case design: 2Vin_min >Vout_min +Vdrop_max (LP2980) + Iout_max × Rout_max (LM2767) 2Vin_max < Vout_max +Vdrop_min (LP2980) + Iout_min × Rout_min (LM2767) (6) (7) Figure 17. Generate a Regulated +5V from +3V Input Voltage 8 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM2767 LM2767 www.ti.com SNVS069C – FEBRUARY 2000 – REVISED MAY 2013 REVISION HISTORY Changes from Revision B (May 2013) to Revision C • Page Changed layout of National Data Sheet to TI format ............................................................................................................ 8 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM2767 9 PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM2767M5 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 85 S17B LM2767M5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 S17B LM2767M5X NRND SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 85 S17B LM2767M5X/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 S17B (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) LM2767M5 SOT-23 DBV 5 1000 178.0 8.4 LM2767M5/NOPB SOT-23 DBV 5 1000 178.0 LM2767M5X SOT-23 DBV 5 3000 178.0 LM2767M5X/NOPB SOT-23 DBV 5 3000 178.0 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 Pack Materials-Page 1 W Pin1 (mm) Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM2767M5 SOT-23 DBV 5 1000 210.0 185.0 35.0 LM2767M5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM2767M5X SOT-23 DBV 5 3000 210.0 185.0 35.0 LM2767M5X/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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