THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn 极低功率，负电源轨输入， 轨到轨输出，完全差分放大器 查询样品: THS4521-HT 特性 1 • • • • • • • • 应用范围 潜孔打钻 高温环境 • • 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 完全差分架构 带宽：40.7 MHz (210°C) 转换率：353.5 V/μs (210°C) HD2：1kHz 时为 –96dBc (1 VRMS, RL = 1 kΩ) (210°C) HD3: 1kHz 时为 –91.5dBc (1 VRMS, RL = 1 kΩ) (210°C) 输入电压噪音：19.95 nV/√Hz (f = 100 kHz) 开环路增益：90dB （典型值）(210°C) NRI — 负电源轨输入 RRO — 轨到轨输出 输出共模控制 （具有低补偿和漂移） 电源: – 电压： 2.5 V (±1.25 V) 至 3.3 V (±1.65 V) – 电流： 1.4 mA/通道(ch) (3.3 V) 断电能力： 10 µA（典型值）(210°C) • • • • 支持极端温度环境下的应用 可控基线 一个组装/测试场所 一个制造场所 可在极端温度范围 (–55°C/210°C) 下工作 (1) 延长的产品生命周期 延长产品的变更通知周期 产品可追溯性 德州仪器 （TI） 高温产品利用高度优化的硅（芯 片）解决方案，此解决方案对设计和制造工艺进行 了提升以在拓展的温度范围内大大地提高性能。 • • • • • • • • (1) 说明 可定制工作温度范围 THS4521 是一款极低功率，完全差分运算放大器，此放大器具有轨到轨输出和一个包括负电源轨在内的输入共模 范围。 这个放大器设计用于低功率数据采集系统和高密度应用，在此类应用中功率耗散是一个关键参数，此放大器 还在音频应用中提供出色的性能。 THS4521 特有精确输出共模控制，此控制可在驱动模数转换器 (ADC) 时实现 dc 耦合。 与一个低于负电源轨和轨 到轨输出的输入共模范围相耦合，这个控制可以很容易的实现与单端，地面基准信号源对接。 除此之外，这个器件 非常适合用于驱动逐次逼近寄存器 (SAR) 和只使用 2.5V 至 3.3V 和地面电源的三角积分 (ΔΣ) ADC。 THS4521 运行温度范围为 –55°C 至 210°C。 1 kW 1.5 nF 1 kW 49.9 W AINP1 VIN+ THS4521 VIN- 49.9 W 2.2 nF ADS1278 (CH 1) AINN1 1 kW 1.5 nF 1 kW Magnitude (dBV) 3.3 V -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 0 2k 4k 6k 8k 10k 12k 14k 16k 18k 20k Frequency (Hz) 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2011, Texas Instruments Incorporated English Data Sheet: SBOS548 THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. BARE DIE INFORMATION DIE THICKNESS BACKSIDE FINISH BACKSIDE POTENTIAL BOND PAD METALLIZATION COMPOSITION BOND PAD THICKNESS 11 mils. Silicon with backgrind Floating Al-Cu (0.5%) 1380 nm ½ 922 mm 12 10 11 9 ½ 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代| 业 专 ½ 8 76.8 mm 809 mm 7 6 1 0.0 3 2 4 5 ½ | 75.8 mm 0.0 Table 1. Bond Pad Coordinates in Microns 2 DISCRIPTION PAD NUMBER X min Y min X max Y max VIN- 1 80.7 3.7 165.7 88.7 VOCM 2 310.6 3.7 395.6 88.7 VS+ 3 405.6 3.7 490.6 88.7 VS+ 4 500.6 3.7 585.6 88.7 VS+ 5 595.6 3.7 680.6 88.7 VOUT+ 6 679.6 137.55 764.6 222.55 VOUT- 7 679.6 434.7 764.6 519.7 VS- 8 595.6 568.6 680.6 653.6 VS- 9 500.6 568.6 585.6 653.6 VS- 10 405.6 568.6 490.6 653.6 PD 11 310.6 568.6 395.6 653.6 VIN+ 12 80.7 568.6 165.7 653.6 Copyright © 2011, Texas Instruments Incorporated THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn ORDERING INFORMATION (1) TA PACKAGE –55°C to175°C –55°C to 210°C (1) (2) (2) ORDERABLE PART NUMBER TOP-SIDE MARKING THS4521 D THS4521HD KGD (bare die) THS4521SKGD1 NA HKJ THS4521SHKJ THS4521SHKJ For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range (unless otherwise noted). Supply Voltage, VS– to VS+ UNIT 3.6 V (VS–) – 0.7 to (VS+) + 0.7V V 1 V Output Current, IO 100 mA Input Current, II (VIN±, VOCM pins) 10 mA Input/Output Voltage, VI (VIN±, VOUT±, VOCM pins) Differential Input Voltage, VID Continuous Power Dissipation See Thermal Characteristic Specifications Maximum Junction Temperature, TJ (continuous operation, long-term reliability) (2) Operating Free-air Temperature Range, TA –40 to 175 KGD, HKJ packages –55 to 210 –65 to 210 °C 1300 V Charge Device Model (CDM) 1000 V 50 V Machine Model (MM) (1) (2) °C Human Body Model (HBM) Storage Temperature Range, TSTG ESD Rating: °C 217 D package Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Refer to Figure 1 for expected life time. THERMAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER MIN TYP MAX UNIT Junction-to-case thermal resistance (to bottom of case) HKJ package 5.7 θJC Junction-to-case thermal resistance (to top of case lid - as if formed dead bug) HKJ package 13.7 θJC (1) Junction-to-case thermal resistance D package 72.5 °C/W θJA Junction-to-ambient thermal resistance D package 118.5 °C/W (1) °C/W Taken as per JESD51. Copyright © 2011, Texas Instruments Incorporated 3 THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn ELECTRICAL CHARACTERISTICS: VS+ – VS– = 3.3 V At VS+ = 3.3 V, VS– = 0 V, VOCM = open, VOUT = 2 VPP (differential), RL = 1 kΩ differential, G = 1 V/V, single-ended input, differential output, input and output referenced to midsupply, unless otherwise noted. -55°C to 125°C PARAMETER CONDITIONS MIN TYP MAX 175°C MIN TYP -55°C to 210°C MAX MIN TYP MAX UNIT TEST LEVEL (1) AC PERFORMANCE VOUT = 100 mVPP, G=1 104.3 40.7 40.7 MHz C VOUT = 100 mVPP, G=2 42 12.5 12.5 MHz C VOUT = 100 mVPP, G=5 12.2 3.15 3.15 MHz C VOUT = 100 mVPP, G = 10 8.1 2.2 2.2 MHz C VOUT = 100 mVPP, G = 10 81 22 22 MHz C Large-Signal Bandwidth VOUT = 2 VPP, G = 1 84 22 22 MHz C Bandwidth for 0.1-dB Flatness VOUT = 2 VPP, G = 1 18.1 5.4 5.4 MHz C Rising Slew Rate (Differential) VOUT = 2-V Step, G = 1, RL = 200 Ω 377.5 353.5 353.5 V/μs C Falling Slew Rate (Differential) VOUT = 2-V Step, G = 1, RL = 200 Ω 422.5 392.5 392.5 V/μs C Overshoot VOUT = 2-V Step, G = 1, RL = 200 Ω 6.75 8.85 8.85 % C VOUT = 2-V Step, G = 1, RL = 200 Ω 7.85 11.45 11.45 % C VOUT = 2-V Step, G = 1, RL = 200 Ω 13.5 15.9 15.9 ns C VOUT = 2-V Step, G = 1, RL = 200 Ω 11.4 14.6 14.6 ns C VOUT = 2-V Step, G = 1, RL = 200 Ω 18.5 23.5 23.5 ns C f = 1 kHz, VOUT = 1 VRMS, G = 1 (2), differential input –115 –96 –96 dBc C f = 1 MHz, VOUT = 2 VPP, G = 1 –77 –68.5 –68.5 dBc C f = 1 kHz, VOUT = 1 VRMS, G = 1 (2), differential input –116 –91.5 –91.5 dBc C f = 1 MHz, VOUT = 2 VPP, G = 1 –80.5 –68.5 –68.5 dBc C Two-tone, f1 = 2 kHz, f2 = 500 Hz, VOUT = 1 VRMS envelope –91.5 –79.5 –79.5 dBc C Two-tone, f1 = 2 kHz, f2 = 500 Hz, VOUT = 1 VRMS envelope –95.5 –79.5 –79.5 dBc C Small-Signal Bandwidth Undershoot Rise Time Fall Time 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Gain Bandwidth Product Settling Time to 1% HARMONIC DISTORTION 2nd harmonic 3rd harmonic Second-Order Intermodulation Distortion Third-Order Intermodulation Distortion Input Voltage Noise f > 10 kHz 9.05 19.95 19.95 nV/√Hz C Input Current Noise f > 100 kHz 1.8 2.45 2.45 pA/√Hz C Overdrive Recovery Time Overdrive = ±0.5 V 116.5 126 126 ns C Output Balance Error VOUT = 100 mV, f ≤ 2 MHz (differential input) –51.5 –45.5 –45.5 dB C Closed-Loop Output Impedance f = 1 MHz (differential) 0.3 Ω C (1) (2) 4 Test levels: (A) 100% tested. (B) Limits set by characterization and simulation. (C) Typical value only for information. Not directly measureable; calculated using noise gain of 101. Copyright © 2011, Texas Instruments Incorporated THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn ELECTRICAL CHARACTERISTICS: VS+ – VS– = 3.3 V (continued) At VS+ = 3.3 V, VS– = 0 V, VOCM = open, VOUT = 2 VPP (differential), RL = 1 kΩ differential, G = 1 V/V, single-ended input, differential output, input and output referenced to midsupply, unless otherwise noted. -55°C to 125°C PARAMETER CONDITIONS MIN TYP 175°C MAX MIN TYP -55°C to 210°C MAX MIN TYP MAX UNIT TEST LEVEL (1) dB A DC PERFORMANCE Open-Loop Voltage Gain (AOL) 102 Input-Referred Offset Voltage ±0.1 Input offset voltage drift (3) 90 ±5 ±0.13 ±0.43 ±11.5 mV A ±1 ±28 ±10 ±2 ±50 μV/°C B Input Bias Current ±0.75 ±3.3 ±0.75 ±0.78 ±4.5 μA A Input bias current drift (3) ±3.3 ±14 ±4.7 ±4.8 ±17 nA/°C B Input Offset Current ±0.3 ±1.7 ±0.5 ±0.5 ±3.5 µA A Input offset current drift (3) ±1.1 ±8 ±3.6 ±1.26 ±9 nA/°C B –0.1 0 -0.1 –0.1 0 V A INPUT 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 81.9 Common-Mode Input Voltage Low ±4.5 ±3.2 Common-Mode Input Voltage High 1.8 1.9 1.9 1.8 1.9 V A Common-Mode Rejection Ratio (CMRR) 80 105 95 74 98 dB A 154∥3. 2 12.3∥4 6 12.3∥4 6 kΩ∥pF C Input Resistance OUTPUT Output Voltage Low 0.09 Output Voltage High 2.95 Output Current Drive (for linear operation) RL = 50 Ω 0.25 0.3 3.11 3.11 ±35 (4) ±33 (4) 0.09 2.85 V A 3.05 0.31 V A ±33 (4) mA C POWER SUPPLY Specified Operating Voltage 2.5 Quiescent Operating Current, per channel 0.85 1 66 85 Power-Supply Rejection Ratio (±PSRR) 3.6 2.5 1.3 0.9 1.16 62.5 74 3.6 2.5 3.6 1.4 0.9 1.1 60 80 1.4 V A mA A dB A V A 1.6 V A POWER DOWN Enable Voltage Threshold Disable Voltage Threshold Assured on above 2.2 V Assured off below 0.7 V 1 0.7 1.6 2.2 1 0.7 1.6 2.2 1 0.7 2.2 Disable Pin Bias Current 1 1 1 μA C Power Down Quiescent Current 2 10 10 μA C Turn-On Time Delay Time to VOUT = 90% of final value, VIN= 2 V, RL = 200 Ω 86.5 99 99 ns C Turn-Off Time Delay Time to VOUT = 10% of original value, VIN= 2 V, RL = 200 Ω 136 145 144.5 ns C 21 13 13 MHz C VOCM VOLTAGE CONTROL Small-Signal Bandwidth (3) (4) Input Offset Voltage Drift, Input Bias Current Drift and Input Offset Current Drift are average values calculated by taking data at -55°C and 125°C, computing the difference and dividing by 180. High temperature drift data is an average value calculated by taking data at -55°C and 210°C, computing the difference and diving by 265. Continuous operation with high current loads at elevated temperature may affect product reliability. Refer to operating lifetime chart (Figure 1). Copyright © 2011, Texas Instruments Incorporated 5 THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn ELECTRICAL CHARACTERISTICS: VS+ – VS– = 3.3 V (continued) At VS+ = 3.3 V, VS– = 0 V, VOCM = open, VOUT = 2 VPP (differential), RL = 1 kΩ differential, G = 1 V/V, single-ended input, differential output, input and output referenced to midsupply, unless otherwise noted. -55°C to 125°C PARAMETER CONDITIONS MIN TYP 0.97 Slew Rate 175°C MAX MIN TYP 0.99 1.02 0.97 ±0.2 ±4 ±0.9 ±2.73 ±0.27 2.3 0.8 to 2.5 49 Gain Common-Mode Offset Voltage from VOCM Input Measured at VOUT with VOCM input driven, VOCM = 1.65 V ±0.5 V VOCM = 1.65 V ±0.5 V MIN 1.03 0.97 39 TYP MAX VOCM Voltage Range 1.01 0.8 to 2.5 ±0.7 114∥3. 6 Input Impedance Default Output Common-Mode Voltage Offset from (VS+– VS–)/2 Measured at VOUT with VOCM input open ±0.3 ±2.75 1.09 148∥3. 7 ±5 UNIT TEST LEVEL (1) 39 1 V/μs C 1 1.03 V/V A ±0.7 ±10 mV A ±0.91 ±2.75 μA A 0.8 to 2.5 2.3 V A kΩ∥pF C mV A 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Input Bias Current -55°C to 210°C MAX ±0.6 148∥3. 7 ±10 ±0.6 ±10 1000000 Estimated Life - Hours 100000 Output Load = 10 mA 10000 Output Load = 25 mA Output Load = 35 mA 1000 100 110 120 130 140 150 160 170 180 190 200 210 220 Continuous TJ - °C (1) See data sheet for absolute maximum and minimum recommended operating conditions. (2) Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life). (3) The predicted operating lifetime vs. junction temperature is based on reliability modeling using electromigration as the dominant failure mechanism affecting device wearout for the specific device process and design characteristics. (4) Device is qualified to ensure reliable operation for 1000 hours at maximum rated temperature. This includes, but is not limited to temperature bake, temperature cycle, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. For plastic package only. Figure 1. THS4521SHKJ/SKGD1 Operating Life Derating Chart 6 Copyright © 2011, Texas Instruments Incorporated THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn DEVICE INFORMATION D OR HKJ PACKAGE (TOP VIEW) VIN- 1 8 VIN+ VOCM 2 7 PD VS+ 3 6 VS- VOUT+ 4 5 VOUT- 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 TERMINAL FUNCTIONS PIN NO. 1 2 3 4 5 6 7 8 NAME DESCRIPTION VIN– Inverting amplifier input VOCM Common-mode voltage input VS+ Amplifier positive power-supply input VOUT+ Noninverting amplifier output VOUT– Inverting amplifier output VS– Amplifier negative power-supply input. Note that VS– is tied together on multi-channel devices. PD Power down. PD = logic low puts device into low-power mode. PD = logic high or open for normal operation. VIN+ Noninverting amplifier input Copyright © 2011, Texas Instruments Incorporated 7 THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn TYPICAL CHARACTERISTICS Table of Graphs (1): VS+ – VS– = 3.3 V TITLE FIGURE Small-Signal Frequency Response Figure 2 Large-Signal Frequency Response Figure 3 Figure 4 Slew Rate vs VOUT Step Figure 5 Overdrive Recovery Figure 6 10-kHz Output Spectrum on AP Analyzer Figure 7 Harmonic Distortion vs Frequency Figure 8 Harmonic Distortion vs Output Voltage at 1 MHz Figure 9 Harmonic Distortion vs Gain at 1 MHz Figure 10 Harmonic Distortion vs Load at 1 MHz Figure 11 Harmonic Distortion vs VOCM at 1 MHz Figure 12 Two-Tone, Second- and Third-Order Intermodulation Distortion vs Frequency Figure 13 Single-Ended Output Voltage Swing vs Load Resistance Figure 14 Main Amplifier Differential Output Impedance vs Frequency Figure 15 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Large- and Small-Signal Pulse Response Frequency Response vs CLOAD (RLOAD = 1 kΩ) Figure 16 RO vs CLOAD (RLOAD = 1 kΩ) Figure 17 Rejection Ratio vs Frequency Figure 18 Turn-on Time Figure 19 Turn-off Time Figure 20 Input-Referred Voltage Noise and Current Noise Spectral Density Figure 21 Main Amplifier Differential Open-Loop Gain and Phase Figure 22 Output Balance Error vs Frequency Figure 23 VOCM Small-Signal Frequency Response Figure 24 VOCM Large-Signal Frequency Response Figure 25 VOCM Input Impedance vs Frequency Figure 26 (1) 8 Graphs are plotted for room temperature only and are given only for reference. Copyright © 2011, Texas Instruments Incorporated THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn TYPICAL CHARACTERISTICS: VS+ – VS– = 3.3 V At VS+ = +3.3 V, VS– = 0 V, VOCM = open, VOUT = 2 VPP (differential), RL = 1 kΩ differential, G = 1 V/V, single-ended input, differential output, and input and output referenced to midsupply, unless otherwise noted. Graphs are plotted for room temperature only and are given only for reference. SMALL-SIGNAL FREQUENCY RESPONSE LARGE-SIGNAL FREQUENCY RESPONSE 6 6 3 -3 Normalized Gain (dB) G = 1 V/V 0 G = 2 V/V -6 G = 5 V/V -9 -12 G = 10 V/V -15 VS+ = 3.3 V RL = 1 kW VO = 100 mVPP -18 -21 G = 1 V/V 0 G = 2 V/V -3 -6 G = 5 V/V 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Normalized Gain (dB) 3 -24 100 k -9 -12 G = 10 V/V -15 VS+ = 3.3 V RL = 1 kW VO = 2.0 VPP -18 -21 1M 10 M 100 M -24 100 k 1G 0 Rising 500 Slew Rate (V/ms) Differential VOUT (V) SLEW RATE vs VOUT 600 VS+ = 3.3 V G = 1 V/V RF = 1 kW RL = 200 W 0.5 0.5-V Step -0.5 400 Falling 300 200 100 -1.5 0 0 20 40 60 80 100 0 1 Figure 4. Figure 5. OVERDRIVE RECOVERY 10-kHz OUTPUT SPECTRUM ON AP ANALYZER 2.0 1.5 0.5 0 0 -1 -0.5 VS+ = 3.3 V G = 2 V/V RF = 1 kW RL = 200 W -2 -3 -4 0 100 200 -1.0 -1.5 -2.0 300 400 500 600 Time (ns) Figure 6. Copyright © 2011, Texas Instruments Incorporated 800 900 1k Magnitude (dBv) 1.0 1 Input Voltage (V) Differential VOUT (V) 2 5 4 Differential VOUT (V) VOUT Diff Input 3 3 2 Time (ns) 4 VS+ = 3.3 V G = 1 V/V RF = 1 kW RL = 200 W 2-V Step -1.0 1G Figure 3. LARGE- AND SMALL-SIGNAL PULSE RESPONSE 1.0 100 M Frequency (Hz) Figure 2. 1.5 10 M 1M Frequency (Hz) 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 VS+ = 3.3 V G = 1 V/V RF = 1 kW VOUT = 5 VPP 0 5k 10 k 15 k 20 k Generator THS4521 25 k 30 k 35 k Frequency (Hz) Figure 7. 9 THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn TYPICAL CHARACTERISTICS: VS+ – VS– = 3.3 V (continued) At VS+ = +3.3 V, VS– = 0 V, VOCM = open, VOUT = 2 VPP (differential), RL = 1 kΩ differential, G = 1 V/V, single-ended input, differential output, and input and output referenced to midsupply, unless otherwise noted. Graphs are plotted for room temperature only and are given only for reference. HARMONIC DISTORTION vs VOUT AT 1 MHZ HARMONIC DISTORTION vs FREQUENCY -30 -40 -50 -60 -70 -80 -90 -100 Third Harmonic VS+ = 3.3 V G = 1 V/V RF = 1 kW RL = 1 kW f = 1 MHz -55 Second Harmonic -60 -65 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Harmonic Distortion (dBc) -50 VS+ = 3.3 V G = 1 V/V RF = 1 kW RL = 1 kW VOUT = 2.0 VPP -20 Harmonic Distortion (dBc) -10 -70 -75 Second Harmonic -80 -85 -90 Third Harmonic -95 -110 -100 10 1 100 1 3 2 Frequency (MHz) Figure 8. Figure 9. HARMONIC DISTORTION vs GAIN AT 1 MHZ HARMONIC DISTORTION vs LOAD AT 1 MHZ -70 -75 Second Harmonic -80 -85 VS+ = 3.3 V RF = 1 kW RL = 1 kW f = 1 MHz VOUT = 2.0 VPP Third Harmonic -90 -95 -100 Harmonic Distortion (dBc) Harmonic Distortion (dBc) -70 -75 Second Harmonic -80 -85 VS+ = 3.3 V G = 1 V/V RF = 1 kW f = 1 MHz VOUT = 2.0 VPP -90 -95 3 2 5 4 6 7 8 9 10 0 100 200 300 400 500 600 -50 -60 -70 HARMONIC DISTORTION vs VOCM AT 1 MHZ TWO-TONE INTERMODULATION DISTORTION vs FREQUENCY -10 Second Harmonic -80 -90 Third Harmonic -100 0 0.5 1k Figure 11. VS+ = 3.3 V G = 1 V/V RF = 1 kW RL = 1 kW f = 1 MHz VOUT = 2.0 VPP -40 900 Figure 10. 1.0 1.5 VOCM (V) Figure 12. 2.0 2.5 3.0 Intermodulation Distortion (dBc) -30 800 Load (W) Gain (V/V) Harmonic Distortion (dBc) Third Harmonic -100 1 10 6 5 4 VOUT (VPP) VS+ = 3.3 V G = 1 V/V RF = 1 kW RL = 1 kW VOUT = 2.0 VPP envelope -20 -30 -40 -50 Second Intermodulation -60 -70 Third Intermodulation -80 -90 -100 -110 1 10 100 Frequency (MHz) Figure 13. Copyright © 2011, Texas Instruments Incorporated THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn TYPICAL CHARACTERISTICS: VS+ – VS– = 3.3 V (continued) At VS+ = +3.3 V, VS– = 0 V, VOCM = open, VOUT = 2 VPP (differential), RL = 1 kΩ differential, G = 1 V/V, single-ended input, differential output, and input and output referenced to midsupply, unless otherwise noted. Graphs are plotted for room temperature only and are given only for reference. SINGLE-ENDED OUTPUT VOLTAGE SWING vs LOAD RESISTANCE 3.5 100 Differential Output Impedance (W) Linear Voltage Range VOCM = 1.65 V 3.0 2.5 VOUT max 2.0 1.5 VOUT min 1.0 0.5 0 10 10 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Single-Ended VOUT (V) MAIN AMPLIFIER DIFFERENTIAL OUTPUT IMPEDANCE vs FREQUENCY 100 1k 1 0.1 0.01 100 k 10 k Normalized Gain (dB) 0 -5 -10 -15 -20 Figure 14. Figure 15. FREQUENCY RESPONSE vs CLOAD RLOAD = 1 kΩ RO vs CLOAD RLOAD = 1 kΩ 1k CL = 4.7 pF RO = 150 W CL = 1000 pF RO = 7.15 W 100 CL = 100 pF RO = 35.7 W 10 CL = 10 pF RO = 124 W 1 -25 100 k 1M 10 M 100 M 10 1G 100 Frequency (Hz) Figure 17. REJECTION RATIO vs FREQUENCY TURN-ON TIME 4.0 3.5 80 PD Pulse (V) 3.0 90 CMRR 70 60 50 10 k 2.0 2.5 1.5 2.0 1.0 1.5 VOUT Diff PD 1.0 VS+ = 3.3 V G = 1 V/V RF = 1 kW 2.5 VS+ = 3.3 V G = 1 V/V RF = 1 kW RL = 200 W -PSRR 0.5 0.5 +PSRR 0 0 100 k 1M Frequency (Hz) Figure 18. Copyright © 2011, Texas Instruments Incorporated 10 M Differential VOUT (V) Common-Mode Rejection Ratio (dB) Power-Supply Rejection Ratio (dB) 100 1000 CLOAD (pF) Figure 16. 110 100 M Frequency (Hz) RO (W) 5 10 M 1M Load Resistance (W) 100 M 0 20 40 60 80 100 120 140 160 180 200 Time (ns) Figure 19. 11 THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn TYPICAL CHARACTERISTICS: VS+ – VS– = 3.3 V (continued) At VS+ = +3.3 V, VS– = 0 V, VOCM = open, VOUT = 2 VPP (differential), RL = 1 kΩ differential, G = 1 V/V, single-ended input, differential output, and input and output referenced to midsupply, unless otherwise noted. Graphs are plotted for room temperature only and are given only for reference. INPUT-REFERRED VOLTAGE AND CURRENT NOISE SPECTRAL DENSITY 3.5 3.0 1.8 1.6 1.4 1.0 1.5 0.8 0.6 1.0 VOUT Diff PD 0.5 0 100 0.4 0.2 20 40 60 80 100 120 140 160 0 180 200 10 100 1k Figure 21. MAIN AMPLIFIER DIFFERENTIAL OPEN-LOOP GAIN AND PHASE OUTPUT BALANCE ERROR vs FREQUENCY -20 Gain 40 -90 20 Phase 0 Output Balance Error (dB) OPen-Loop Gain (dB) -45 60 10 1 100 1k 10 k G = 0 dB 100 k 1M -30 -35 -40 -45 -50 -55 -135 -20 -60 100 k 10 M 100 M Figure 23. VOCM SMALL-SIGNAL FREQUENCY RESPONSE -15 G = 0 dB VIN = -20 dBm -20 100 k 1M 2.3 2.1 1.9 1.7 1.5 1.3 1.1 VS+ = 3.3 V G = 1 V/V RF = 1 kW RL = 1 kW 0.9 0.7 0.5 10 M Frequency (Hz) Figure 24. 12 VOCM LARGE-SIGNAL PULSE RESPONSE 2.5 VOUT Common-Mode Voltage (V) Gain (dB) -10 100 M Frequency (Hz) Figure 22. -5 10 M 1M Frequency (Hz) 0 1M -25 Open-Loop Phase (Degrees) 80 100 k Figure 20. 0 100 10 k Frequency (Hz) Time (ns) 120 Current Noise 1 0 0 Voltage Noise 10 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 1.2 2.0 Differential VOUT (V) 2.5 PD Pulse (V) 2.0 VS+ = 3.3 V G = 1 V/V RF = 1 kW RL = 200 W Input-Referred Voltage Noise (nV/ÖHz) Input-Referred Current Noise (pA/ÖHz) TURN-OFF TIME 100 M 1G 0 100 200 300 400 Time (ns) Figure 25. Copyright © 2011, Texas Instruments Incorporated THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn TYPICAL CHARACTERISTICS: VS+ – VS– = 3.3 V (continued) At VS+ = +3.3 V, VS– = 0 V, VOCM = open, VOUT = 2 VPP (differential), RL = 1 kΩ differential, G = 1 V/V, single-ended input, differential output, and input and output referenced to midsupply, unless otherwise noted. Graphs are plotted for room temperature only and are given only for reference. VOCM INPUT IMPEDANCE vs FREQUENCY 10 k 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 VOCM Input Impedance (W) 100 k 1k 100 100 k 10 M 1M 100 M Frequency (Hz) Figure 26. Copyright © 2011, Texas Instruments Incorporated 13 THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn TEST CIRCUITS Overview RL RO ROT 100 Ω 24.9 Ω Open As a result of the voltage divider on the output formed by the load component values, the amplifier output is attenuated. The Atten column in Table 3 shows the attenuation expected from the resistor divider. When using a transformer at the output (as shown in Figure 28), the signal sees slightly more loss because of transformer and line loss; these numbers are approximate. 6 dB 200 Ω 86.6 Ω 69.8 Ω 16.8 dB 499 Ω 237 Ω 56.2 Ω 25.5 dB 1 kΩ 487 Ω 52.3 Ω 31.8 dB 1. Total load includes 50-Ω termination by the test equipment. Components are chosen to achieve load and 50-Ω line termination through a 1:1 transformer. Frequency Response The circuit shown in Figure 27 is used to measure the frequency response of the circuit. An HP network analyzer is used as the signal source and the measurement device. The output impedance of the HP network analyzer is is dc-coupled and is 50 Ω. RIT and RG are chosen to impedance-match to 50 Ω and maintain the proper gain. To balance the amplifier, a 49.9-Ω resistor to ground is inserted across RIT on the alternate input. The output is probed using a Tektronix high-impedance differential probe across the 953-Ω resistor and referred to the amplifier output by adding back the 0.42-dB because of the voltage divider on the output. From 50-W Source 1 V/V 2 V/V 5 V/V 10 V/V RF RG RIT 1 kΩ 1 kΩ 52.3 Ω 1 kΩ 487 Ω 53.6 Ω 1 kΩ 187 Ω 59.0 Ω 1 kΩ 86.6 Ω 69.8 Ω 1. Gain setting includes 50-Ω source impedance. Components are chosen to achieve gain and 14 VIN+ RG Calibrated Differential Probe Across RIT 1 kW VS+ RIT 24.9 W PD Open Table 2. Gain Component Values for Single-Ended Input(1) Gain Atten 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 The THS4521 is tested with the test circuits shown in this section; all circuits are built using the available THS4521 evaluation module (EVM). For simplicity, power-supply decoupling is not shown; see the layout in the Applications section for recommendations. Depending on the test conditions, component values change in accordance with Table 2 and Table 3, or as otherwise noted. In some cases the signal generators used are ac-coupled and in others they dc-coupled 50-Ω sources. To balance the amplifier when ac-coupled, a 0.22-μF capacitor and 49.9-Ω resistor to ground are inserted across RIT on the alternate input; when dc-coupled, only the 49.9-Ω resistor to ground is added across RIT. A split power supply is used to ease the interface to common test equipment, but the amplifier can be operated in a single-supply configuration as described in the Applications section with no impact on performance. Also, for most of the tests, except as noted, the devices are tested with single-ended inputs and a transformer on the output to convert the differential output to single-ended because common lab test equipment has single-ended inputs and outputs. Similar or better performance can be expected with differential inputs and outputs. 50-Ω input termination. Table 3. Load Component Values For 1:1 Differential to Single-Ended Output Transformer(1) THS452x 0.22 mF VOCM Installed to Balance Amplifier VS- 49.9 W RIT RG 24.9 W 953 W Measure with Differential Probe Across ROT Open 0.22 mF 1 kW Figure 27. Frequency Response Test Circuit Copyright © 2011, Texas Instruments Incorporated THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn Distortion The circuit shown in Figure 28 is used to measure harmonic and intermodulation distortion of the amplifier. The circuit shown in Figure 29 is used to measure slew rate, transient response, settling time, output impedance, overdrive recovery, output voltage swing, and ampliifer turn-on/turn-off time. Turn-on and turn-off time are measured with the same circuit modified for 50-Ω input impedance on the PD input by replacing the 0.22-μF capacitor with a 49.9-Ω resistor. For output impedance, the signal is injected at VOUT with VIN open; the drop across the 2x 49.9-Ω resistors is then used to calculate the impedance seen looking into the amplifier output. 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 An HP signal generator is used as the signal source and the output is measured with a Rhode and Schwarz spectrum analyzer. The output impedance of the HP signal generator is ac-coupled and is 50 Ω. RIT and RG are chosen to impedance match to 50 Ω and maintain the proper gain. To balance the amplifier, a 0.22-μF capacitor and 49.9-Ω resistor to ground are inserted across RIT on the alternate input. Slew Rate, Transient Response, Settling Time, Output Impedance, Overdrive, Output Voltage, and Turn-On/Turn-Off Time A low-pass filter is inserted in series with the input to reduce harmonics generated at the signal source. The level of the fundamental is measured and then a high-pass filter is inserted at the output to reduce the fundamental so it does not generate distortion in the input of the spectrum analyzer. From 50-W Source VIN+ RG RIT 49.9 W PD Open The transformer used in the output to convert the signal from differential to single-ended is an ADT1–1WT. It limits the frequency response of the circuit so that measurements cannot be made below approximately 1 MHz. From 50-W Source VIN+ RG RF VS+ RIT VOUT RO PD Open THS452x 0.22 mF VOCM Installed to Balance Amplifier VS- 0.22 mF 49.9 W RIT RG 1:1 ROT RO To 50-W Test Equipment 1 kW VS+ THS452x 0.22 mF VOCM Installed to Balance Amplifier VS- 49.9 W RIT RG 49.9 W VOUT- VOUT+ To Oscilloscope with 50-W Input Open 0.22 mF 1 kW Figure 29. Slew Rate, Transient Response, Settling Time, Output Impedance, Overdrive Recovery, VOUT Swing, and Turn-On/Turn-Off Test Circuit Open 0.22 mF RF Figure 28. Distortion Test Circuit Copyright © 2011, Texas Instruments Incorporated 15 THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn VOCM Input The circuit shown in Figure 30 is used to measure the CMRR. The signal from the network analyzer is applied common-mode to the input. Figure 31 is used to measure the PSRR of VS+ and VS–. The power supply under test is applied to the network analyzer dc offset input. For both CMRR and PSRR, the output is probed using a Tektronix high-impedance differential probe across the 953-Ω resistor and referred to the amplifier output by adding back the 0.42-dB as a result of the voltage divider on the output. For these tests, the resistors are matched for best results. The circuit illustrated in Figure 32 is used to measure the frequency response and input impedance of the VOCM input. Frequency response is measured using a Tektronix high-impedance differential probe, with RCM = 0 Ω at the common point of VOUT+ and VOUT–, formed at the summing junction of the two matched 499-Ω resistors, with respect to ground. The input impedance is measured using a Tektronix high-impedance differential probe at the VOCM input with RCM = 10 kΩ and the drop across the 10-kΩ resistor is used to calculate the impedance seen looking into the amplifier VOCM input. From Network Analyzer VIN+ 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Common-Mode and Power-Supply Rejection 1 kW 1 kW VS+ 24.9 W PD Open Calibrated Differential Probe THS452x 24.9 W 0.22 mF 52.3 W VOCM Measure with Differential Probe Open 0.22 mF VS- 1 kW 953 W The circuit shown in Figure 33 measures the transient response and slew rate of the VOCM input. A 1-V step input is applied to the VOCM input and the output is measured using a 50-Ω oscilloscope input referenced back to the amplifier output. 1 kW 1 kW Open VS+ 49.9 W 1 kW 499 W Figure 30. CMRR Test Circuit PD Open THS452x 0.22 mF 499 W RCM VOCM VS Power Supply Open 1 kW 49.9 W Network Analyzer 1 kW Open 1 kW Calibrated Differential Probe Across VS+ and GND 1 kW PD THS452x 0.22 mF VOCM VS- 1 kW 52.3 W 24.9 W 1 kW VS+ Measure with Differential 953 W Probe Across ROT Open 0.22 mF 1 kW Figure 31. PSRR Test Circuit 16 49.9 W Open 52.3 W 499 W Open PD THS452x 0.22 mF To Oscilloscope 50-W Input 499 W 49.9 W VOCM VS- Open 1 kW 52.3 W space From Network Analyzer Figure 32. VOCM Input Test Circuit 1 kW 24.9 W Open Calibrated Measurement Differential Probe Point for ZIN Across 49.9 W Resistor VS+ 52.3 W Open Measurement Point for Bandwidth 1 kW Step Input 49.9 W Figure 33. VOCM Transient Response and Slew Rate Test Circuit Copyright © 2011, Texas Instruments Incorporated THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn APPLICATION INFORMATION The following circuits show application information for the THS4521. For simplicity, power-supply decoupling capacitors are not shown in these diagrams; see the EVM and Layout Recommendations section for suggested guidelines. For more details on the use and operation of fully differential op amps, refer to the Application Report Fully-Differential Amplifiers (SLOA054), available for download from the TI web site at www.ti.com. Single-Ended Input VS+ THS452x VOUT+ 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 The THS4521 is fully-differential operational amplifiers that can be used to amplify differential input signals to differential output signals. Figure 34 shows a basic block diagram of the circuit (VOCM and PD inputs not shown). The gain of the circuit is set by RF divided by RG. VS+ Differential Input Differential Output RG VOUT- THS452x VOUT+ RG VS- RF Figure 34. Differential Input to Differential Output Amplifier Single-Ended Input to Differential Output Amplifier The THS4521 can also amplify and convert single-ended input signals to differential output signals. Figure 35 illustrates a basic block diagram of the circuit (VOCM and PD inputs not shown). The gain of the circuit is again set by RF divided by RG. Copyright © 2011, Texas Instruments Incorporated VS- RF Figure 35. Single-Ended Input to Differential Output Amplifier Input Common-Mode Voltage Range RF VIN- Differential Output VOUT- RG Differential Input to Differential Output Amplifier VIN+ RF RG The input common-mode voltage of a fully-differential op amp is the voltage at the + and – input pins of the device. It is important to not violate the input common-mode voltage range (VICR) of the op amp. Assuming the op amp is in linear operation, the voltage across the input pins is only a few millivolts at most. Therefore, finding the voltage at one input pin determines the input common-mode voltage of the op amp. Treating the negative input as a summing node, the voltage is given by Equation 1: VOUT+ ´ RF RG + VIN- ´ R G + RF RG + RF (1) To determine the VICR of the op amp, the voltage at the negative input is evaluated at the extremes of VOUT+. As the gain of the op amp increases, the input common-mode voltage becomes closer and closer to the input common-mode voltage of the source. Setting the Output Common-Mode Voltage The output common-model voltage is set by the voltage at the VOCM pin. The internal common-mode control circuit maintains the output common-mode voltage within 5-mV offset (typ) from the set voltage. If left unconnected, the common-mode set point is set to midsupply by internal circuitry, which may be overdriven from an external source. 17 THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn Figure 36 represents the VOCM input. The internal VOCM circuit has typically 23 MHz of –3 dB bandwidth, which is required for best performance, but it is intended to be a dc bias input pin. A 0.22-μF bypass capacitor is recommended on this pin to reduce noise. The external current required to overdrive the internal resistor divider is given approximately by the formula in Equation 2: 2VOCM - (VS+ - VS-) IEXT = 50 kW • To facilitate testing with common lab equipment, the THS4521EVM allows for split-supply operation; most of the characterization data presented in this data sheet is measured using split-supply power inputs. The device can easily be used with a single-supply power input without degrading performance. Figure 37 shows a dc-coupled single-supply circuit with single-ended inputs. This circuit can also be applied to differential input sources. 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 where: Single-Supply Operation VOCM is the voltage applied to the VOCM pin (2) VIN+ RG RF VS+ RIT VS+ 100 kW To internal VOCM circuit IEXT PD PD Control 0.22 mF VOCM VS- 100 kW VS- THS452x Optional; installed to balance impedance seen at VIN+ RIT RG RO VOUT- RO VOUT+ VOCM VOCM Control 0.22 mF RF Figure 36. VOCM Input Circuit Typical Performance Variation with Supply Voltage The THS4521 provides excellent performance across the specified power-supply range of 2.5 V to 3.3 V with only minor variations. The input and output voltage compliance ranges track with the power supply in nearly a 1:1 correlation. Other changes can be observed in slew rate, output current drive, open-loop gain, bandwidth, and distortion. Figure 37. THS4521 DC-Coupled Single-Supply with Single-Ended Inputs The input common-mode voltage range of the THS4521 is designed to include the negative supply voltage. In the circuit shown in Figure 37, the signal source is referenced to ground. VOCM is set by an external control source or, if left unconnected, the internal circuit defaults to midsupply. Together with the input impedance of the amplifier circuit, RIT provides input termination, which is also referenced to ground. Note that RIT and optional matching components are added to the alternate input to balance the impedance at signal input. 18 Copyright © 2011, Texas Instruments Incorporated THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn Low-Power Applications and the Effects of Resistor Values on Bandwidth For low-power operation, it may be necessary to increase the gain setting resistors values to limit current consumption and not load the source. Using larger value resistors lowers the bandwidth of the THS4521 as a result of the interactions between the resistors, the device parasitic capacitance, and printed circuit board (PCB) parasitic capacitance. 6.00E+00 Signal Gain (dB) 1.00E+00 -4.00E+00 -9.00E+00 -1.40E+01 -1.90E+01 10 kW The THS4521 is designed for a nominal capacitive load of 1 pF on each output to ground. When driving capacitive loads greater than 1 pF, it is recommended to use small resistors (RO) in series with the output, placed as close to the device as possible. Without RO, capacitance on the output interacts with the output impedance of the amplifier and causes phase shift in the loop gain of the amplifier that reduces the phase margin. This reduction in phase margin results in frequency response peaking; overshoot, undershoot, and/or ringing when a step or square-wave signal is applied; and may lead to instability or oscillation. Inserting RO isolates the phase shift from the loop gain path and restores the phase margin, but it also limits bandwidth. 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 100 kW Driving Capacitive Loads -2.40E+01 100000 1 kW 1000000 10000000 100000000 Frequency (Hz) 1000000000 Figure 38. THS4521 Frequency Response with Various Gain Setting and Load Resistor Values Copyright © 2011, Texas Instruments Incorporated 19 THS4521-HT ZHCS261C – APRIL 2011 – REVISED DECEMBER 2011 www.ti.com.cn LAYOUT RECOMMENDATIONS 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 It is recommended to follow the layout of the external components near to the amplifier, ground plane construction, and power routing as closely as possible. Follow these general guidelines: 1. Signal routing should be direct and as short as possible into and out of the op amp circuit. 2. The feedback path should be short and direct. 3. Ground or power planes should be removed from directly under the amplifier input and output pins. 4. An output resistor is recommended in each output lead, placed as near to the output pins as possible. 5. Two 0.1-μF power-supply decoupling capacitors should be placed as near to the power-supply pins as possible. 6. Two 10-μF power-supply decoupling capacitors should be placed within 1 inch of the device and can be shared among multple analog devices. 7. A 0.22-μF capacitor should be placed between the VOCM input pin and ground near to the pin. This capacitor limits noise coupled into the pin. 8. The PD pin uses TTL logic levels; a bypass capacitor is not necessary if actively driven, but can be used for robustness in noisy environments whether driven or not. 20 Copyright © 2011, Texas Instruments Incorporated PACKAGE OPTION ADDENDUM www.ti.com 2-May-2012 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 PACKAGING INFORMATION Orderable Device THS4521HD Status (1) Package Type Package Drawing ACTIVE SOIC (2) Pins Package Qty D 8 75 Green (RoHS & no Sb/Br) Eco Plan Lead/ Ball Finish MSL Peak Temp Samples (Requires Login) CU NIPDAU Level-2-260C-1 YEAR THS4521SHKJ ACTIVE CFP HKJ 8 1 TBD Call TI N / A for Pkg Type THS4521SHKQ PREVIEW CFP HKQ 8 25 TBD Call TI Call TI THS4521SKGD1 ACTIVE XCEPT KGD 0 360 TBD Call TI N / A for Pkg Type (1) (3) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. 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